M52743BSP I2C BUS Controlled 3-Channel Video Preamplifier REJ03F0193-0201 Rev.2.01 Mar 31, 2008 Description M52743BSP is semiconductor integrated circuit for CRT display monitor. It includes OSD blanking, OSD mixing, retrace blanking, wide band amplifier, brightness control. Main/sub contrast and OSD adjust function can be controlled by I2C BUS. Features • Frequency band width: RGB 150 MHz (at −3 dB) OSD 80 MHz Input: RGB 0.7 VP-P (typ.) OSD 3 VP-P min. (positive) BLK (for OSD) 3 VP-P min. (positive) Retrace BLK 3 VP-P min. (positive) Output: RGB 5.5 VP-P (max.) OSD 5 VP-P (max.) • Main contrast and sub contrast can be controlled by I2C BUS. • Include internal and external pedestal clamp circuit. Application CRT display monitor Recommended Operating Condition Supply voltage range: 11.5 to 12.5 V (V3, V8, V12, V36) 4.5 to 4.4 V (V17) Rated supply voltage: 12.0 V (V3, V8, V12, V36) 5.0 V (V17) Major Specification BUS controlled 3ch video pre-amp with OSD mixing function and retrace blanking function REJ03F0193-0201 Rev.2.01 Mar 31, 2008 Page 1 of 25 M52743BSP Block Diagram OSD IN (R) 4 INPUT (R) 2 VCC1 (R) 12 V 3 GND1 (R) 5 OSD IN (G) 9 INPUT (G) 6 VCC1 (G) 12 V 8 Clamp Main contrast Sub contrast 30 27 Retrace blanking Clamp F/B Main contrast Sub contrast Amp OSD Mix Sub Cont (8 bit) GND1 (G) 10 RETRACE BLK IN Amp OSD Mix Sub Cont (8 bit) Clamp MAIN BRIGHTNESS 35 OUTPUT (R) 34 EXT FEED BACK (R) Retrace blanking 32 OUTPUT (G) 31 EXT FEED BACK (G) Clamp F/B OSD IN (B) 13 INPUT (B) 11 Clamp VCC1 (B) 12 V 12 Main contrast Sub contrast OSD Mix Amp Sub Cont (8 bit) Clamp F/B GND1 (B) 14 Main contrast 8 bit CONTRAST 15 (ABL) IN INPUT (SOG) 7 Retrace blanking OSD level 4 bit 29 OUTPUT (B) 28 EXT FEED BACK (B) VCC 5 V (DIGITAL) 21 SDA 17 Sync on Green Sep R Sub Cont 8 bit G Sub Cont 8 bit B Sub Cont 8 bit SOG SEP OUT 18 DAC BUS I/F 20 SCL 22 GND (5V) 19 CLAMP PULSE IN REJ03F0193-0201 Rev.2.01 Mar 31, 2008 Page 2 of 25 36 33 1 VCC2 GND2 OSD BLK IN = 12 V 23 24 25 26 DAC OUTPUT FOR CUT-OFF Adj M52743BSP Pin Arrangement M52743BSP OSD BLK IN 1 36 VCC2 INPUT (R) 2 35 OUTPUT (R) VCC1 (R) 3 34 EXT FEED BACK (R) OSD IN (R) 4 33 GND2 GND1 (R) 5 32 OUTPUT (G) INPUT (G) 6 31 EXT FEED BACK (G) INPUT (SOG) 7 30 MAIN BRIGHTNESS VCC1 (G) 8 29 OUTPUT (B) OSD IN (G) 9 28 EXT FEED BACK (B) GND1 (G) 10 27 RETRACE BLK IN INPUT (B) 11 26 D/A OUT1 VCC1 (B) 12 25 D/A OUT2 OSD IN (B) 13 24 D/A OUT3 GND1 (B) 14 23 D/A OUT4 ABL IN 15 22 GND (5 V) NC 16 21 SDA VCC (5 V) 17 20 SCL SOG SEP OUT 18 19 CLAMP PULSE IN (Top view) Outline: 36P4E REJ03F0193-0201 Rev.2.01 Mar 31, 2008 Page 3 of 25 NC: No connection M52743BSP Absolute Maximum Ratings (Ta = 25°C) Item Symbol Supply voltage VCC Ratings 13.0 Unit V Power dissipation Ambient temperature Storage temperature Recommended supply Pd Topr Tstg Vopr 2403 −20 to +75 −40 to +150 12.0 mW °C °C V Voltage range Case temperature Vopr θjc 10.5 to 12.5 22 V °C/W Electrical Characteristics (VCC = 12 V, 5 V, Ta = 25°C, unless otherwise noted) Limits Item Test Point Symbol Min. Typ. Max. Unit (s) 2, 6, 11 RGB in 1 OSD BLK 4, 9 13 OSD in 19 CP in 27 ReT BLK 7 SOG in IA a a a b SG5 a a IB a ICC1 Circuit current2 ICC2 18 22 mA Output dynamic range Vomax 6.0 8.0 VP-P OUT Maximum input Vimax 1.6 Maximum gain Gv 16.5 17.7 19.7 dB OUT b SG1 Relative maximum gain Main contrast control characteristics1 Main contrast control relative characteristics1 Main contrast control characteristics2 Main contrast control relative characteristics2 Main contrast control characteristics3 Main contrast control relative characteristics3 Sub contrast control characteristics1 Sub contrast control relative characteristics1 Sub contrast control characteristics2 Sub contrast control relative characteristics2 Sub contrast control characteristics3 Sub contrast control relative characteristics3 ∆Gv 0.8 1.2 VC1 14.5 16.0 17.5 dB OUT ∆VC1 0.8 1.0 1.2 VC2 8.5 10.0 11.5 dB ∆VC2 0.8 1.0 1.2 VC3 0.2 0.4 0.6 ∆VC3 0.8 1.2 VSC1 14.8 16.3 17.8 dB ∆VSC1 0.8 1.2 VSC2 11.1 12.6 14.1 dB ∆VSC2 0.8 1.0 1.2 VSC3 1.4 1.7 2.0 ∆VSC3 0.8 Circuit current1 110 1.0 1.0 1.0 1.0 130 1.2 mA VP-P 15 ABL 4.0 5.0 BUS CTL (H) 00H 01H 02H Main Sub Sub Cont Cont Cont 1 2 03H 04H Sub OSD Cont Adj 3 05H BLK Adj 06H 07H D/A D/A OUT OUT 1 2 08H D/A OUT 3 09H D/A OUT 4 0BH INT EXT FFH FFH FFH FFH 00H 00H FFH FFH FFH FFH 00H 255 255 255 255 0 0 255 255 255 255 0 FFH C8H C8H C8H 255 200 200 200 FFH 64H 64H 64H 255 100 100 100 FFH 14H 14H 14H 255 20 20 20 a b SG5 a a a b SG2 b IN a SG2 OUT Variable a b SG5 a a a b SG5 a a 2.0 5.0 64H a a b SG5 a a 2.0 5.0 FFH b SG1 a a b SG5 a a 2.0 5.0 OUT b SG1 a a b SG5 a a 2.0 5.0 b SG1 a a b SG5 a a 2.0 5.0 14H OUT b SG1 a a b SG5 a a 2.0 5.0 OUT b SG1 a a b SG5 a a 2.0 5.0 b SG1 a a b SG5 a a 2.0 5.0 VP-P OUT 30 Bright a VP-P OUT CTL Voltage Input REJ03F0193-0201 Rev.2.01 Mar 31, 2008 Page 4 of 25 4.0 5.0 Vari 5.0 able 100 255 C8H 200 64H 100 20 M52743BSP Electrical Characteristics (cont.) Limits Item Main/sub contrast control characteristics2 Main/sub contrast control relative characteristics2 ABL control characteristics1 ABL control relative characteristics1 ABL control characteristics2 ABL control relative characteristics2 Brightness control characteristics1 Brightness control relative characteristics1 Brightness control characteristics2 Brightness control relative characteristics2 Brightness control characteristics3 Brightness control relative characteristics3 Frequency characteristics1 (f = 50 MHz) Frequency relative characteristics1 (f = 50 MHz) Frequency characteristics1 (f = 150 MHz) Frequency relative characteristics1 (f = 150 MHz) Frequency characteristics2 (f = 150 MHz) Frequency relative characteristics2 (f = 150 MHz) Crosstalk1 (f = 50 MHz) Crosstalk1 (f = 150 MHz) Crosstalk2 (f = 50 MHz) Crosstalk2 (f = 150 MHz) Crosstalk3 (f = 50 MHz) Crosstalk3 (f = 150 MHz) Test Point Symbol Min. Typ. Max. Unit (s) VMSC 3.2 3.8 4.4 VP-P ∆VMSC 0.8 1.0 1.2 3.8 4.6 5.4 VP-P ABL1 ∆ABL1 0.8 1.0 1.2 ABL2 2.2 2.7 3.2 VP-P ∆ABL2 0.8 1.0 1.2 VB1 3.3 3.7 4.1 ∆VB1 −0.3 0 VB2 1.5 ∆VB2 2, 6, 11 RGB in 1 OSD BLK b SG1 a OUT b SG1 a OUT CTL Voltage Input 4, 9 19 13 CP in OSD in 27 ReT BLK 7 SOG in b SG5 a a b a SG5 a a a 30 Bright 00H Main Cont 01H Sub Cont 1 02H Sub Cont 2 03H 04H Sub OSD Cont Adj 3 05H BLK Adj 06H D/A OUT 1 07H D/A OUT 2 08H D/A OUT 3 09H D/A OUT 4 0BH INT EXT 2.0 5.0 C8H C8H C8H C8H 00H 00H FFH FFH FFH FFH 00H 200 200 200 200 0 0 255 255 255 255 0 2.0 4.0 FFH FFH FFH FFH 255 255 255 255 Vari FFH FFH FFH 00H 00H FFH FFH FFH FFH 00H able 255 255 255 0 0 255 255 255 255 0 a 2.0 2.0 b SG1 b a SG5 V OUT a a a b SG5 a a 4.0 5.0 0.3 1.8 2.1 V OUT a a a b SG5 a a 2.0 5.0 −0.3 0 0.3 VB3 0.7 0.9 1.1 V OUT a a a b SG5 a a 1.0 5.0 ∆VB3 −0.3 0 0.3 FC1 −2.0 0 2.5 dB OUT b SG3 a a a 5V a a Vari 5.0 ∆FC1 −1.0 0 1.0 dB FC1' −3.0 0 3.0 dB OUT b SG3 a a a 5V a a ∆FC1' −1.0 FC2 −3.0 3.0 ∆FC2 −1.0 C.T.1 0 0 5.0 dB OUT b SG3 a a a 5V a a a a a 5V a 5V a 5V a 5V a 5V a 5V a a dB −25 −20 dB dB C.T.2 −25 −20 dB C.T.3' −15 −10 −25 −20 −15 −10 dB dB dB OUT (29) 2bSG3 OUT (32) 6a 11a OUT (29) 2bSG3 OUT (32) 6a 11a OUT (29) 2a OUT (35) 6bSG3 11a OUT (29) 2a OUT (35) 6bSG3 11a OUT (32) 2a OUT (35) 6a 11bSG3 OUT (32) 2a OUT (35) 6a 11bSG3 REJ03F0193-0201 Rev.2.01 Mar 31, 2008 Page 5 of 25 a a a a a a a a a a Vari able Vari 5.0 able 1.0 able −15 −10 C.T.3 a dB a 1.0 C.T.1' C.T.2' OUT BUS CTL (H) 15 ABL Vari 5.0 able Vari 5.0 a a a a Vari 5.0 able Vari 5.0 able a a Vari 5.0 able a a Vari 5.0 able a a Vari able FFH 255 able 5.0 M52743BSP Electrical Characteristics (cont.) Limits Item Symbol Min. Typ. Max. Unit Test Point (s) 2, 6, 11 RGB in 1 OSD BLK 4, 9 13 OSD in 19 CP in 27 ReT BLK 7 SOG in b SG1 a a b SG5 a a b SG1 a b SG5 a b SG1 a b SG5 a Pulse characteristics1 (4 VP-P) Pulse characteristics2 (4 VP-P) Clamp pulse threshold voltage Tr Clamp pulse minimum width Pedestal voltage temperature characteristics1 Pedestal voltage temperature characteristics2 OSD pulse characteristics1 OSD pulse characteristics2 WCP 0.2 0.5 µs OUT b SG1 a a PDCH −3.0 0 0.3 V OUT b SG1 a a PDCL −3.0 0 0.3 V OUT b SG1 a a OTr 3.0 6.0 ns OUT a a OTf 3.0 6.0 ns OUT a a 4.6 5.4 6.2 VP-P OUT a OUT a OUT a Tf VthCP OSD adjust control Oaj1 characteristics1 1.0 1.7 3.0 1.5 2.0 ns ns V OUT OUT OUT CTL Voltage Input a 15 00H 01H ABL Main Sub Cont Cont 1 Vari 5.0 able a BUS CTL (H) 30 Bright Vari 5.0 02H 03H Sub Sub Cont Cont 2 3 04H OSD Adj 05H BLK Adj 06H 07H 08H D/A D/A D/A OUT OUT OUT 1 2 3 09H 0BH D/A INT OUT EXT 4 Vari FFH FFH FFH 00H 00H FFH FFH FFH FFH 00H able 255 255 255 0 0 255 255 255 255 0 Vari able able a 2.0 5.0 FFH a a 2.0 5.0 b SG5 a a 2.0 5.0 b SG5 a a 2.0 5.0 b b SG6 SG5 b b SG6 SG5 a a 2.0 5.0 08H a a 2.0 5.0 08H b b b SG6 SG6 SG5 a a 2.0 5.0 0FH a a 2.0 5.0 08H a a 2.0 5.0 08H a a 2.0 5.0 08H a a 2.0 5.0 00H a 255 Variable b SG5 Variable 8 8 15 OSD adjust control relative characteristics1 OSD adjust control characteristics2 OSD adjust control relative characteristics2 OSD adjust control characteristics3 OSD adjust control relative characteristics3 OSD input threshold voltage ∆Oaj1 0.8 1.0 1.2 Oaj2 2.8 3.3 3.8 VP-P ∆Oaj2 0.8 1.0 1.2 0 0.1 0.5 VP-P 0.8 1.0 1.2 VthOSD 2.2 2.7 3.2 V OUT OSD BLK input threshold voltage VthBLK 2.2 2.7 3.2 V OUT Retrace BLK characteristics1 HBLK1 1.7 2.0 2.3 V OUT a a a b b SG5 SG7 a 2.0 5.0 0FH HBLK2 0.7 1.0 1.3 V OUT a a a b b SG5 SG7 a 2.0 5.0 06H Retrace BLK characteristics3 HBLK3 0.1 0.4 0.7 V OUT a a a b b SG5 SG7 a 2.0 5.0 00H Retrace BLK input threshold voltage VthRET 1.0 1.5 2.0 V OUT a a a b b SG5 SG7 a 2.0 5.0 08H SOG input maximum noise voltage SS-NV SOG minimum input voltage SS-SV Sync output high level Sync output low level Sync output delay time1 VSH 4.5 4.9 5.0 V VSL 0 0.3 0.6 V TDS-F 0 60 90 ns Retrace BLK characteristics2 Oaj3 ∆Oaj3 b b b SG6 SG6 SG5 b b b SG6 SG6 SG5 b b b SG6 SG5 SG6 Variable b b b a SG1 SG6 SG5 a 8 8 8 0 Variable 15 6 0 8 Variable 0 0.01 0.02 VP-P SonG IN Sync OUT a a a a a b 2.0 5.0 SG4 Variable 0.2 0.3 VP-P SonG IN Sync OUT a a a a a b 2.0 5.0 SG4 Variable Sync OUT Sync OUT Sync OUT REJ03F0193-0201 Rev.2.01 Mar 31, 2008 Page 6 of 25 a a a a a a a a a a a a a a a b 2.0 5.0 SG4 b 2.0 5.0 SG4 b 2.0 5.0 SG4 M52743BSP Electrical Characteristics (cont.) Limits Item Symbol Min. Typ. Max. Unit Sync output delay time2 TDS-R D/A H output voltage VOH Test Point (s) CTL Voltage Input 2, 6, 11 RGB in 1 OSD BLK 4, 9 13 OSD in 19 CP in 27 ReT BLK 0 60 90 ns Sync OUT a a a a a 4.5 5.0 5.5 VDC D/A OUT a a a a a 7 SOG in BUS CTL (H) 15 00H 01H ABL Main Sub Cont Cont 1 03H 04H Sub OSD Cont Adj 3 05H BLK Adj b 2.0 5.0 SG4 02H Sub Cont 2 FFH FFH FFH FFH 00H 255 255 255 255 0 a 30 Bright 2.0 5.0 06H D/A OUT 1 07H D/A OUT 2 08H D/A OUT 3 09H D/A OUT 4 0BH INT EXT 00H FFH FFH FFH FFH 00H 0 255 255 255 255 0 00H 00H 00H VOL 0 0.5 1.0 VDC D/A OUT a a a a a a 2.0 5.0 00H 0 0 0 0 D/A output current range IAO −1.0 0.4 mA D/A OUT a a a a a a 2.0 5.0 Vari Vari Vari Vari able able able able D/A nonlinearity DNL −1.0 1.0 LSB D/A OUT a a a a a a 2.0 5.0 Vari Vari Vari Vari able able able able D/A L output voltage Electrical Characteristics Test Method ICC1 Circuit Current1 Measuring conditions are as listed in supplementary Table. Measured with a current meter at test point IA. ICC2 Circuit Current2 Measuring conditions are as listed in supplementary Table. Measured with a current meter at test point IB. Vomax Output Dynamic Range Decrease V30 gradually, and measure the voltage when the bottom of waveform output is distorted. The voltage is called VOL. Next, increase V30 gradually, and measure the voltage when the top of waveform output is distorted. The voltage is called VOH. Voltage Vomax is calculated by the equation below: Vomax = VOH − VOL (V) VOH 5.0 Waveform output VOL 0.0 Vimax Maximum Input Increase the input signal (SG2) amplitude gradually, starting from 700 mVP-P. Measure the amplitude of the input signal when the output signal starts becoming distorted. REJ03F0193-0201 Rev.2.01 Mar 31, 2008 Page 7 of 25 M52743BSP GV Maximum Gain Input SG1, and read the amplitude output at OUT (29, 32, 35). The amplitude is called VOUT (29, 32, 35). Maximum gain GV is calculated by the equation below: GV = 20log VOUT (dB) 0.7 ∆GV Relative Maximum Gain Relative maximum gain ∆GV is calculated by the equation below: ∆GV = VOUT (29) / VOUT (32), VOUT (32) / VOUT (35), VOUT (35) / VOUT (29) VC1 Main Contrast Control Characteristics1 Measuring the amplitude output at OUT (29, 32, 35). The measured value is called VOUT (29, 32, 35). Main contrast control characteristics VC1 is calculated by the equation below: VC1 = 20log VOUT (dB) 0.7 ∆VC1 Main Contrast Control Relative Characteristics1 Relative characteristics ∆VC1 is calculated by the equation below: ∆VC1 = VOUT (29) / VOUT (32) , VOUT (32) / VOUT (35) , VOUT (35) / VOUT (29) VC2 Main Contrast Control Characteristics2 Measuring condition and procedure are the same as described in VC1. ∆VC2 Main Contrast Control Relative Characteristics2 Measuring condition and procedure are the same as described in ∆VC1. VC3 Main Contrast Control Characteristics3 Measuring condition and procedure are the same as described in VC1. ∆VC3 Main Contrast Control Relative Characteristics3 Measuring condition and procedure are the same as described in ∆VC1. VSC1 Sub Contrast Control Characteristics1 Measure the amplitude output at OUT (29, 32, 35). The measured value is called VOUT (29, 32, 35). Sub contrast control characteristics VSC1 is calculated by the equation below: VSC1 = 20log VOUT (dB) 0.7 ∆VSC1 Sub Contrast Control Relative Characteristics1 Relative characteristics ∆VSC1 is calculated by the equation below: ∆VSC1 = VOUT (29) / VOUT (32), VOUT (32) / VOUT (35), VOUT (35) / VOUT (29). REJ03F0193-0201 Rev.2.01 Mar 31, 2008 Page 8 of 25 M52743BSP VSC2 Sub Contrast Control Characteristics2 Measuring condition and procedure are the same as described in VSC1. ∆VSC2 Sub Contrast Control Relative Characteristics2 Measuring condition and procedure are the same as described in ∆VSC1. VSC3 Sub Contrast Control Characteristics3 Measuring condition and procedure are the same as described in VSC1. ∆VSC3 Sub Contrast Control Relative Characteristics3 Measuring condition and procedure are the same as described in ∆VSC1. VMSC Main/sub Contrast Control Characteristics2 Measure the amplitude output at OUT (29, 32, 35). The measured value is called VOUT (29, 32, 35). Main/Sub contrast control characteristics VMSC1 is calculated by the equation below: VMSC1 = 20log VOUT (dB) 0.7 ∆VMSC Main/sub Contrast Control Relative Characteristics2 Relative characteristics ∆VMSC1 is calculated by the equation below: ∆VMSC = VOUT (29) / VOUT (32), VOUT (32) / VOUT (35), VOUT (35) / VOUT (29) ABL1 ABL Control Characteristics1 Measure the amplitude output at OUT (29, 32, 35). The measured value is called VOUT (29, 32, 35), and is treated as ABL1. ∆ABL1 ABL Control Relative Characteristics1 Relative characteristics ∆ABL1 is calculated by the equation below: ∆ABL1 = VOUT (29) / VOUT (32), VOUT (32) / VOUT (35), VOUT (35) / VOUT (29) ABL2 ABL Control Characteristics2 Measuring condition and procedure are the same as described in ABL1. ∆ABL2 ABL Control Relative Characteristics2 Measuring condition and procedure are the same as described in ∆ABL1. REJ03F0193-0201 Rev.2.01 Mar 31, 2008 Page 9 of 25 M52743BSP VB1 Brightness Control Characteristics1 Measure the DC voltage at OUT (29, 32, 35) with a voltmeter. The measured value is called VOUT (29, 32, 35), and is treated as VB1. ∆VB1 Brightness Control Relative Characteristics1 Relative characteristics ∆VB1 is calculated by the difference in the output between the channels. ∆VB1 = VOUT (29) − VOUT (32), VOUT (32) − VOUT (35), VOUT (35) − VOUT (29) VB2 Brightness Control Characteristics2 Measuring condition and procedure are the same as described in VB1. ∆VB2 Brightness Control Relative Characteristics2 Measuring condition and procedure are the same as described in ∆VB1. VB3 Brightness Control Characteristics3 Measuring condition and procedure are the same as described in VB1. ∆VB3 Brightness Control Relative Characteristics3 Measuring condition and procedure are the same as described in ∆VB1. FC1 Frequency Characteristics1 (f = 50 MHz) First, SG3 to 1 MHz is as input signal. Input a resister that is about 2 kΩ to offer the voltage at input pins (2, 6, 11) in order that the bottom of input signal is 2.5 V. Control the main contrast in order that the amplitude of sine wave output is 4.0 VP-P. Control the brightness in order that the bottom of sine wave output is 2.0 VP-P. By the same way, measure the output amplitude when SG3 to 50 MHz is as input signal. The measured value is called VOUT (29, 32, 35). Frequency characteristics FC1 (29, 32, 35) is calculated by the equation below: FC1 = 20log VOUT VP-P (dB) Output amplitude when inputted SG3 (1 MHz): 4 VP-P ∆FC1 Frequency Relative Characteristics1 (f = 50 MHz) Relative characteristics ∆FC1 is calculated by the difference in the output between the channels. FC1' Frequency Characteristics1 (f = 150 MHz) Measuring condition and procedure are the same as described in FC1, expect SG3 to 150 MHz. ∆FC1' Frequency Relative Characteristics1 (f = 150 MHz) Relative characteristics ∆FC1' is calculated by the difference in the output between the channels. FC2 Frequency Characteristics2 (f = 150 MHz) SG3 to 1 MHz is as input signal. Control the main contrast in order that the amplitude of sine wave output is 1.0 VP-P. By the same way, measure the output amplitude when SG3 to 150 MHz is as input signal. The measured value is called VOUT (29, 32, 35). Frequency characteristics FC2 (29, 32, 35) is calculated by the equation below: FC2 = 20log VOUT VP-P (dB) Output amplitude when inputted SG3 (1 MHz): 4 VP-P ∆FC2 Frequency Relative Characteristics2 (f = 150 MHz) Relative characteristics ∆FC2 is calculated by the difference in the output between the channels. REJ03F0193-0201 Rev.2.01 Mar 31, 2008 Page 10 of 25 M52743BSP C.T.1 Crosstalk1 (f = 50 MHz) Input SG3 (50 MHz) to pin 2 only, and then measure the waveform amplitude output at OUT (29, 32, 35). The measured value is called VOUT (29, 32, 35). Crosstalk C.T.1 is calculated by the equation below: C.T.1 = 20log VOUT (29, 32) VOUT (35) (dB) C.T.1' Crosstalk1 (f = 150 MHz) Measuring condition and procedure are the same as described in C.T.1, expect SG3 to 150 MHz. C.T.2 Crosstalk2 (f = 50 MHz) Input SG3 (50 MHz) to pin 6 only, and then measure the waveform amplitude output at OUT (29, 32, 35). The measured value is called VOUT (29, 32, 35). Crosstalk C.T.2 is calculated by the equation below: C.T.2 = 20log VOUT (29, 35) VOUT (32) (dB) C.T.2' Crosstalk2 (f = 150 MHz) Measuring condition and procedure are the same as described in C.T.2, expect SG3 to 150 MHz. C.T.3 Crosstalk3 (f = 50 MHz) Input SG3 (50 MHz) to pin 11 only, and then measure the waveform amplitude output at OUT (29, 32, 35). The measured value is called VOUT (29, 32, 35). Crosstalk C.T.3 is calculated by the equation below: C.T.3 = 20log VOUT (32, 35) VOUT (29) (dB) C.T.3' Crosstalk3 (f = 150 MHz) Measuring condition and procedure are the same as described in C.T.3, expect SG3 to 150 MHz. Tr Pulse Characteristics1 (4 VP-P) Control the main contrast (00H) in order that the amplitude of output signal is 4.0 VP-P. Control the brightness (V30) in order that the Black level of output signal is 2.0 V. Measure the time needed for the input pulse to rise from 10% to 90% (Tr1) and for the output pulse to rise from 10% to 90% (Tr2) with an active probe. Pulse characteristics Tr is calculated by the equations below: Tr = √ [ (Tr2)2 − (Tr1)2 ] (ns) Tf Pulse Characteristics2 (4 VP-P) Measure the time needed for the input pulse to fall from 90% to 10% (Tf1) and for the output pulse to fall from 90% to 10% (Tf2) with an active probe. Pulse characteristics Tf is calculated by the equations below: Tf = √ [ (Tf2)2 − (Tf1)2 ] (ns) 100% 90% 10% 0% Tr1 or Tr2 REJ03F0193-0201 Rev.2.01 Mar 31, 2008 Page 11 of 25 Tf1 or Tf2 M52743BSP VthCP Clamp Pulse Threshold Voltage Turn down the SG5 input level gradually from 5.0 VP-P, monitoring the waveform output. Measure the top level of input pulse when the output pedestal voltage turn decrease with unstable. WCP Clamp Pulse Minimum Width Decrease the SG5 pulse width gradually from 0.5 µs, monitoring the output. Measure the SG5 pulse width (a point of 1.5 V) when the output pedestal voltage turn decrease with unstable. PDCH Pedestal Voltage Temperature Characteristics1 Measure the pedestal voltage at 25°C. The measured value is called PDC1. Measure the pedestal voltage at temperature of −20°C. The measured value is called PDC2. Pedestal voltage temperature characteristics 1 is calculated by the equation below: PDCH = PDC1 − PDC2 PDCL Pedestal Voltage Temperature Characteristics2 Measure the pedestal voltage at 25°C. The measured value is called PDC1. Measure the pedestal voltage at temperature of 75°C. The measured value is called PDC3. Pedestal voltage temperature characteristics 2 is calculated by the equation below: PDCL = PDC1 − PDC3 OTr OSD Pulse Characteristics1 Measure the time needed for the output pulse to rise from 10% to 90% (OTr) with an active probe. OTf OSD Pulse Characteristics2 Measure the time needed for the output pulse to fall from 90% to 10% (OTf) with an active probe. Oaj1 OSD Adjust Control Characteristics1 Measure the amplitude output at OUT (29, 32, 35). The measured value is called VOUT (29, 32, 35), and is treated as Oaj1. ∆Oaj1 OSD Adjust Control Relative Characteristics1 Relative characteristics ∆Oaj1 is calculated by the equation below: ∆Oaj1 = VOUT (29) / VOUT (32), VOUT (32) / VOUT (35), VOUT (35) / VOUT (29) Oaj2 OSD Adjust Control Characteristics2 Measuring condition and procedure are the same as described in Oaj1. ∆Oaj2 OSD Adjust Control Relative Characteristics2 Measuring condition and procedure are the same as described in ∆Oaj1. REJ03F0193-0201 Rev.2.01 Mar 31, 2008 Page 12 of 25 M52743BSP Oaj3 OSD Adjust Control Characteristics3 Measuring condition and procedure are the same as described in Oaj1. ∆Oaj3 OSD Adjust Control Relative Characteristics3 Measuring condition and procedure are the same as described in ∆Oaj1. VthOSD OSD Input Threshold Voltage Reduce the SG6 input level gradually, monitoring output. Measure the SG6 level when the output reaches 0 V. The measured value is called VthOSD. VthBLK OSD BLK Input Threshold Voltage Confirm that output signal is being blanked by the SG6 at the time. Monitoring to output signal, decreasing the level of SG6. Measure the top level of SG6 when the blanking period is disappeared. The measured value is called VthBLK. HBLK1 Retrace BLK Characteristics1 Measure the amplitude output is blanked by the SG7 at OUT (29, 32, 35). The measured value is called VOUT (29, 32, 35), and is treated as HBLK1. HBLK2 Retrace BLK Characteristics2 Measure the amplitude output is blanked by the SG7 at OUT (29, 32, 35). The measured value is called VOUT (29, 32, 35), and is treated as HBLK2. HBLK3 Retrace BLK Characteristics3 Measure the amplitude output is blanked by the SG7 at OUT (29, 32, 35). The measured value is called VOUT (29, 32, 35), and is treated as HBLK3. VthRET Retrace BLK Input Threshold Voltage Confirm that output signal is being blanked by the SG7 at the time. Monitoring to output signal, decreasing the level of SG7. Measure the top level of SG7 when the blanking period is disappeared. The measured value is called VthRET. SS-NV SOG Input Maximum Noise Voltage The sync's amplitude of SG4 be changed all white into all black, increase from 0 VP-P to 0.02 VP-P. No pulse output permitted. SS-SV SOG Minimum Input Voltage The sync's amplitude of SG4 be changed all white or all black, decrease from 0.3 VP-P to 0.2 VP-P. Confirm no malfunction produced by noise. VSH Sync Output High level Measure the high voltage at SyncOUT. The measured value is treated as VSH. VSL Sync Output Low Level Measure the low voltage at SyncOUT. The measured value is treated as VSL. REJ03F0193-0201 Rev.2.01 Mar 31, 2008 Page 13 of 25 M52743BSP TDS-F Sync Output Delay Time1 SyncOUT becomes High with sync part of SG4. Measure the time needed for the front edge of SG4 sync to fall from 50% and for SyncOUT to rise from 50% with an active probe. The measured value is treated as TDS-F, less than 90 ns. TDS-R Sync Output Delay Time2 Measure the time needed for the rear edge of SG4 sync to rise from 50% and for SyncOUT to fall from 50% with an active probe. The measured value is treated as TDS-R, less than 90 ns. SG4 Pedestal voltage sync (50%) SyncOUT TDS-F (50%) TDS-R VOH D/A H Output Voltage Measure the DC voltage at D/A OUT. The measured value is treated as VOH. VOL D/A L Output Voltage Measure the DC voltage at D/A OUT. The measured value is treated as VOL. IAO D/A Output Current Range Electric current flow from the output of D/A OUT must be less than 1.0 mA. Electric current flow into the output of D/A OUT must be less than 0.4 mA. DNL D/A Nonlinearity The difference of differential non-linearity of D/A OUT must be less than ±1.0 LSB. REJ03F0193-0201 Rev.2.01 Mar 31, 2008 Page 14 of 25 M52743BSP BUS Control Table (1) Slave address D7 1 D6 0 D5 0 D4 0 D3 1 D2 0 D1 0 R/W 0 = 88H (2) Each functions sub address Bit Sub Add. Main contrast 8 00H Sub contrast R 8 01H Sub contrast G 8 02H Sub contrast B 8 03H OSD level 4 04H RE-BLK adjust 4 D/A OUT1 Function Data Byte (Up: Bit, Information Down: Preset) D7 A07 0 A17 1 A27 1 A37 1 0 D6 A06 1 A16 0 A26 0 A36 0 0 D5 A05 0 A15 0 A25 0 A35 0 0 D4 A04 0 A14 0 A24 0 A34 0 0 D3 A03 0 A13 0 A23 0 A33 0 A43 1 D2 A02 0 A12 0 A22 0 A32 0 A42 0 D1 A01 0 A11 0 A21 0 A31 0 A41 0 D0 A00 0 A10 0 A20 0 A30 0 A40 0 05H 0 0 0 0 A53 1 A52 0 A51 0 A50 0 8 06H D/A OUT2 8 07H D/A OUT3 8 08H D/A OUT4 8 09H Pedestal clamp INT/EXT SW 1 0BH A67 1 A77 1 A87 1 A97 1 0 A66 0 A76 0 A86 0 A96 0 0 A65 0 A75 0 A85 0 A95 0 0 A64 0 A74 0 A84 0 A94 0 0 A63 0 A73 0 A83 0 A93 0 0 A62 0 A72 0 A82 0 A92 0 0 A61 0 A71 0 A81 0 A91 0 0 A60 0 A70 0 A80 0 A90 0 AB0 0 Note: Pedestal level INT/EXT SW 0 → INT 1 → EXT REJ03F0193-0201 Rev.2.01 Mar 31, 2008 Page 15 of 25 M52743BSP I2C BUS Control Section SDA, SCL Characteristics Item Min. input LOW voltage Max. input HIGH voltage SCL clock frequency Time the bus must be free before a new transmission can start Hold time start condition. After this period the first clock pulse is generated The LOW period of the clock The HIGH period of the clock Set up time for start condition (Only relevant for a repeated start condition) Hold time DATA Set-up time DATA Rise time of both SDA and SCL lines Fall time of both SDA and SCL lines Set-up time for stop condition Symbol VIL VIH fSCL tBUF tHD:STA tLOW tHIGH tSU:STA tHD:DAT tSU:DAT tr tf tSU:STO Min. −0.5 3.0 0 4.7 4.0 4.7 4.0 4.7 0 250 4.0 Max. 1.5 5.5 100 1000 300 Unit V V kHz µs µs µs µs µs µs ns ns ns µs Timing Chart tBUF tr, tf VIH SDA VIL tHD: STA tSU: DAT tHD: DAT tSU: STA tSU: STO VIH SCL VIL tLOW tHIGH S REJ03F0193-0201 Rev.2.01 Mar 31, 2008 Page 16 of 25 S P S M52743BSP Input Signal SG No. Signals Pulse with amplitude of 0.7 VP-P (f = 30 kHz). Video width of 25 µs. (75%) 33 µs SG1 Video signal (all white) 8 µs 0.7 VP-P SG2 Video signal (step wave) 0.7 VP-P (Amplitude is partially variable.) SG3 Sine wave (for freq. char.) Sine wave amplitude of 0.7 VP-P f = 1 MHz, 50 MHz, 150 MHz (variable) Video width of 25 µs. (75%) SG4 Video signal (all white, all black) all white or all black variable. 0.7 VP-P 3 µs 0.3 VP-P Sync's amplitude is variable. Pulse width and amplitude are variable. 0.5 µs SG5 Clamp pulse 5 VTTL SG6 OSD pulse 5 VTTL Amplitude is partially variable. 5 µs SG7 BLK pulse 5 VTTL 5 µs Note: f = 30 kHz REJ03F0193-0201 Rev.2.01 Mar 31, 2008 Page 17 of 25 Amplitude is partially variable. M52743BSP Test Circuit OUT (35) OUT (32) V30 0 to 5 V 100 1k a 1k 1k 35 out 34 f/b 33 gnd 32 out 31 f/b 30 brt 29 out 28 f/b C/P IN b b 27 blk SG5 SDA SCL SW27 100 µH 36 12 V D/A D/A D/A D/A OUT1 OUT2 OUT3 OUT4 SG7 OUT (29) a SW19 26 dac 25 dac 24 dac 23 dac 22 21 gnd sda 20 scl 19 c/p 12 V osd 12 13 gnd 14 abl 15 5V 17 sync 18 M52743BSP blk 1 R 2 12 V osd gnd 3 4 5 G 6 SonG 12 V osd gnd 7 8 9 10 B 11 100 k IN (6) SONG IN IN (2) 3.3 µ 0.01 µ 3.3 µ 0.01 µ + SW1 SW2 a ba + SW4 a b b SW6 SW7 a ba NC 16 + 47 µ IN (11) SYNC OUT 3.3 µ 0.01 µ + + 1µ SW9 a b b SW11 a V15 0 to 5 V SW13 a b 1k b A IB 5V + IA A 47 µ SG6 SG1 SG2 SG3 12 V SG4 : Measure point Condenser: 0.01 µF (unless otherwise specified.) Units Resistance: Ω Capacitance: F Typical Characteristics Main Contrast Control Characteristics Thermal Derating 6 2403 2400 2000 1600 1442 1200 800 400 0 −20 0 25 50 75 100 125 150 Ambient Temperature Ta (°C) REJ03F0193-0201 Rev.2.01 Mar 31, 2008 Page 18 of 25 Output Amplitude (VP-P) Power Dissipation Pd (mW) 2800 5 4 3 2 1 Sub contrast: Max 0 00H FFH Main Contrast Control Data M52743BSP 6 6 5 5 4 3 2 1 Main contrast: Max 3 2 1 FFH 0 4 5 OSD Adjust Control Characteristics 5 5 4 3 2 1 Main contrast: Max Sub contrast: Max 0 1 2 3 4 5 Sync on Green input Min. Pulse Width 12 (Video duty = 75%) 10 7 8 1µ + 6 IN 100 k 4 Sync separate normal operating range 0 0.1 0.2 0.3 0.4 Input Sync Amplitude (VP-P) REJ03F0193-0201 Rev.2.01 Mar 31, 2008 Page 19 of 25 4 3 2 1 0 0H FH OSD Adjust Control Data ABL Control Voltage (VDC) 0 3 ABL Characteristics 6 2 2 Brightness Control Voltage (VDC) 6 0 1 Sub Contrast Control Data Output Amplitude (VP-P) Output Amplitude (VP-P) 4 0 0 00H Sync Duty (%) Brightness Control Characteristics Output DC Voltage (VDC) Output Amplitude (VP-P) Sub Contrast Control Characteristics 0.5 M52743BSP Application Example 110 V CRT Cut off Adj DAC OUT × 4 5 VTTL 1k BLK IN (for retrace) SDA 1k 1k 0 to 5 V 100 100 µH SCL 0.01 µ 36 35 34 33 32 31 30 Clamp pulse IN 0.01 µ 0.01 µ 0.01 µ 0.01 µ 29 28 27 26 25 24 23 22 11 12 13 14 15 21 20 19 16 17 18 M52743BSP 3 4 5 6 7 0.01 µ + 47 µ + 75 10 0.01 µ 47 µ 0.01 µ 3.3 µ 9 0.01 µ 1µ + + 3.3 µ 0.01 µ 8 100 k NC + 2 + 1 0.01 µ 47 µ ABL IN 0 to 5 V 1k Sync Sep OUT + 3.3 µ 75 75 5 VTTL 5 VTTL 5 VTTL OSD IN (B) OSD IN (G) OSD IN (R) BLK IN (for OSD) 5 VTTL 0.01 µ + 12 V 5V INPUT (R) INPUT * (G) SONG INPUT INPUT (B) + 47 µ Units Resistance: Ω Capacitance: F * Circuit example of pin 6 and pin 7 same signal input note: Feed back is internal feed back REJ03F0193-0201 Rev.2.01 Mar 31, 2008 Page 20 of 25 M52743BSP Pin Description Pin No. 1 Name OSD BLK IN DC Voltage (V) Peripheral Circuit Function Input pulses R 3.7 to 5 V G 1 1.7 V maximum B Connected to GND if not used. 2.7 V 0.8 mA 2 6 11 INPUT (R) INPUT (G) INPUT (R) 2.5 2k Clamped to about 2.5 V due to clamp pulses from pin 19. Input at low impedance. 2k 2 CP 0.3 mA 3 8 12 4 9 13 VCC1 (R) VCC1 (G) VCC1 (B) 12 OSD IN (R) OSD IN (G) OSD IN (B) 2.5 V Apply equivalent voltage to 3 channels. Input pulses 3.7 to 5 V 1k 1.7 V maximum 4 Connected to GND if not used. 0.5 mA 5 10 14 22 33 7 GND 1 (R) GND 1 (G) GND 1 (B) GND (5 V) GND 2 INPUT (S on G) 2.7 V GND When open ≈ 2.5 V 500 1k 3.2 V 7 REJ03F0193-0201 Rev.2.01 Mar 31, 2008 Page 21 of 25 SYNC ON GREEN Input pin for sync separation. Sync is negative. Input signal at pin 7, compare with the reference voltage of internal circuit in order to separate sync signal. When not used, set to OPEN. M52743BSP Pin Description (cont.) Pin No. 15 Name ABL IN DC Voltage (V) When open 2.5 V Peripheral Circuit Function 2.5 V 20 k 1.2 k 1.2 k 30 k ABL (Automatic Beam Limiter) input pin. Recommended voltage range is 0 to 5 V. When ABL function is not used, set to 5 V. 0.5 mA 15 16 17 18 NC VCC (5 V) 5 S on G Sep OUT 19 Clamp Pulse IN Sync signal output pin, Being of open collector output type. 18 Input pulses 41 k 2.5 to 5 V 0.5 V maximum 19 Input at low impedance. 2.2 V 20 SCL 0.15 mA SCL of I2C BUS (Serial clock line) VTH = 2.3 V 50 k 20 2k 3V 21 SDA SDA of I2C BUS (Serial data line) VTH = 2.3 V 50 k 21 2k 3V REJ03F0193-0201 Rev.2.01 Mar 31, 2008 Page 22 of 25 M52743BSP Pin Description (cont.) Pin No. 23 24 25 26 27 Name D/A OUT DC Voltage (V) Peripheral Circuit Function D/A output pin. Output voltage range is 0 to 5 V, Max output current is 0.4 mA. 23 Retrace BLK IN Input pulses 50 k 2.25 V 31 34 EXT Feed Back (B) EXT Feed Back (G) EXT Feed Back (R) 0.5 V maximum B 27 28 2.5 to 5 V R G Connected to GND if not used. Variable 35 k 28 29 32 35 OUTPUT (B) OUTPUT (G) OUTPUT (R) Variable 36 50 50 29 36 VCC2 30 Main Brightness 12 Impressed Used to supply power to output emitter follower only. It is recommended that the IC be used between pedestal voltage 2 V and 3 V. 35 k 30 REJ03F0193-0201 Rev.2.01 Mar 31, 2008 Page 23 of 25 A resistor is needed on the GND side. Set discretionally to maximum 15 mA, depending on the required driving capacity. M52743BSP Application Method for M52743BSP Clamp Pulse Input Clamp pulse width is recommended above 15 kHz, 1.0 µs above 30 kHz, 0.5 µs above 64 kHz, 0.3 µs. The clamp pulse circuit in ordinary set is a long round about way, and beside high voltage, sometimes connected to external terminal, it is very easy affected by large surge. Therefore, the Figure shown right is recommended. 19 EXT-Feed Back In case of application circuit example of lower figure, Set up R1, R2 which seems that the black level of the signal feed backed from Power AMP is 1 V, when the bottom of output signal is 1 V. Pre Amp input R Power Amp Power Amp out + Main brightness DC: 1 to 5 V M52743BSP R output Black level 1 to 5 V R Feed back Black level 1 to 5 V R1 R2 EXT-Feed Back Application Circuit Notice of Application • Make the nearest distance between output pin and pull down resister. • Recommended pedestal voltage of IC output signal is 2 V. REJ03F0193-0201 Rev.2.01 Mar 31, 2008 Page 24 of 25 M52743BSP Package Dimensions 36P4E Plastic 36pin 500mil SDIP JEDEC Code — Weight(g) 3.0 Lead Material Cu Alloy 19 1 18 E 36 e1 c EIAJ Package Code SDIP36-P-500-1.78 Symbol L A1 A A2 D e SEATING PLANE REJ03F0193-0201 Rev.2.01 Mar 31, 2008 Page 25 of 25 b1 b b2 A A1 A2 b b1 b2 c D E e e1 L Dimension in Millimeters Min Nom Max 5.08 — — 0.51 — — 3.8 — — 0.4 0.5 0.6 0.9 1.0 1.3 0.65 0.75 1.05 0.22 0.27 0.34 31.3 31.5 31.7 10.85 11.0 11.15 1.778 — — 12.7 — — 3.0 — — 0° 15° — Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Notes: 1. This document is provided for reference purposes only so that Renesas customers may select the appropriate Renesas products for their use. Renesas neither makes warranties or representations with respect to the accuracy or completeness of the information contained in this document nor grants any license to any intellectual property rights or any other rights of Renesas or any third party with respect to the information in this document. 2. Renesas shall have no liability for damages or infringement of any intellectual property or other rights arising out of the use of any information in this document, including, but not limited to, product data, diagrams, charts, programs, algorithms, and application circuit examples. 3. You should not use the products or the technology described in this document for the purpose of military applications such as the development of weapons of mass destruction or for the purpose of any other military use. When exporting the products or technology described herein, you should follow the applicable export control laws and regulations, and procedures required by such laws and regulations. 4. All information included in this document such as product data, diagrams, charts, programs, algorithms, and application circuit examples, is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas products listed in this document, please confirm the latest product information with a Renesas sales office. Also, please pay regular and careful attention to additional and different information to be disclosed by Renesas such as that disclosed through our website. (http://www.renesas.com ) 5. Renesas has used reasonable care in compiling the information included in this document, but Renesas assumes no liability whatsoever for any damages incurred as a result of errors or omissions in the information included in this document. 6. When using or otherwise relying on the information in this document, you should evaluate the information in light of the total system before deciding about the applicability of such information to the intended application. Renesas makes no representations, warranties or guaranties regarding the suitability of its products for any particular application and specifically disclaims any liability arising out of the application and use of the information in this document or Renesas products. 7. With the exception of products specified by Renesas as suitable for automobile applications, Renesas products are not designed, manufactured or tested for applications or otherwise in systems the failure or malfunction of which may cause a direct threat to human life or create a risk of human injury or which require especially high quality and reliability such as safety systems, or equipment or systems for transportation and traffic, healthcare, combustion control, aerospace and aeronautics, nuclear power, or undersea communication transmission. If you are considering the use of our products for such purposes, please contact a Renesas sales office beforehand. Renesas shall have no liability for damages arising out of the uses set forth above. 8. Notwithstanding the preceding paragraph, you should not use Renesas products for the purposes listed below: (1) artificial life support devices or systems (2) surgical implantations (3) healthcare intervention (e.g., excision, administration of medication, etc.) (4) any other purposes that pose a direct threat to human life Renesas shall have no liability for damages arising out of the uses set forth in the above and purchasers who elect to use Renesas products in any of the foregoing applications shall indemnify and hold harmless Renesas Technology Corp., its affiliated companies and their officers, directors, and employees against any and all damages arising out of such applications. 9. You should use the products described herein within the range specified by Renesas, especially with respect to the maximum rating, operating supply voltage range, movement power voltage range, heat radiation characteristics, installation and other product characteristics. Renesas shall have no liability for malfunctions or damages arising out of the use of Renesas products beyond such specified ranges. 10. Although Renesas endeavors to improve the quality and reliability of its products, IC products have specific characteristics such as the occurrence of failure at a certain rate and malfunctions under certain use conditions. Please be sure to implement safety measures to guard against the possibility of physical injury, and injury or damage caused by fire in the event of the failure of a Renesas product, such as safety design for hardware and software including but not limited to redundancy, fire control and malfunction prevention, appropriate treatment for aging degradation or any other applicable measures. Among others, since the evaluation of microcomputer software alone is very difficult, please evaluate the safety of the final products or system manufactured by you. 11. In case Renesas products listed in this document are detached from the products to which the Renesas products are attached or affixed, the risk of accident such as swallowing by infants and small children is very high. You should implement safety measures so that Renesas products may not be easily detached from your products. Renesas shall have no liability for damages arising out of such detachment. 12. This document may not be reproduced or duplicated, in any form, in whole or in part, without prior written approval from Renesas. 13. Please contact a Renesas sales office if you have any questions regarding the information contained in this document, Renesas semiconductor products, or if you have any other inquiries. http://www.renesas.com RENESAS SALES OFFICES Refer to "http://www.renesas.com/en/network" for the latest and detailed information. Renesas Technology America, Inc. 450 Holger Way, San Jose, CA 95134-1368, U.S.A Tel: <1> (408) 382-7500, Fax: <1> (408) 382-7501 Renesas Technology Europe Limited Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K. Tel: <44> (1628) 585-100, Fax: <44> (1628) 585-900 Renesas Technology (Shanghai) Co., Ltd. Unit 204, 205, AZIACenter, No.1233 Lujiazui Ring Rd, Pudong District, Shanghai, China 200120 Tel: <86> (21) 5877-1818, Fax: <86> (21) 6887-7858/7898 Renesas Technology Hong Kong Ltd. 7th Floor, North Tower, World Finance Centre, Harbour City, Canton Road, Tsimshatsui, Kowloon, Hong Kong Tel: <852> 2265-6688, Fax: <852> 2377-3473 Renesas Technology Taiwan Co., Ltd. 10th Floor, No.99, Fushing North Road, Taipei, Taiwan Tel: <886> (2) 2715-2888, Fax: <886> (2) 3518-3399 Renesas Technology Singapore Pte. Ltd. 1 Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632 Tel: <65> 6213-0200, Fax: <65> 6278-8001 Renesas Technology Korea Co., Ltd. Kukje Center Bldg. 18th Fl., 191, 2-ka, Hangang-ro, Yongsan-ku, Seoul 140-702, Korea Tel: <82> (2) 796-3115, Fax: <82> (2) 796-2145 Renesas Technology Malaysia Sdn. Bhd Unit 906, Block B, Menara Amcorp, Amcorp Trade Centre, No.18, Jln Persiaran Barat, 46050 Petaling Jaya, Selangor Darul Ehsan, Malaysia Tel: <603> 7955-9390, Fax: <603> 7955-9510 © 2008. Renesas Technology Corp., All rights reserved. Printed in Japan. Colophon .7.2