±40V Fault Protected, 3.3V to 5V, ±15V Common Mode Range, RS-485/RS-422 Transceivers With Cable Invert and ±15kV ESD ISL32430E, ISL32432E, ISL32433E, ISL32435E, ISL32437E The ISL32430E through ISL32437E are 3.3V to 5V powered, fault Features protected, extended common mode range differential transceivers for balanced communication. The RS-485 bus pins (driver outputs and receiver inputs) are protected against overvoltages up to ±40V, and against ±15kV ESD strikes. Additionally, these transceivers operate in environments with common mode voltages up to ±15V (exceeds the RS-485 requirement), making this RS-485 family one of the more robust on the market. • Fault Protected RS-485 Bus Pins . . . . . . . . . . . . . . up to ±40V Transmitters are RS-485 compliant with VCC ≥ 4.5V and deliver a 1.1V differential output voltage into the RS-485 specified 54Ω load even with VCC = 3V. • Cable Invert Pin (ISL32437E Only) Corrects for Reversed Cable Connections While Maintaining Rx Full Fail-safe Functionality Receiver (Rx) inputs feature a “Full Fail-Safe” design, which ensures a logic high Rx output if Rx inputs are floating, shorted, or on a terminated but undriven (idle) bus. Rx full fail-safe operation is maintained even when the Rx input polarity is switched (cable invert function on ISL32437E). The ISL32437E includes a cable invert function that reverses the polarity of the Rx and Tx bus pins in case the cable is misconnected during installation. See Table 1 on page 2 for key features and configurations by device number. Related Literature • Extended Common Mode Range . . . . . . . . . . . . . . . . . . . ±15V Larger Than Required for RS-485 • ±15kV HBM ESD Protection on RS-485 Bus Pins • Wide Supply Range . . . . . . . . . . . . . . . . . . . . . . . . . 3V to 5.5V • 1/4 Unit Load for up to 128 Devices on the Bus • High Transient Overvoltage Tolerance . . . . . . . . . . . . . . . ±60V • Full Fail-safe (Open, Short, Terminated) RS-485 Receivers • Choice of RS-485 Data Rates . . . . . . . . . . . . 250kbps or 1Mbps • Low Quiescent Supply Current . . . . . . . . . . . . . . . . . . . 2.1mA Ultra Low Shutdown Supply Current . . . . . . . . . . . . . . . 10µA • Pb-Free (RoHS Compliant) Applications • Utility Meters/Automated Meter Reading Systems • Air Conditioning Systems • See FN7921, “ISL32450E, ISL32452E, ISL32453E, ISL32455E, ISL32457E: ±60V Fault Protected, 3.3V to 5V, ±20V Common Mode Range, RS-485/RS-422 Transceivers with Cable Invert and ±15kV ESD” • Security Camera Networks • Building Lighting and Environmental Control Systems • Industrial/Process Control Networks 20 VOLTAGE (V) 15 B VID = ±1V 2Mbps 10 5 RO 0 15 COMMON MODE RANGE (V) VCC = 3V A 12 0 -7 -15 STANDARD RS-485 TRANSCEIVER TIME (200ns/DIV) FIGURE 1. EXCEPTIONAL ISL32433E RX OPERATES AT >1Mbps EVEN WITH ±15V COMMON MODE VOLTAGE March 1, 2012 FN7920.0 1 ISL3243XE FIGURE 2. TRANSCEIVERS DELIVER SUPERIOR COMMON MODE RANGE vs STANDARD RS-485 DEVICES CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas Inc. 2012. All Rights Reserved Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners. ISL32430E, ISL32432E, ISL32433E, ISL32435E, ISL32437E TABLE 1. SUMMARY OF FEATURES HALF/FULL DUPLEX DATA RATE (Mbps) SLEW-RATE LIMITED? EN PINS? HOT PLUG CABLE INVERT (INV) PIN? QUIESCENT ICC (mA) LOW POWER SHDN? PIN COUNT ISL32430E Full 0.25 Yes Yes No No 2.1 Yes 10, 14 ISL32432E Half 0.25 Yes Yes No No 2.1 Yes 8 ISL32433E Full 1 Yes Yes No No 2.1 Yes 10, 14 ISL32435E Half 1 Yes Yes No No 2.1 Yes 8 ISL32437E Half 0.25 Yes Tx Only No Yes 2.1 No 8 PART NUMBER Ordering Information PART NUMBER (Notes 1, 2, 3) PART MARKING TEMP. RANGE (°C) PACKAGE (Pb-Free) PKG. DWG. # ISL32430EIBZ ISL32430 EIBZ -40 to +85 14 Ld SOIC M14.15 ISL32430EIUZ 2430E -40 to +85 10 Ld MSOP M10.118 ISL32432EIBZ 32432 EIBZ -40 to +85 8 Ld SOIC M8.15 ISL32432EIUZ 2432E -40 to +85 8 Ld MSOP M8.118 ISL32433EIBZ ISL32433 EIBZ -40 to +85 14 Ld SOIC M14.15 ISL32433EIUZ 2433E -40 to +85 10 Ld MSOP M10.118 ISL32435EIBZ 32435 EIBZ -40 to +85 8 Ld SOIC M8.15 ISL32435EIUZ 2435E -40 to +85 8 Ld MSOP M8.118 ISL32437EIBZ 32437 EIBZ -40 to +85 8 Ld SOIC M8.15 ISL32437EIUZ 2437E -40 to +85 8 Ld MSOP M8.118 NOTES: 1. Add “-T*” suffix for tape and reel. Please refer to TB347 for details on reel specifications. 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), please see device information page for ISL32430E, ISL32432E, ISL32433E, ISL32435E, ISL32437E. For more information on MSL please see tech brief TB363. Pin Configurations ISL32430E, ISL32433E (14 LD SOIC) TOP VIEW NC 1 RO 2 R RE 3 DE 4 DI 5 D (10 LD MSOP) TOP VIEW 14 VCC RO 1 13 NC RE 2 12 A DE 3 11 B DI 4 10 Z GND 5 GND 6 9 Y GND 7 8 NC 2 ISL32430E, ISL32433E R 10 VCC 9 A 8 B D 7 Z 6 Y FN7920.0 March 1, 2012 ISL32430E, ISL32432E, ISL32433E, ISL32435E, ISL32437E Pin Configurations (Continued) ISL32437E (8 LD SOIC, 8 LD MSOP) TOP VIEW ISL32432E, ISL32435E (8 LD SOIC, 8 LD MSOP) TOP VIEW RO 1 8 VCC RO 1 RE 2 7 B/Z DE 3 6 A/Y 5 GND DI 4 R D DI 4 8 VCC INV 2 7 B/Z DE 3 6 A/Y 5 GND R D Truth Tables RECEIVING INPUTS TRANSMITTING INPUTS OUTPUTS RE DE DI INV (Note 4) Y Z X 1 1 0 1 0 X 1 0 0 0 1 X 1 1 1 0 1 X 1 0 1 1 0 0 0 X X High-Z High-Z 1 0 X X High-Z* High-Z* NOTES: 4. Parts without the INV pin follow the rows with INV = “0” and “X”. *Low Power Shutdown Mode (See Notes 13 and 18). OUTPUT RE (Note 18) DE (Half Duplex) DE (Full Duplex) A-B INV (Note 4) RO 0 0 X ≥ -0.01V 0 1 0 0 X ≤ -0.2V 0 0 0 0 X ≤ 0.01V 1 1 0 0 X ≥ 0.2V 1 0 0 0 X Inputs Open or Shorted X 1 1 0 0 X X High-Z* 1 1 1 X X High-Z NOTE: *Low Power Shutdown Mode (See Notes 13 and 18). Pin Descriptions PIN NUMBER PIN NAME ISL32430E, ISL32430E, ISL32433E, ISL32433E, ISL32432E, 14 LD SOIC 10 LD MSOP ISL32435E ISL32437E FUNCTION RO 2 1 1 1 Receiver output. For parts without the cable invert function - or if INV is low - then: If A - B ≥ -10mV, RO is high; if A - B ≤ -200mV, RO is low. If INV is high, then: If B - A ≥ -10mV, RO is high; if B - A ≤ -200mV, RO is low. In all cases, RO = High if A and B are unconnected (floating), or shorted together, or connected to an undriven, terminated bus (i.e., Rx is always failsafe open, shorted, and idle, even if polarity is inverted). RE 3 2 2 N/A Receiver output enable. RO is enabled when RE is low; RO is high impedance when RE is high. Internally pulled low. DE 4 3 3 3 Driver output enable. The driver outputs, Y and Z, are enabled by bringing DE high, and they are high impedance when DE is low. Internally pulled high. DI 5 4 4 4 Driver input. For parts without the cable invert function - or if INV is low - a low on DI forces output Y low and output Z high, while a high on DI forces output Y high and output Z low. The output states, relative to DI, invert if INV is high. GND 6, 7 5 5 5 Ground connection. A/Y N/A N/A 6 6 ±40V Fault Protected and ±15kV ESD protected RS-485/RS-422 I/O pin. For parts without the cable invert function - or if INV is low - A/Y is the non-inverting receiver input and non-inverting driver output. If INV is high, A/Y is the inverting receiver input and the inverting driver output. Pin is an input if DE = 0; pin is an output if DE = 1. 3 FN7920.0 March 1, 2012 ISL32430E, ISL32432E, ISL32433E, ISL32435E, ISL32437E Pin Descriptions (Continued) PIN NUMBER PIN NAME ISL32430E, ISL32430E, ISL32433E, ISL32433E, ISL32432E, 14 LD SOIC 10 LD MSOP ISL32435E ISL32437E FUNCTION B/Z N/A N/A 7 7 A 12 9 N/A N/A ±40V Fault Protected and ±15kV ESD protected RS-485/RS-422 non-inverting receiver input. B 11 8 N/A N/A ±40V Fault Protected and ±15kV ESD protected RS-485/RS-422 inverting receiver input. Y 9 6 N/A N/A ±40V Fault Protected and ±15kV ESD protected RS-485/RS-422 non-inverting driver output. Z 10 7 N/A N/A ±40V Fault Protected and ±15kV ESD protected RS-485/RS-422 inverting driver output. VCC 14 10 8 8 System power supply input (3V to 5.5V). INV N/A N/A N/A 2 Receiver and driver Cable Invert (polarity selection) input. When driven high this pin swaps the polarity of the driver output and receiver input pins. If unconnected (floating) or connected low, normal RS-485 polarity conventions apply. Internally pulled low. NC 1, 8, 13 N/A N/A N/A 4 ±40V Fault Protected and ±15kV ESD protected RS-485/RS-422 I/O pin. For parts without the cable invert function - or if INV is low - B/Z is the inverting receiver input and inverting driver output. If INV is high, B/Z is the non-inverting receiver input and the non-inverting driver output. Pin is an input if DE = 0; pin is an output if DE = 1. No Internal Connection. FN7920.0 March 1, 2012 ISL32430E, ISL32432E, ISL32433E, ISL32435E, ISL32437E Typical Operating Circuits ISL32430E, ISL32433E FULL DUPLEX NETWORK +3.3V +3.3V + 14 VCC 2 RO 0.1µF 14 9 Y VCC RT A 12 R 0.1µF + 10 Z B 11 D DI 5 3 RE DE 4 4 DE RE 3 5 DI RT Z 10 11 B Y 9 D GND 6, 7 RO 2 R 12 A GND 6, 7 SOIC PINOUT SHOWN ISL32432E, ISL32435E HALF DUPLEX NETWORK +3.3V +3.3V + 8 0.1µF VCC 1 RO 8 VCC R D 2 RE B/Z 7 3 DE A/Y 6 4 DI 0.1µF + RT RT DI 4 7 B/Z DE 3 6 A/Y RE 2 RO 1 R D GND 5 GND 5 ISL32437E HALF DUPLEX NETWORK USING CABLE INVERT FUNCTION +3.3V +3.3V + 8 0.1µF 0.1µF + 8 VCC VCC 2 INV 1 RO R A/Y 6 B/Z 7 RT RT 7 B/Z 6 A/Y RO 1 R DE 3 3 DE 4 DI D D GND 5 5 THE IC ON THE LEFT HAS THE CABLE CONNECTIONS SWAPPED, SO THE INV PIN IS STRAPPED HIGH TO INVERT THE RX AND TX POLARITY GND DI 4 INV 2 5 FN7920.0 March 1, 2012 ISL32430E, ISL32432E, ISL32433E, ISL32435E, ISL32437E Absolute Maximum Ratings Thermal Information VCC to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V Input Voltages DI, DE, RE, INV. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VCC + 0.3V Input/Output Voltages A/Y, B/Z, A, B, Y, Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50V A/Y, B/Z, A, B, Y, Z (Transient Pulse Through 100Ω, Note 5) . . . . . . . . . . . . . . . . . . . ±60V RO. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to (VCC +0.3V) Short Circuit Duration Y, Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Indefinite ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see Specification Table Latch-up (per JESD78, Level 2, Class A) . . . . . . . . . . . . . . . . . . . . . +125°C Thermal Resistance (Typical) θJA (°C/W) θJC (°C/W) 8 Ld SOIC Package (Notes 6, 7) . . . . . . . . . . 108 47 8 Ld MSOP Package (Notes 6, 7) . . . . . . . . . 140 40 10 Ld MSOP Package (Notes 6, 7) . . . . . . . . 135 50 14 Ld SOIC Package (Notes 6, 7) . . . . . . . . . 88 39 Maximum Junction Temperature (Plastic Package). . . . . . . . . . . . . . . +150°C Maximum Storage Temperature Range . . . . . . . . . . . . . . . -65°C to +150°C Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp Recommended Operating Conditions Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.3V or 5V Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C Bus Pin Common Mode Voltage Range. . . . . . . . . . . . . . . . . . -15V to +15V CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTES: 5. Tested according to TIA/EIA-485-A, Section 4.2.6 (±60V for 15µs at a 1% duty cycle). 6. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details. 7. For θJC, the “case temp” location is taken at the package top center. Electrical Specifications Test Conditions: VCC = 3V to 3.6V and 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at the worst case of VCC = 5V or VCC = 3.3V, TA = +25°C (Note 8). Boldface limits apply over the operating temperature range, -40°C to +85°C. PARAMETER TEMP (°C) MIN (Note 16) TYP MAX (Note 16) UNITS Full - - VCC V RL = 100Ω (RS-422), VCC ≥ 4.5V Full 2 3 - V RL = 54Ω (RS-485) VCC ≥ 4.5V Full 1.7 2.3 - V VCC = 3.3V Full 1.35 1.42 - V VCC ≥ 3V Full 1.1 1.3 - V SYMBOL TEST CONDITIONS DC CHARACTERISTICS Driver Differential VOUT (No load) VOD1 Driver Differential VOUT (Loaded, Figure 3A) VOD2 Change in Magnitude of Driver Differential VOUT for Complementary Output States ΔVOD RL = 54Ω or 100Ω (Figure 3A) Full - - 0.2 V Driver Differential VOUT with Common Mode Load (Figure 3B) VOD3 RL = 60Ω, -15V ≤ VCM ≤ 15V, VCC ≥ 4.5V Full 1.5 - - V Driver Common-Mode VOUT (Figure 3A) VOC RL = 54Ω or 100Ω Full -1 - 3 V Change in Magnitude of Driver Common-Mode VOUT for Complementary Output States ΔVOC RL = 54Ω or 100Ω (Figure 3A) Full - - 0.2 V Driver Short-Circuit Current IOSD DE = VCC, -15V ≤ VO ≤ 15V (Note 10) Full -250 - 250 mA IOSD1 At First Fold-back, 24V ≤ VO ≤ -24V Full -83 - 83 mA IOSD2 At Second Fold-back, 35V ≤ VO ≤ -35V Full -13 - 13 mA Logic Input High Voltage VIH DE, DI, RE, INV (See Figure 25) Full 2.35 - - V Logic Input Low Voltage VIL DE, DI, RE, INV Full - - 0.8 V Logic Input Current IIN1 DI Full -1 - 1 µA DE, RE, INV Full -15 6 15 µA 6 FN7920.0 March 1, 2012 ISL32430E, ISL32432E, ISL32433E, ISL32435E, ISL32437E Electrical Specifications Test Conditions: VCC = 3V to 3.6V and 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at the worst case of VCC = 5V or VCC = 3.3V, TA = +25°C (Note 8). Boldface limits apply over the operating temperature range, -40°C to +85°C. (Continued) PARAMETER TEMP (°C) MIN (Note 16) TYP MAX (Note 16) UNITS Full - - 250 µA Full -200 - - µA VIN = ±15V Full -800 - 850 µA VIN = ±40V, (Note 17) Full -6 - 6 mA VIN = 12V Full - - 125 µA VIN = -7V Full -100 - - µA VIN = ±15V Full -500 - 500 µA VIN = ±40V, (Note 17) Full -3 - 3 mA VIN = 12V Full - - 200 µA VIN = -7V Full -100 - - µA VIN = ±15V Full -500 - 500 µA VIN = ±40V, (Note 17) Full -3 - 3 mA VCC ≤ 3.6V -15V ≤ VCM ≤ 15V, (For ISL32437E only, VCC ≥ 4.5V A-B if INV = 0; B-A if INV = 1) Full -200 -120 -10 mV Full -250 -180 -10 mV +25 - 30 - mV IO = -4mA, VCC ≥ 3V Full 2.4 - - V IO = -8mA, VCC ≥ 4.5V Full 2.4 - - V IO = 4mA, VCC ≥ 3V, VID = -200mV Full - - 0.4 V IO = 5mA, VCC ≥ 4.5V, VID = -250mV Full - - 0.4 V SYMBOL Input/Output Current (A/Y, B/Z) IIN2 Input Current (A, B) (Full Duplex Versions Only) IIN3 Output Leakage Current (Y, Z) (Full Duplex Versions Only) IOZD TEST CONDITIONS DE = 0V, VCC = 0V or VIN = 12V 3.6V or 5.5V VIN = -7V VCC = 0V or 3.6V or 5.5V RE = 0V, DE = 0V, VCC = 0V or 3.6V or 5.5V Receiver Differential Threshold Voltage VTH Receiver Input Hysteresis ΔVTH -15V ≤ VCM ≤ 15V Receiver Output High Voltage VOH1 VID = -10mV VOH2 Receiver Output Low Voltage VOL Three-State (High Impedance) Receiver Output Current (Note 18) IOZR 0V ≤ VO ≤ VCC Full -1 0.01 1 µA Receiver Short-Circuit Current IOSR 0V ≤ VO ≤ VCC Full - - ±115 mA DE = VCC, RE = 0V or VCC, DI = 0V or VCC Full - 2.1 4.5 mA DE = 0V, RE = VCC, DI = 0V or VCC Full - 10 35 µA Human Body Model (Tested per JESD22-A114E) +25 - ±8 - kV Machine Model (Tested per JESD22-A115-A) +25 - ±700 - V Human Body Model, Full Duplex From Bus Pins to Half Duplex GND +25 - ±15 - kV +25 - ±16.5 - kV SUPPLY CURRENT No-Load Supply Current (Note 9) ICC Shutdown Supply Current (Note 18) ISHDN ESD PERFORMANCE All Pins RS-485 Pins (A, B, Y, Z, A/Y, B/Z) DRIVER SWITCHING CHARACTERISTICS (250kbps Versions; ISL32430E, ISL32432E, ISL32437E) Driver Differential Output Delay tPLH, tPHL RD = 54Ω, CD = 50pF (Figure 4) Full - 280 1000 ns Driver Differential Output Skew tSKEW RD = 54Ω, CD = 50pF (Figure 4) Full - 4 100 ns Driver Differential Rise or Fall Time tR, tF RD = 54Ω, CD = 50pF (Figure 4) Full 250 650 1500 ns Maximum Data Rate fMAX CD = 820pF (Figure 6) Full 250 - - kbps SW = GND (Figure 5), (Note 11) Full - - 1600 ns Driver Enable to Output High tZH 7 FN7920.0 March 1, 2012 ISL32430E, ISL32432E, ISL32433E, ISL32435E, ISL32437E Electrical Specifications Test Conditions: VCC = 3V to 3.6V and 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at the worst case of VCC = 5V or VCC = 3.3V, TA = +25°C (Note 8). Boldface limits apply over the operating temperature range, -40°C to +85°C. (Continued) PARAMETER SYMBOL TEST CONDITIONS TEMP (°C) MIN (Note 16) TYP MAX (Note 16) UNITS Driver Enable to Output Low tZL SW = VCC (Figure 5), (Note 11) Full - - 1600 ns Driver Disable from Output Low tLZ SW = VCC (Figure 5) Full - - 300 ns Driver Disable from Output High tHZ SW = GND (Figure 5) Full - - 300 ns (Notes 13, 18) Full 60 160 600 ns Time to Shutdown tSHDN Driver Enable from Shutdown to Output High tZH(SHDN) SW = GND (Figure 5), (Notes 13, 14, 18) Full - - 3000 ns Driver Enable from Shutdown to Output Low tZL(SHDN) SW = VCC (Figure 5), (Notes 13, 14, 18) Full - - 3000 ns DRIVER SWITCHING CHARACTERISTICS (1Mbps Versions; ISL32433E and ISL32435E) Driver Differential Output Delay tPLH, tPHL RD = 54Ω, CD = 50pF (Figure 4) Full - 70 200 ns Driver Differential Output Skew tSKEW RD = 54Ω, CD = 50pF (Figure 4) Full - 4 25 ns Driver Differential Rise or Fall Time tR, tF RD = 54Ω, CD = 50pF (Figure 4) Full 50 130 300 ns Maximum Data Rate fMAX CD = 820pF (Figure 6) Full 1 - - Mbps Driver Enable to Output High tZH SW = GND (Figure 5), (Note 11) Full - - 300 ns Driver Enable to Output Low tZL SW = VCC (Figure 5), (Note 11) Full - - 300 ns Driver Disable from Output Low tLZ SW = VCC (Figure 5) Full - - 300 ns Driver Disable from Output High tHZ SW = GND (Figure 5) Full - - 300 ns (Note 13) Full 60 160 600 ns Time to Shutdown tSHDN Driver Enable from Shutdown to Output High tZH(SHDN) SW = GND (Figure 5), (Notes 13, 14) Full - - 3000 ns Driver Enable from Shutdown to Output Low tZL(SHDN) SW = VCC (Figure 5), (Notes 13, 14) Full - - 3000 ns RECEIVER SWITCHING CHARACTERISTICS (250kbps Versions; ISL32430E, ISL32432E, ISL32437E) Maximum Data Rate Receiver Input to Output Delay Receiver Skew |tPLH - tPHL | fMAX (Figure 7) Full 250 - - kbps tPLH, tPHL (Figure 7) Full - 240 325 ns tSKD (Figure 7) Full - 6 25 ns Receiver Enable to Output Low tZL RL = 1kΩ, CL = 15pF, SW = VCC (Figure 8), (Notes 12, 18) Full - - 80 ns Receiver Enable to Output High tZH RL = 1kΩ, CL = 15pF, SW = GND (Figure 8), (Notes 12, 18) Full - - 80 ns Receiver Disable from Output Low tLZ RL = 1kΩ, CL = 15pF, SW = VCC (Figure 8), (Note 18) Full - - 80 ns Receiver Disable from Output High tHZ RL = 1kΩ, CL = 15pF, SW = GND (Figure 8), (Note 18) Full - - 80 ns (Notes 13, 18) Full 60 160 600 ns Time to Shutdown tSHDN Receiver Enable from Shutdown to Output High tZH(SHDN) RL = 1kΩ, CL = 15pF, SW = GND (Figure 8), (Notes 13, 15, 18) Full - - 2500 ns Receiver Enable from Shutdown to Output Low tZL(SHDN) RL = 1kΩ, CL = 15pF, SW = VCC (Figure 8), (Notes 13, 15, 18) Full - - 2500 ns RECEIVER SWITCHING CHARACTERISTICS (1Mbps Versions; ISL32433E, ISL32435E) Maximum Data Rate Receiver Input to Output Delay 8 fMAX (Figure 7) Full 1 - - Mbps tPLH, tPHL (Figure 7) Full - 115 200 ns FN7920.0 March 1, 2012 ISL32430E, ISL32432E, ISL32433E, ISL32435E, ISL32437E Electrical Specifications Test Conditions: VCC = 3V to 3.6V and 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at the worst case of VCC = 5V or VCC = 3.3V, TA = +25°C (Note 8). Boldface limits apply over the operating temperature range, -40°C to +85°C. (Continued) PARAMETER TEMP (°C) MIN (Note 16) TYP MAX (Note 16) UNITS (Figure 7) Full - 4 20 ns SYMBOL Receiver Skew |tPLH - tPHL | tSKD TEST CONDITIONS Receiver Enable to Output Low tZL RL = 1kΩ, CL = 15pF, SW = VCC (Figure 8), (Note 12) Full - - 80 ns Receiver Enable to Output High tZH RL = 1kΩ, CL = 15pF, SW = GND (Figure 8), (Note 12) Full - - 80 ns Receiver Disable from Output Low tLZ RL = 1kΩ, CL = 15pF, SW = VCC (Figure 8) Full - - 80 ns Receiver Disable from Output High tHZ RL = 1kΩ, CL = 15pF, SW = GND (Figure 8) Full - - 80 ns (Note 13) Full 60 160 600 ns Time to Shutdown tSHDN Receiver Enable from Shutdown to Output High tZH(SHDN) RL = 1kΩ, CL = 15pF, SW = GND (Figure 8), (Notes 13, 15) Full - - 2500 ns Receiver Enable from Shutdown to Output Low tZL(SHDN) RL = 1kΩ, CL = 15pF, SW = VCC (Figure 8), (Notes 13, 15) Full - - 2500 ns NOTES: 8. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless otherwise specified. 9. Supply current specification is valid for loaded drivers when DE = 0V. 10. Applies to peak current. See “Typical Performance Curves” beginning on page 14 for more information. 11. Keep RE = 0 to prevent the device from entering SHDN (does not apply to the ISL32437E). 12. The RE signal high time must be short enough (typically <100ns) to prevent the device from entering SHDN. 13. Transceivers are put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 60ns, the parts are guaranteed not to enter shutdown. If the inputs are in this state for at least 600ns, the parts are guaranteed to have entered shutdown. See “Low Power Shutdown Mode” on page 13. 14. Keep RE = VCC, and set the DE signal low time >600ns to ensure that the device enters SHDN. 15. Set the RE signal high time >600ns to ensure that the device enters SHDN. 16. Compliance to data sheet limits is assured by one or more methods: production test, characterization and/or design. 17. See “Caution” statement below the “Recommended Operating Conditions” section on page 6. 18. Does not apply to the ISL32437E. The ISL32437E has no Rx enable function, and thus no SHDN function. Test Circuits and Waveforms VCC RL/2 DE DI VCC Z DI VOD D RL/2 DE Y 375Ω Z VCM VOD D Y RL/2 FIGURE 3A. VOD AND VOC VOC RL/2 375Ω FIGURE 3B. VOD WITH COMMON MODE LOAD FIGURE 3. DC DRIVER TEST CIRCUITS 9 FN7920.0 March 1, 2012 ISL32430E, ISL32432E, ISL32433E, ISL32435E, ISL32437E Test Circuits and Waveforms (Continued) 3V DI 50% 50% 0V VCC DE tPHL tPLH Z DI CD D RD Y OUT (Z) VOH OUT (Y) VOL SIGNAL GENERATOR 90% DIFF OUT (Y - Z) +VOD 90% 10% 10% tR -VOD tF SKEW = |tPLH - tPHL| FIGURE 4A. TEST CIRCUIT FIGURE 4B. MEASUREMENT POINTS FIGURE 4. DRIVER PROPAGATION DELAY AND DIFFERENTIAL TRANSITION TIMES DE Z DI 110Ω VCC D SIGNAL GENERATOR GND SW Y 3V CL DE Note 13 tZH, tZH(SHDN) Note 13 PARAMETER OUTPUT RE DI SW CL (pF) tHZ Y/Z X 1/0 GND 50 tLZ Y/Z X 0/1 VCC 50 tZH Y/Z 0 (Note 11) 1/0 GND 100 tZL, tZL(SHDN) tZL Y/Z 0 (Note 11) 0/1 VCC 100 Note 13 tZH(SHDN) Y/Z 1 (Note 14) 1/0 GND 100 tZL(SHDN) Y/Z 1 (Note 14) 0/1 VCC 100 50% 50% 0V tHZ OUTPUT HIGH VOH VOH - 0.5V 50% OUT (Y, Z) 0V tLZ VCC OUT (Y, Z) 50% VOL + 0.5V VOL OUTPUT LOW FIGURE 5A. TEST CIRCUIT FIGURE 5B. MEASUREMENT POINTS FIGURE 5. DRIVER ENABLE AND DISABLE TIMES VCC 3V DE + Z DI 54Ω D Y CD DI 0V VOD - SIGNAL GENERATOR DIFF OUT (Y - Z) +VOD -VOD 0V FIGURE 6B. MEASUREMENT POINTS FIGURE 6A. TEST CIRCUIT FIGURE 6. DRIVER DATA RATE 10 FN7920.0 March 1, 2012 ISL32430E, ISL32432E, ISL32433E, ISL32435E, ISL32437E Test Circuits and Waveforms (Continued) RE B R A SIGNAL GENERATOR B 15pF RO +2.25V 1.5V 1.5V +750mV A tPHL tPLH SIGNAL GENERATOR VCC 50% RO +1.5V 50% 0V FIGURE 7A. TEST CIRCUIT FIGURE 7B. MEASUREMENT POINTS FIGURE 7. RECEIVER PROPAGATION DELAY AND DATA RATE RE B A R VCC 1kΩ RO SIGNAL GENERATOR 15pF SW GND Note 13 RE 50% 0V tZH, tZH(SHDN) Note 13 PARAMETER DE A SW tHZ 0 +1.5V GND tLZ 0 -1.5V VCC tZL, tZL(SHDN) tZH (Note 12) 0 +1.5V GND Note 13 tZL (Note 12) 0 -1.5V VCC RO tZH(SHDN) (Note 15) 0 +1.5V GND tZL(SHDN) (Note 15) 0 -1.5V VCC FIGURE 8A. TEST CIRCUIT 3V 50% tHZ OUTPUT HIGH VOH - 0.5V 1.5V RO VOH 0V tLZ VCC 1.5V VOL + 0.5V OUTPUT LOW VOL FIGURE 8B. MEASUREMENT POINTS FIGURE 8. RECEIVER ENABLE AND DISABLE TIMES 11 FN7920.0 March 1, 2012 ISL32430E, ISL32432E, ISL32433E, ISL32435E, ISL32437E Application Information Driver (Tx) Features RS-485 and RS-422 are differential (balanced) data transmission standards used for long haul or noisy environments. RS-422 is a subset of RS-485, so RS-485 transceivers are also RS-422 compliant. RS-422 is a point-to-multipoint (multidrop) standard, which allows only one driver and up to 10 (assuming one unit load devices) receivers on each bus. RS-485 is a true multipoint standard, which allows up to 32 one unit load devices (any combination of drivers and receivers) on each bus. To allow for multipoint operation, the RS-485 specification requires that drivers must handle bus contention without sustaining any damage. The RS-485/RS-422 driver is a differential output device that delivers at least 1.7V across a 54Ω load (RS-485), and at least 2V across a 100Ω load (RS-422) with VCC ≥ 4.5V. The drivers feature low propagation delay skew to maximize bit width, and to minimize EMI, and all drivers are three-statable via the active high DE input. Another important advantage of RS-485 is the extended common mode range (CMR), which specifies that the driver outputs and receiver inputs withstand signals that range from +12V to -7V. RS-422 and RS-485 are intended for runs as long as 4000’, thus the wide CMR is necessary to handle ground potential differences, as well as voltages induced in the cable by external fields. The ISL32430E, ISL32432E, ISL32433E, ISL32435E, ISL32437E are a family of ruggedized RS-485 transceivers that improves on the RS-485 basic requirements, and therefore increases system reliability. The CMR increases to ±15V, while the RS-485 bus pins (receiver inputs and driver outputs) include fault protection against voltages and transients up to ±40V. Additionally, the ±15kV to ±16.5kV built-in ESD protection complements the fault protection. Receiver (Rx) Features These devices utilize a differential input receiver for maximum noise immunity and common mode rejection. Input sensitivity is better than ±200mV (3.3V operation), as required by the RS-422 and RS-485 specifications. Receiver input (load) current surpasses the RS-422 specification of 3mA, and is four times lower than the RS-485 “Unit Load (UL)” requirement of 1mA maximum. Thus, these products are known as “one-quarter UL” transceivers, and there can be up to 128 of these devices on a network while still complying with the RS-485 loading specification. The Rx functions with common mode voltages as great as ±15V, making them ideal for industrial, or long networks where induced voltages are a realistic concern. All the receivers include a “full fail-safe” function that guarantees a high level receiver output if the receiver inputs are unconnected (floating), shorted together, or connected to a terminated bus with all the transmitters disabled (i.e., an idle bus). Receivers easily meet the data rates supported by the corresponding driver, and most receiver outputs are three-statable via the active low RE input. The Rx in the 250kbps and 1Mbps versions include noise filtering circuitry to reject high frequency signals. The 1Mbps version typically rejects pulses narrower than 50ns (equivalent to 20Mbps), while the 250kbps Rx rejects pulses below 150ns (6.7Mbps). 12 The 250kbps and 1Mbps driver outputs are slew rate limited to minimize EMI, and to minimize reflections in unterminated or improperly terminated networks. High Overvoltage (Fault) Protection Increases ruggedness The ±40V (referenced to the IC GND) fault protection on the RS-485 pins, makes these transceivers some of the most rugged on the market. This level of protection makes the ISL32430E, ISL32432E, ISL32433E, ISL32435E, ISL32437E perfect for applications where power (e.g., 24V supplies) must be routed in the conduit with the data lines, or for outdoor applications where large transients are likely to occur. When power is routed with the data lines, even a momentary short between the supply and data lines will destroy an unprotected device. The ±40V fault levels of this family are at least three times higher than the levels specified for standard RS-485 ICs. The ISL32430E, ISL32432E, ISL32433E, ISL32435E, ISL32437E protection is active whether the Tx is enabled or disabled, and even if the IC is powered down. If transients or voltages (including overshoots and ringing) greater than ±50V are possible, then additional external protection is required. Use a protection device with the lowest clamping voltage acceptable for the application, and remember that TVS type devices typically clamp 5V to 10V above the designated stand-off voltage (e.g., a “45V TVS” clamps between 50V and 55V). Wide Common Mode Voltage (CMV) Tolerance Improves Operating Range RS-485 networks operating in industrial complexes, or over long distances, are susceptible to large CMV variations. Either of these operating environments may suffer from large node-to-node ground potential differences, or CMV pickup from external electromagnetic sources, and devices with only the minimum required +12V to -7V CMR may malfunction. The ISL32430E, ISL32432E, ISL32433E, ISL32435E, ISL32437E’s extended ±15V CMR allows for operation in environments that would overwhelm lesser transceivers. Additionally, the Rx will not phase invert (erroneously change state) even with CMVs of ±20V, or differential voltages as large as 40V. Cable Invert (Polarity Reversal) Function With large node count RS-485 networks, it is common for some cable data lines to be wired backwards during installation. When this happens, the node is unable to communicate over the network. Once a technician finds the miswired node, he must then rewire the connector, which is time consuming. The ISL32437E simplifies this task by including a cable invert pin (INV) that allows the technician to invert the polarity of the Rx input and the Tx output pins simply by moving a jumper to change the state of the invert pin. When the invert pin is low, the FN7920.0 March 1, 2012 ISL32430E, ISL32432E, ISL32433E, ISL32435E, ISL32437E IC operates like any standard RS-485 transceiver, and the bus pins have their normal polarity definition of A and Y being noninverting and B and Z being inverting. With the invert pin high, the corresponding bus pins reverse their polarity, so B and Z are now noninverting, and A and Y become inverting. Intersil’s unique cable invert function is superior to that found on competing devices, because the Rx full fail-safe function is maintained, even when the Rx polarity is reversed. Competitor devices implement the Rx invert function simply by inverting the Rx output. This means that with the Rx inputs floating or shorted together, the Rx appropriately delivers a logic 1 in normal polarity, but outputs a logic low when the IC is operated in the inverted mode. Intersil’s innovative Rx design guarantees that, with the Rx inputs floating or shorted together (VID = 0V), the Rx output remains high, regardless of the state of the invert pin. Data Rate, Cables, and Terminations RS-485/RS-422 are intended for network lengths up to 4000’, but the maximum system data rate decreases as the transmission length increases. Devices operating at 1Mbps can operate at full data rates with lengths up to 800’ (244m). Jitter is the limiting parameter at this faster data rate, so employing encoded data streams (e.g., Manchester coded or Return-to-Zero) may allow increased transmission distances. The slow versions can operate at 115kbps, or less, at the full 4000’ (1220m) distance, or at 250kbps for lengths up to 3000’ (915m). DC cable attenuation is the limiting parameter, so using better quality cables (e.g., 22 AWG) may allow increased transmission distance. Twisted pair is the cable of choice for RS-485/RS-422 networks. Twisted pair cables tend to pick up noise and other electromagnetically induced voltages as common mode signals, which are effectively rejected by the differential receivers in these ICs. Short networks using the 250kbps versions need not be terminated, however, terminations are recommended unless power dissipation is an overriding concern. In point-to-point, or point-to-multipoint (single driver on bus like RS-422) networks, the main cable should be terminated in its characteristic impedance (typically 120Ω) at the end farthest from the driver. In multi-receiver applications, stubs connecting receivers to the main cable should be kept as short as possible. 13 Multipoint (multi-driver) systems require that the main cable be terminated in its characteristic impedance at both ends. Stubs connecting a transceiver to the main cable should be kept as short as possible. Built-In Driver Overload Protection As stated previously, the RS-485 specification requires that drivers survive worst case bus contentions undamaged. These transceivers meet this requirement via driver output short circuit current limits, and on-chip thermal shutdown circuitry. The driver output stages incorporate a double fold-back short circuit current limiting scheme, which ensures that the output current never exceeds the RS-485 specification, even at the common mode and fault condition voltage range extremes. The first fold-back current level (≈83mA) is set to ensure that the driver never folds back when driving loads with common mode voltages up to ±15V. The very low second fold-back current setting (≈13mA) minimizes power dissipation if the Tx is enabled when a fault occurs. In the event of a major short circuit condition, devices also include a thermal shutdown feature that disables the drivers whenever the die temperature becomes excessive. This eliminates the power dissipation, allowing the die to cool. The drivers automatically re-enable after the die temperature drops about +15°C. If the contention persists, the thermal shutdown/re-enable cycle repeats until the fault is cleared. Receivers stay operational during thermal shutdown. Low Power Shutdown Mode These BiCMOS transceivers all use a fraction of the power required by competitive devices, but they (excluding ISL32437E) also include a shutdown feature that reduces the already low quiescent ICC to a 10µA trickle. These devices enter shutdown whenever the receiver and driver are simultaneously disabled (RE = VCC and DE = GND) for a period of at least 600ns. Disabling both the driver and the receiver for less than 60ns guarantees that the transceiver will not enter shutdown. Note that receiver and driver enable times increase when the transceiver enables from shutdown. Refer to Notes 11, 12, 13, 14 and 15, at the end of the “Electrical Specification” table on page 9, for more information. FN7920.0 March 1, 2012 ISL32430E, ISL32432E, ISL32433E, ISL32435E, ISL32437E Typical Performance Curves TA = +25°C; Unless Otherwise Specified. DRIVER OUTPUT CURRENT (mA) RD = 20Ω 70 RD = 30Ω +25°C 60 RD = 54Ω +85°C +25°C 50 40 +85°C RD = 100Ω 30 20 VCC = 5V 10 0 VCC = 3.3V 0 0.5 1 1.5 2 2.5 3 3.5 4 DIFFERENTIAL OUTPUT VOLTAGE (V) 4.5 5 DIFFERENTIAL OUTPUT VOLTAGE (V) 3.25 80 VCC = 5V 3.00 RD = 100Ω 2.75 VCC = 5V 2.50 RD = 54Ω 2.25 2.00 RD = 100Ω VCC = 3.3V 1.75 RD = 54Ω 1.50 VCC = 3.3V 1.25 -40 -30 -20 -10 0 10 20 30 40 50 60 FIGURE 9. DRIVER OUTPUT CURRENT vs DIFFERENTIAL OUTPUT VOLTAGE 80 VOL, +25°C DE = VCC, RE = X 2.1 VCC = 5V VCC = 5V DE = GND, RE = GND 1.9 VCC = 5V 1.8 DE = VCC, RE = X 1.7 VCC = 3.3V 1.6 DE = GND, RE = GND 1.5 VCC = 3.3V 1.4 -40 -30 -20 -10 0 10 20 30 40 50 60 70 RECEIVER OUTPUT CURRENT (mA) 60 2.0 ICC (mA) 80 85 FIGURE 10. DRIVER DIFFERENTIAL OUTPUT VOLTAGE vs TEMPERATURE 2.2 VOL, +85°C VOL, +25°C VCC = 3.3V 40 VOL, +85°C 20 VCC = 3.3V 0 VOH, +85°C -20 VOH, +85°C -40 -60 80 85 0 0.5 1.5 2.0 2.5 150 VCC = 0V to 5.5V OUTPUT CURRENT (mA) 100 0 Y OR Z -200 75 A/Y OR B/Z 10 20 30 BUS PIN VOLTAGE (V) FIGURE 13. BUS PIN CURRENT vs BUS PIN VOLTAGE 14 5.0 40 VCC = 5V, +25°C 25 0 -25 Y OR Z = HIGH -50 VCC = 3.3V, +25°C VCC = 3.3V, +85°C VCC = 5V, +25°C -100 0 4.5 Y OR Z = LOW 50 -75 -300 -10 4.0 VCC = 5V, +85°C VCC = 3.3V, +25°C 100 200 -20 3.5 VCC = 3.3V, +85°C 125 300 -30 3.0 FIGURE 12. RECEIVER OUTPUT CURRENT vs RECEIVER OUTPUT VOLTAGE 400 -400 -40 1.0 RECEIVER OUTPUT VOLTAGE (V) FIGURE 11. SUPPLY CURRENT vs TEMPERATURE -100 VCC = 5V VOH, +25°C VOH, +25°C TEMPERATURE (°C) BUS PIN CURRENT (µA) 70 TEMPERATURE (°C) -125 -40 VCC = 5V, +85°C -30 -20 -10 0 10 20 30 40 OUTPUT VOLTAGE (V) FIGURE 14. DRIVER OUTPUT CURRENT vs SHORT CIRCUIT VOLTAGE FN7920.0 March 1, 2012 ISL32430E, ISL32432E, ISL32433E, ISL32435E, ISL32437E Typical Performance Curves TA = +25°C; Unless Otherwise Specified. (Continued) 300 290 280 6 tPHL VCC = 3.3V 270 5 tPLH 260 250 240 230 tPLH 220 VCC = 5V 4 SKEW (ns) PROPAGATION DELAY (ns) 7 RD = 54Ω, CD = 50pF 3 2 VCC = 3.3V VCC = 5V tPHL 1 210 |tPLH - tPHL| 200 -40 -30 -20 -10 0 10 20 30 40 50 60 70 0 80 85 -40 -30 -20 -10 0 10 20 30 40 50 TEMPERATURE (°C) TEMPERATURE (°C) FIGURE 15. DRIVER DIFFERENTIAL PROPAGATION DELAY vs TEMPERATURE (ISL32430E, ISL32432E, ISL32437E) 75 80 85 4.5 RD = 54Ω, CD = 50pF tPLH VCC = 3.3V 4.0 VCC = 5V 3.5 tPHL 3.0 65 60 tPLH tPHL 0 10 2.5 2.0 1.5 VCC = 3.3V 1.0 VCC = 5V 55 50 -40 -30 -20 -10 0.5 20 30 40 50 60 70 |tPLH - tPHL| 0 -40 -30 -20 -10 80 85 TEMPERATURE (°C) FIGURE 17. DRIVER DIFFERENTIAL PROPAGATION DELAY vs TEMPERATURE (ISL32433E, ISL32435E) 20 10 0 5 0 VID = ±1V 250kbps VCC = 5V RO 5 0 VCC = 5V VCC = 3.3V -15 -20 5 0 -5 -10 B 60 70 80 85 VID = ±1V 1Mbps 10 VCC = 3.3V RO 10 20 30 40 50 TEMPERATURE (°C) A 15 VOLTAGE (V) 5 20 B 0 FIGURE 18. DRIVER DIFFERENTIAL SKEW vs TEMPERATURE (ISL32433E, ISL32435E) A 15 VOLTAGE (V) 70 FIGURE 16. DRIVER DIFFERENTIAL SKEW vs TEMPERATURE (ISL32430E, ISL32432E, ISL32437E) SKEW (ns) PROPAGATION DELAY (ns) 70 60 VCC = 5V RO VCC = 3.3V VCC = 5V RO VCC = 3.3V -5 -10 A -15 B TIME (1µs/DIV) FIGURE 19. ±15V RECEIVER PERFORMANCE (ISL32430E, ISL32432E, ISL32437E) 15 -20 A B TIME (400ns/DIV) FIGURE 20. ±15V RECEIVER PERFORMANCE (ISL32433E, ISL32435E) FN7920.0 March 1, 2012 ISL32430E, ISL32432E, ISL32433E, ISL32435E, ISL32437E 3 RO 0 DRIVER OUTPUT (V) 2 1 0 A/Y - B/Z -1 -2 TIME (1µs/DIV) 5 0 5 RO 0 DRIVER INPUT (V) 3 2 1 0 -1 -2 -3 DRIVER OUTPUT (V) RECEIVER OUTPUT (V) DRIVER OUTPUT (V) RD = 54Ω, CD = 50pF 0 3 RO 0 2 1 0 A/Y - B/Z -1 -2 TIME (400ns/DIV) FIGURE 22. VCC = 3.3V, DRIVER AND RECEIVER WAVEFORMS (ISL32433E, ISL32435E) FIGURE 21. VCC = 3.3V, DRIVER AND RECEIVER WAVEFORMS (ISL32430E, ISL32432E, ISL32437E) DI 3 DI DRIVER INPUT (V) 0 RD = 54Ω, CD = 50pF A/Y - B/Z TIME (1µs/DIV) RD = 54Ω, CD = 50pF DI 5 0 5 RO 0 3 2 1 0 -1 -2 -3 DRIVER INPUT (V) DI RECEIVER OUTPUT (V) 3 DRIVER INPUT (V) RD = 54Ω, CD = 50pF RECEIVER OUTPUT (V) DRIVER OUTPUT (V) RECEIVER OUTPUT (V) Typical Performance Curves TA = +25°C; Unless Otherwise Specified. (Continued) A/Y - B/Z TIME (400ns/DIV) FIGURE 24. VCC = 5V, DRIVER AND RECEIVER WAVEFORMS (ISL32433E, ISL32435E) FIGURE 23. VCC = 5V, DRIVER AND RECEIVER WAVEFORMS (ISL32430E, ISL32432E, ISL32437E) 2.4 Die Characteristics INPUT HIGH VOLTAGE (V) 2.2 SUBSTRATE POTENTIAL (POWERED UP) : VCC = 5V 2.0 GND 1.8 PROCESS: 1.6 VCC = 3.3V Si Gate BiCMOS 1.4 1.2 1.0 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 85 TEMPERATURE (°C) FIGURE 25. LOGIC INPUT HIGH VOLTAGE vs TEMPERATURE 16 FN7920.0 March 1, 2012 ISL32430E, ISL32432E, ISL32433E, ISL32435E, ISL32437E Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you have the latest Rev. DATE REVISION March 1, 2012 FN7920.0 CHANGE Initial Release Products Intersil Corporation is a leader in the design and manufacture of high-performance analog semiconductors. The Company's products address some of the industry's fastest growing markets, such as, flat panel displays, cell phones, handheld products, and notebooks. Intersil's product families address power management and analog signal processing functions. Go to www.intersil.com/products for a complete list of Intersil product families. For a complete listing of Applications, Related Documentation and Related Parts, please see the respective device information page on intersil.com: ISL32430E, ISL32432E, ISL32433E, ISL32435E, ISL32437E To report errors or suggestions for this datasheet, please go to www.intersil.com/askourstaff FITs are available from our website at http://rel.intersil.com/reports/search.php For additional products, see www.intersil.com/product_tree Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted in the quality certifications found at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 17 FN7920.0 March 1, 2012 ISL32430E, ISL32432E, ISL32433E, ISL32435E, ISL32437E Package Outline Drawing M8.118 8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE Rev 4, 7/11 5 3.0±0.05 A DETAIL "X" D 8 1.10 MAX SIDE VIEW 2 0.09 - 0.20 4.9±0.15 3.0±0.05 5 0.95 REF PIN# 1 ID 1 2 B 0.65 BSC GAUGE PLANE TOP VIEW 0.55 ± 0.15 0.25 3°±3° 0.85±010 H DETAIL "X" C SEATING PLANE 0.25 - 0.36 0.08 M C A-B D 0.10 ± 0.05 0.10 C SIDE VIEW 1 (5.80) NOTES: (4.40) (3.00) 1. Dimensions are in millimeters. (0.65) (0.40) (1.40) TYPICAL RECOMMENDED LAND PATTERN 18 2. Dimensioning and tolerancing conform to JEDEC MO-187-AA and AMSEY14.5m-1994. 3. Plastic or metal protrusions of 0.15mm max per side are not included. 4. Plastic interlead protrusions of 0.15mm max per side are not included. 5. Dimensions are measured at Datum Plane "H". 6. Dimensions in ( ) are for reference only. FN7920.0 March 1, 2012 ISL32430E, ISL32432E, ISL32433E, ISL32435E, ISL32437E Package Outline Drawing M8.15 8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE Rev 4, 1/12 DETAIL "A" 1.27 (0.050) 0.40 (0.016) INDEX 6.20 (0.244) 5.80 (0.228) AREA 0.50 (0.20) x 45° 0.25 (0.01) 4.00 (0.157) 3.80 (0.150) 1 2 8° 0° 3 0.25 (0.010) 0.19 (0.008) SIDE VIEW “B” TOP VIEW 2.20 (0.087) SEATING PLANE 5.00 (0.197) 4.80 (0.189) 1.75 (0.069) 1.35 (0.053) 1 8 2 7 0.60 (0.023) 1.27 (0.050) 3 6 4 5 -C- 1.27 (0.050) 0.51(0.020) 0.33(0.013) SIDE VIEW “A 0.25(0.010) 0.10(0.004) 5.20(0.205) TYPICAL RECOMMENDED LAND PATTERN NOTES: 1. Dimensioning and tolerancing per ANSI Y14.5M-1994. 2. Package length does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 3. Package width does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 4. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 5. Terminal numbers are shown for reference only. 6. The lead width as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 7. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. 8. This outline conforms to JEDEC publication MS-012-AA ISSUE C. 19 FN7920.0 March 1, 2012 ISL32430E, ISL32432E, ISL32433E, ISL32435E, ISL32437E Mini Small Outline Plastic Packages (MSOP) N M10.118 (JEDEC MO-187BA) 10 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE E1 E INCHES SYMBOL -B- INDEX AREA 1 2 0.20 (0.008) A B C TOP VIEW 4X θ 0.25 (0.010) R1 R GAUGE PLANE A SEATING PLANE -C- A2 A1 b -He D 0.10 (0.004) 4X θ L SEATING PLANE C -A0.20 (0.008) C C a SIDE VIEW CL E1 0.20 (0.008) C D -B- END VIEW MILLIMETERS MAX MIN MAX NOTES A 0.037 0.043 0.94 1.10 - A1 0.002 0.006 0.05 0.15 - A2 0.030 0.037 0.75 0.95 - b 0.007 0.011 0.18 0.27 9 c 0.004 0.008 0.09 0.20 - D 0.116 0.120 2.95 3.05 3 E1 0.116 0.120 2.95 3.05 4 e L1 MIN 0.020 BSC 0.50 BSC - E 0.187 0.199 4.75 5.05 - L 0.016 0.028 0.40 0.70 6 L1 0.037 REF 0.95 REF - N 10 10 7 R 0.003 - 0.07 - - R1 0.003 - 0.07 - - θ 5o 15o 5o 15o - α 0o 6o 0o 6o Rev. 0 12/02 NOTES: 1. These package dimensions are within allowable dimensions of JEDEC MO-187BA. 2. Dimensioning and tolerancing per ANSI Y14.5M-1994. 3. Dimension “D” does not include mold flash, protrusions or gate burrs and are measured at Datum Plane. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E1” does not include interlead flash or protrusions and are measured at Datum Plane. - H - Interlead flash and protrusions shall not exceed 0.15mm (0.006 inch) per side. 5. Formed leads shall be planar with respect to one another within 0.10mm (.004) at seating Plane. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension “b” does not include dambar protrusion. Allowable dambar protrusion shall be 0.08mm (0.003 inch) total in excess of “b” dimension at maximum material condition. Minimum space between protrusion and adjacent lead is 0.07mm (0.0027 inch). 10. Datums -A -H- . and - B - to be determined at Datum plane 11. Controlling dimension: MILLIMETER. Converted inch dimensions are for reference only 20 FN7920.0 March 1, 2012 ISL32430E, ISL32432E, ISL32433E, ISL32435E, ISL32437E Package Outline Drawing M14.15 14 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE Rev 1, 10/09 8.65 A 3 4 0.10 C A-B 2X 6 14 DETAIL"A" 8 0.22±0.03 D 6.0 3.9 4 0.10 C D 2X 0.20 C 2X 7 PIN NO.1 ID MARK 5 0.31-0.51 B 3 (0.35) x 45° 4° ± 4° 6 0.25 M C A-B D TOP VIEW 0.10 C 1.75 MAX H 1.25 MIN 0.25 GAUGE PLANE C SEATING PLANE 0.10 C 0.10-0.25 1.27 SIDE VIEW (1.27) DETAIL "A" (0.6) NOTES: 1. Dimensions are in millimeters. Dimensions in ( ) for Reference Only. 2. Dimensioning and tolerancing conform to AMSEY14.5m-1994. 3. Datums A and B to be determined at Datum H. (5.40) 4. Dimension does not include interlead flash or protrusions. Interlead flash or protrusions shall not exceed 0.25mm per side. 5. The pin #1 identifier may be either a mold or mark feature. (1.50) 6. Does not include dambar protrusion. Allowable dambar protrusion shall be 0.10mm total in excess of lead width at maximum condition. 7. Reference to JEDEC MS-012-AB. TYPICAL RECOMMENDED LAND PATTERN 21 FN7920.0 March 1, 2012