NVD5117PL Power MOSFET −60 V, 16 mW, −61 A, Single P−Channel Features Low RDS(on) to Minimize Conduction Losses High Current Capability Avalanche Energy Specified AEC−Q101 Qualified These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Parameter Drain−to−Source Voltage Gate−to−Source Voltage Continuous Drain Current RqJC (Note 1) Power Dissipation RqJC (Note 1) Continuous Drain Current RqJA (Notes 1 & 2) Power Dissipation RqJA (Notes 1 & 2) Pulsed Drain Current TC = 25°C Steady State Symbol Value Unit VDSS −60 V VGS "20 V ID −61 A TC = 100°C TC = 25°C Steady State PD ID PD 1 2 2.1 TA = 25°C IDmaxpkg 60 A TJ, Tstg −55 to 175 °C IS −118 A EAS 240 mJ TL 260 °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. THERMAL RESISTANCE MAXIMUM RATINGS Parameter 4 W 4.1 A Lead Temperature for Soldering Purposes (1/8″ from case for 10 s) P−Channel A −11 −419 Single Pulse Drain−to−Source Avalanche Energy (TJ = 25°C, VDD = 50 V, VGS = 10 V, IL(pk) = 40 A, L = 0.3 mH, RG = 25 W) G D IDM Source Current (Body Diode) S W 118 TA = 25°C, tp = 10 ms Operating Junction and Storage Temperature −61 A 22 mW @ −4.5 V −8 TA = 100°C Current Limited by Package (Note 3) ID 16 mW @ −10 V −60 V 59 TA = 100°C TA = 25°C RDS(on) V(BR)DSS −43 TC = 100°C TA = 25°C http://onsemi.com Symbol Value Unit Junction−to−Case − Steady State (Drain) RqJC 1.3 °C/W Junction−to−Ambient − Steady State (Note 2) RqJA 37 1. The entire application environment impacts the thermal resistance values shown, they are not constants and are only valid for the particular conditions noted. 2. Surface−mounted on FR4 board using a 650 mm2, 2 oz. Cu pad. 3. Maximum current for pulses as long as 1 second is higher but is dependent on pulse duration and duty cycle. 3 DPAK CASE 369C STYLE 2 MARKING DIAGRAMS & PIN ASSIGNMENT 4 Drain YWW 51 17LG • • • • • 2 1 Drain 3 Gate Source Y WW 5117L G = Year = Work Week = Device Code = Pb−Free Package ORDERING INFORMATION Device Package Shipping† NVD5117PLT4G DPAK (Pb−Free) 2500 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. © Semiconductor Components Industries, LLC, 2011 September, 2011 − Rev. 0 1 Publication Order Number: NVD5117PL/D NVD5117PL ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Parameter Symbol Test Condition Min V(BR)DSS VGS = 0 V, ID = −250 mA −60 Typ Max Unit OFF CHARACTERISTICS Drain−to−Source Breakdown Voltage Zero Gate Voltage Drain Current Gate−to−Source Leakage Current IDSS VGS = 0 V, VDS = −60 V V TJ = 25°C −1.0 TJ = 125°C −100 mA IGSS VDS = 0 V, VGS = "20 V Gate Threshold Voltage VGS(TH) VGS = VDS, ID = −250 mA −2.5 V Drain−to−Source On Resistance RDS(on) VGS = −10 V, ID = −29 A 12 16 mW VGS = −4.5 V, ID = −29 A 16 22 gFS VDS = −15 V, ID = −15 A 30 S Input Capacitance Ciss 4800 pF Output Capacitance Coss VGS = 0 V, f = 1.0 MHz, VDS = −25 V "100 nA ON CHARACTERISTICS (Note 4) Froward Transconductance −1.5 CHARGES AND CAPACITANCES Reverse Transfer Capacitance Total Gate Charge Crss QG(TOT) Threshold Gate Charge QG(TH) Gate−to−Source Charge QGS Gate−to−Drain Charge QGD Plateau Voltage VGP 480 320 VDS = −48 V, ID = −29 A VGS = −4.5 V 49 VGS = −10 V 85 nC 3 VGS = −4.5 V, VDS = −48 V, ID = −29 A 13 28 3.2 V 22 ns SWITCHING CHARACTERISTICS (Notes 4) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time td(on) tr td(off) VGS = −4.5 V, VDS = −48 V, ID = −29 A, RG = 2.5 W tf 195 50 132 DRAIN−SOURCE DIODE CHARACTERISTICS Forward Diode Voltage Reverse Recovery Time VSD TJ = 25°C −0.86 TJ = 125°C −0.74 tRR Charge Time ta Discharge Time tb Reverse Recovery Charge VGS = 0 V, IS = −29 A 36 VGS = 0 V, dls/dt = 100 A/ms, Is = −29 A QRR http://onsemi.com 2 V ns 19 17 44 4. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%. −1.0 nC NVD5117PL TYPICAL CHARACTERISTICS −4.5 V −4 V 80 −3.8 V 60 −3.6 V 40 −3.4 V 20 −3.2 V −3 V 0 RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) −4.2 V 100 0 1 2 3 4 40 TJ = −55°C 2 3 4 5 6 Figure 2. Transfer Characteristics 0.055 0.045 0.035 0.025 0.015 4 5 6 7 8 9 10 0.024 TJ = 25°C 0.022 VGS = −4.5 V 0.020 0.018 0.016 0.014 VGS = −10 V 0.012 0.010 10 100000 −IDSS, LEAKAGE (nA) 1.20 1.00 40 50 60 70 80 90 100 110 120 VGS = 0 V VGS = −10 V ID = −29 A 1.40 30 Figure 4. On−Resistance vs. Drain Current and Gate Voltage 2.00 1.60 20 −ID, DRAIN CURRENT (A) Figure 3. On−Resistance vs. Gate−to−Source Voltage 1.80 TJ = 25°C TJ = 125°C 20 −VGS, GATE−TO−SOURCE VOLTAGE (V) −VGS, GATE−TO−SOURCE VOLTAGE (V) RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) 60 −VDS, DRAIN−TO−SOURCE VOLTAGE (V) ID = −29 A TJ = 25°C 3 80 0 5 VDS ≥ −10 V 100 Figure 1. On−Region Characteristics 0.065 0.005 120 TJ = 25°C RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) −ID, DRAIN CURRENT (A) VGS = −10 V −ID, DRAIN CURRENT (A) 120 TJ = 150°C 10000 TJ = 125°C 1000 0.80 0.60 −50 −25 0 25 50 75 100 125 150 175 100 5 10 15 20 25 30 35 40 45 50 55 TJ, JUNCTION TEMPERATURE (°C) −VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current vs. Voltage http://onsemi.com 3 60 NVD5117PL 6000 VGS = 0 V TJ = 25°C 5500 C, CAPACITANCE (pF) 5000 Ciss 4500 4000 3500 3000 2500 2000 1500 1000 500 0 Coss Crss 0 10 20 30 40 50 −VGS, GATE−TO−SOURCE VOLTAGE (V) TYPICAL CHARACTERISTICS 60 Qgs 4 Qgd 2 0 VDS = −48 V ID = −29 A TJ = 25°C 0 10 20 30 40 50 60 70 80 Figure 7. Capacitance Variation Figure 8. Gate−to−Source vs. Total Charge tf td(on) 10.0 VDD = −48 V ID = −29 A VGS = −10 V 1 10 IS, SOURCE CURRENT (A) td(off) 100 90 VGS = 0 V TJ = 25°C 100 80 60 40 20 0 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 RG, GATE RESISTANCE (W) −VSD, SOURCE−TO−DRAIN VOLTAGE (V) Figure 9. Resistive Switching Time Variation vs. Gate Resistance Figure 10. Diode Forward Voltage vs. Current 1000 VGS = −10 V Single Pulse TC = 25°C 100 100 ms 1 ms 10 ms 10 dc RDS(on) Limit Thermal Limit Package Limit 0.1 1 1.2 250 10 ms EAS, SINGLE PULSE DRAIN−TO− SOURCE AVALANCHE ENERGY (mJ) t, TIME (ns) 6 Qg, TOTAL GATE CHARGE (nC) tr 1.0 −ID, DRAIN CURRENT (A) 8 120 100.0 0.1 QT −VDS, DRAIN−TO−SOURCE VOLTAGE (V) 1000.0 1 10 10 100 ID = −40 A 200 150 100 50 0 25 50 75 100 125 150 −VDS, DRAIN−TO−SOURCE VOLTAGE (V) TJ, STARTING JUNCTION TEMPERATURE (°C) Figure 11. Maximum Rated Forward Biased Safe Operating Area Figure 12. Maximum Avalanche Energy vs. Starting Junction Temperature http://onsemi.com 4 175 NVD5117PL RqJC(t) (°C/W) EFFECTIVE TRANSIENT THERMAL RESISTANCE TYPICAL CHARACTERISTICS 10 1 0.1 Duty Cycle = 0.5 0.2 0.1 0.05 0.02 0.01 0.01 0.000001 Single Pulse 0.00001 0.0001 0.001 PULSE TIME (sec) Figure 13. Thermal Response http://onsemi.com 5 0.01 0.1 NVD5117PL PACKAGE DIMENSIONS DPAK (SINGLE GAUGE) CASE 369C−01 ISSUE D A E b3 c2 B Z D 1 L4 A 4 L3 b2 e 2 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: INCHES. 3. THERMAL PAD CONTOUR OPTIONAL WITHIN DIMENSIONS b3, L3 and Z. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.006 INCHES PER SIDE. 5. DIMENSIONS D AND E ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY. 6. DATUMS A AND B ARE DETERMINED AT DATUM PLANE H. C H DETAIL A 3 c b 0.005 (0.13) M H C L2 GAUGE PLANE C L SEATING PLANE A1 L1 DETAIL A ROTATED 905 CW DIM A A1 b b2 b3 c c2 D E e H L L1 L2 L3 L4 Z INCHES MIN MAX 0.086 0.094 0.000 0.005 0.025 0.035 0.030 0.045 0.180 0.215 0.018 0.024 0.018 0.024 0.235 0.245 0.250 0.265 0.090 BSC 0.370 0.410 0.055 0.070 0.108 REF 0.020 BSC 0.035 0.050 −−− 0.040 0.155 −−− MILLIMETERS MIN MAX 2.18 2.38 0.00 0.13 0.63 0.89 0.76 1.14 4.57 5.46 0.46 0.61 0.46 0.61 5.97 6.22 6.35 6.73 2.29 BSC 9.40 10.41 1.40 1.78 2.74 REF 0.51 BSC 0.89 1.27 −−− 1.01 3.93 −−− SOLDERING FOOTPRINT* 6.20 0.244 2.58 0.102 5.80 0.228 3.00 0.118 1.60 0.063 6.17 0.243 SCALE 3:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5773−3850 http://onsemi.com 6 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative NVD5117PL/D