Product Brief TC358766 Display Bridge for DisplayPort™ Connectivity Highlights • Display bridge for connectivity of DisplayPortTM panels to the Application Processors with a Mobile Industry Processor Interface (MIPI) Display Serial Interface (DSI) or Display Pixel Interface (DPI). • Solutions based on the latest versions of the industry standard MIPI DSI 1.01 to ensure high speed data rates of up to 1 Gbps per lane and MIPI DPI 2.0 to ensure speed of 154 MHz. • Display port transmitter features VESA DisplayPort 1.1a standard that supports 1.62 or 2.7 Gbps per lane; and configurable to single or dual lane per Main Link. • Supports high-resolution DisplayPort panels up to WUXGA 1920 x 1200 at refresh rates of 60 fps. • Applicable to products such as tablets, eBooks, netbooks and laptops. As the DisplayPort interface uses fewer lines and power consumption is more efficient, availability and usage of highresolution DisplayPort panels is becoming a feature in handheld applications such as tablets and netbooks. The Toshiba TC358766 display bridge can support displays with resolution up to 1920 x 1200 (WUXGA) at 24 bits per pixel, at refresh rate of 60 frames per second. The TC358766 can support both an embedded DisplayPort panel (eDP) or an external DP panel at one time or simultaneously. The TC358766 bridge supports audio streaming from the Application Processor through the I2S interface. The audio is transmitted through the DisplayPort link if the application requires, i.e. connecting to an external panel. Description The Toshiba TC358766 display bridge is optimized for handheld devices using a Host Processor with Mobile Industry Processor Interface (MIPI) Display Serial Interface (DSI) or Display Pixel Interface (DPI) connectivity. The TC358766 functions as a protocol bridge enabling the video stream from the Host Processor DSI link or DPI link to drive a single or two independent DisplayPort panel(s). The TC358766 has a DSI receiver that can be configured to support up to four DSI lanes with data rates up to 1 Gbps per lane, for maximum total bandwidth of 4 Gbps. It also has a DPI receiver that can be configured to support 16, 18 or 24 bits parallel interfaces and can be operated up to 154 MHz parallel clock. The DisplayPort transmitter can be configured to support a single Main Link with one or 2 lanes or dual Main Links with single lane per link. The data throughput is 1.62 Gbps or 2.7 Gbps per lane of the DisplayPort Main Link. The TC358766 is a 120-pin device, in a small package size of 6 mm x 6 mm, 0.50 mm ball pitch designed for portable products. TC358766XBG System Block Diagram D2DP 2 IS DPI Tx Baseband Application Processor Data 24 V/Hsync,DE 2 I S I/F DPI Rx PCLK Data Buffer Data Lane 0 Data Lane 1 DisplayPort 1.62/2.7 Gbps Two Data Lanes DSI Tx Video Packet Video Packet Video Packet Video Packet C Video Packet Video Packet DPLN0 C AUX_CHD HPD0 DPLN1 Data Lane 2 RegFile Data Lane 3 AUX_CH1 HPD1 Clk Lane DSI Rx INT SPI_SS SPI_CLK/SCL SPI_MOSI/SDA SPI_MISO Test RSTx 2 SPI/I C Slave CG RefClk Product Brief TC358766 Display Bridge for DisplayPort™ Connectivity Features DSI Receiver • MIPI DSI: v1.01 / MIPI D-PHY: v1.0 compliant. • Up to four (4) data lanes with bi-directional support on Data Lane 0. • Maximum speed at 1 Gbps/lane. • Video input data formats: • Supports 1.62 or 2.7 Gbps/lane data rate with voltage swings @0.4, 0.6, 0.8 or 1.2V • Support of pre-emphasis levels of 0, 3.5 dB and 6 dB. • AUX channel supported at 1 Mbps. • Supports HDCP encryption Version 1.3 Amendment for DisplayPort Revision 1.1. • SSCG with ~30 KHz modulation to reduce EMI. – RGB-565, RGB-666 and RGB-888. – New DSI V1.02 data type support: 16-bit YCbCr 422 I2C Interface • I2C slave interface for debugging and/or chip register set access. • Interlaced video mode is not supported. DPI Receiver • Maximum speed at 154 MHz. • Video input data formats: RGB-565, RGB-666 and RGB-888. I2S Audio Interface • Supports sampling frequencies of 32, 44.1, 48, 88.2, 96, 176.4 & 192 KHz. • Supports up to 2 audio channels. • Optionally inserts IEC60958 status bits and preamble bits per channel. DisplayPort Interface • High-speed serial bridge chip using VESA DisplayPort 1.1a standard. • Supports one dual-lane port for high bandwidth application or two single-lane ports for connection to two DisplayPort panels. SPI Interface • SPI slave interface for chip register set access. • SPI interface support for up to 30 MHz operation. Clock Source • DisplayPort clock source can be derived from an external clock input or from the DSI clock. Acceptable clock values from external source or DSI clock derivatives are 13, 26, 19.2 or 38.4 MHz. Power Supply Inputs • Core and MIPI D-PHY: 1.2V • Digital I/O: 1.8V • DisplayPort PHY and PLL: 1.8V and 1.2V Package • TC358766XBG: 120-pin, 6.0 mm x 6.0 mm, 0.5 mm ball pitch, 1.0 mm height Sales Offices North America Europe Toshiba America Electronic Components Inc Irvine, CA TEL: (949) 623-2900 San Jose, CA TEL: (408) 526-2400 Toshiba Electronics Europe GmbH Puteaux Cedex, France Düsseldorf, Germany TEL: (0211) 5296-0 TEL: (1) 47282181 Farnborough, Hampshire , U.K. TEL: (0870) 060-2370 ASIA Toshiba Electronics (Shanghai) Co.,Ltd Shenzhen, China Shanghai, China TEL: (021) 6139-3888 TEL: (0755) 2399-6897 Toshiba Electronics Asia(Singapore) Pte. Ltd. TEL: (6278) 5252 Toshiba Electronics Korea Corp. Seoul TEL: (02) 3484-4334 Toshiba Electronics Asia Ltd Hong Kong TEL:2375-6111 Toshiba Electronics Taiwan Corp. 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