TMP816 www.ti.com ........................................................................................................................................................................................................ SLVS787 – MAY 2009 VARIABLE-SPEED SINGLE-PHASE FULL-WAVE FAN-MOTOR PRE-DRIVER FEATURES 1 • • • • • • • • Pre-Driver for Single-Phase Full-Wave Drive – PNP-NMOS is used as an external power TR, enabling high-efficiency low-consumption drive by means of the low-saturation output and single-phase full-wave drive. (PMOS-NMOS also applicable) External PWM Input Enables Variable-Speed Control – Separately-excited upper direct PWM (f = 25 kHz) control method, enabling highly silent speed control Current-Limiter Circuit – Chopper-type current limit at start Reactive Current-Cut Circuit – Reactive current before phase change is cut to enable silent and low-consumption drive Minimum Speed Setting Pin – Minimum speed can be set with external resistor. The start assistance circuit enables start at extremely low speed. Constant-Voltage Output Pin for Hall Bias Lock Protection and Automatic Reset Functions Rotation Speed Detection (FG) and Lock Detection (RD) Outputs PW PACKAGE (TOP VIEW) OUT2P OUT2N VCC VLIM SENSE RMI VTH CPWM FG RD 1 2 3 4 5 6 7 8 9 10 OUT1P OUT1N SS SGND 6VREG ROFF CT IN+ HB IN– 20 19 18 17 16 15 14 13 12 11 DESCRIPTION/ ORDERING INFORMATION The TMP816 is a single-phase bipolar variable-speed fan-motor predriver that works with an external PWM signal. A highly efficient, quiet and low power consumption motor driver circuit with a large variable speed can be implemented by adding a small number of external components. This device is optimal for driving large-scale fan motors (with large air volume and large current) such as those used in servers and consumer products. <br/> <br/> <br/> <br/> <br/> <br/> <br/> <br/> <br/> ORDERING INFORMATION (1) PACKAGE (2) TA –30°C to 95°C (1) (2) TSSOP – PW Reel of 2000 ORDERABLE PART NUMBER TMP816PWR TOP-SIDE MARKING TMP816 For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2009, Texas Instruments Incorporated TMP816 SLVS787 – MAY 2009 ........................................................................................................................................................................................................ www.ti.com BLOCK DIAGRAM CT Discharge Circuit 0.47 µF to 1 µF FG RD Discharge Pulse VCC 6VREG 6VREG OUT1N OUT1P ROFF Hall Controller Hall Bias HB Hysteresis Amplifier IN+ IN– OUT2N SS OUT2P Thermal Shutdown Oscillator RMI VTH VLIM SENSE CPWM SGND TRUTH TABLE During full-speed rotation IN– IN+ CT OUT1P OUT1N OUT2P OUT2N FG RD MODE H L L L – – H L L OUT1 → 2 drive L H – H L – OFF H L L H VTH 2 H CPWM L H H L OFF – – H L – H OFF – OFF OUT2 → 1 drive OFF Lock protection IN– IN+ OUT1P OUT1N OUT2P OUT2N MODE H L L – – H OUT1 → 2 Drive L H – H L – OUT2 → 1 Drive H L OFF – – H L H – H OFF – During rotation, regeneration in lower TR Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated TMP816 www.ti.com ........................................................................................................................................................................................................ SLVS787 – MAY 2009 TERMINAL FUNCTIONS TERMINAL I/O DESCRIPTION NAME NO. OUT2P 1 O Upper-side driver output OUT2N 2 O Lower-side driver output Power supply. For the CM capacitor that is a power stabilization capacitor for PWM drive and for absorption of kickback, the capacitance of 0.1 µF to 1 µF is used. In this device, the lower TR performs current regeneration by switching the upper TR. Connect CM between VCC and GND, with the thick pattern and along the shortest route. Use a zener diode if kickback causes excessive increase of the supply voltage, because such increase may damage the device. VCC 3 VLIM 4 I Activates the current limiter when SENSE voltage is higher than VLIM voltage. Connect to 6VREG when not used. SENSE 5 I Sense input. Connect to GND when not used. RMI 6 I Minimum speed setting. Connect to 6VREG when not used. If device power can be removed before power is removed from RMI, insert a current limiting resistor to prevent inflow of large current. VTH 7 I VTH voltage is generated by filtering the PWM-IN input. If device power can be removed before power is removed from VTH, insert a current limiting resistor to prevent inflow of large current. CPWM 8 O Connect to capacitor CP to set the PWM oscillation frequency. With CP = 100 pF, oscillation occurs at 25 kHz and provides the basic frequency of PWM. FG 9 O Open collector output, which can detect the rotation speed using the FG output according to the phase shift. Leave open when not used. RD 10 O Open collector output. Outputs low during rotation and high at stop. Leave open when not used. IN– 11 I Hall input HB 12 O This is a Hall element bias, that is, the 1.5-V constant-voltage output. IN+ 13 I Hall input. Make connecting traces as short as possible to prevent carrying of noise. To futher limit noise, insert a capacitor between IN+ and IN–. The Hall input circuit is a comparator having a hysteresis of 20 mV. The application should ensure that the Hall input level more than three times (60 mVp-p) this hysteresis. CT 14 O Lock detection time setting. Capacitor CT is connected. ROFF 15 I Sets the soft switching time to cut the reactive current before phase change. Connect to 6VREG when not used. 6VREG 16 O 6-V regulator output SGND 17 SS 18 O Connect to soft-start setting capacitor. Connect the capacitor between 6VREG and SS. Enables setting of the soft-start time according to the capacity of the capacitor (see Figure 3 and Figure 4). Connect to ground if not used. OUT1N 19 O Lower-side driver output OUT1P 20 O Upper-side driver output Connected to the control circuit power supply system. Copyright © 2009, Texas Instruments Incorporated Submit Documentation Feedback 3 TMP816 SLVS787 – MAY 2009 ........................................................................................................................................................................................................ www.ti.com ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range (unless otherwise noted) VALUE VCC Supply voltage VOUT Output voltage OUT1P, OUT1N, OUT2P, OUT2N 18 V IOUT Continuous output current OUT1P, OUT1N, OUT2P, OUT2N 50 mA IHB Continuous output current HB 10 mA VTH Input voltage VTH 8 mA VRD VFG Output voltage RD, FG 18 V IRD IFG Continuous output current RD, FG 10 mA θJA Package thermal impedance (2) Tstg Storage temperature range (1) (2) 18 V 83°C/W –65°C to 150°C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The package thermal impedance is calculated in accordance with JESD 51-7. RECOMMENDED OPERATING CONDITIONS TA = 25°C VCC Supply voltage VTH VTH input voltage VICM Hall input common phase input voltage TA Operating free-air temperature MIN MAX 6 16 V 0 7 V 0.2 3 V –30 95 °C MIN TYP MAX UNIT 5.8 6 6.15 V 4.35 4.55 4.75 V 1.45 1.65 1.85 18 25 32 kHz V Full-speed mode UNIT ELECTRICAL CHARACTERISTICS VCC = 12 V, TA = 25°C (unless otherwise noted) PARAMETER TEST CONDITIONS V6VREG Output voltage VCRH High-level output voltage VCRL Low-level output voltage fPWM Oscillation frequency VCTH High-level output voltage 3.4 3.6 3.8 VCTL Low-level output voltage 1.4 1.6 1.8 V ICT1 Charge current 1.6 2 2.5 µA ICT2 Discharge current 0.16 0.2 0.28 µA RCT Charge/discharge current ratio 8 10 12 VON Output voltage OUT_N 4 10 V IOP Sink current OUT_P 15 20 mA VHN Hall input sensitivity H+, H- VRD VFG Low-level output voltage IRDL IFGL Output leakage current ISS Discharge current ICC Supply current 4 6VREG IHB = 5 mA CPWM CP = 100 pF CT IO = 20 mA Zero peak value (including offset and hysteresis) IRD = 5 mA or IFG = 5 mA V 10 20 mV 0.15 0.3 V 30 µA µA RD, FG Submit Documentation Feedback VRD = 16 V or VFG = 16 V SS VSS = 1 V 0.4 0.5 0.6 During drive 4 10 14 During lock protection 4 10 14 mA Copyright © 2009, Texas Instruments Incorporated TMP816 www.ti.com ........................................................................................................................................................................................................ SLVS787 – MAY 2009 APPLICATION INFORMATION CB = ~0.022 µF RB = 10 kW ROUT = 100 W VZ = 18 V SOP8901 RF RFG, RRD = 10 kW to 100 W 6VREG VCC 6VREG H SS RD HB FG IN– SENSE IN+ VLIM RMI 6VREG ROFF R = 0 to 5 kW OUT1P VTH OUT1N PWM-IN CPWM CP = 100 pF 25 kHz OUT2P CT OUT2N SGND CT = 0.47 µF Figure 1. 12-V Sample Application Circuit Copyright © 2009, Texas Instruments Incorporated Submit Documentation Feedback 5 TMP816 SLVS787 – MAY 2009 ........................................................................................................................................................................................................ www.ti.com f = 25 kHz (CP = 100 pF) ON duty large VTH voltage 4.55 V RMI voltage CPWM 1.65 V ON duty small PWM-IN disconnected 0V Rotation set to minimum speed (stop mode) PWM control variable speed Low speed High speed Full speed 12 V VCC 0V FG A. Minimum speed setting (stop) mode PWM-IN input is filtered to generate the VTH voltage. At low speed, the fan rotates with the minimum speed set with RMI during low speed. If the minimum speed is not set (RMI = 6VREG), the fan stops. B. Low ↔ high speed mode PWM control is made through comparison of oscillation and VTH voltages with CPWM changing between 1.6 V ↔ 4.6 V. Upper and lower TRs are turned ON when the VTH voltage is higher. The upper output TR is turned OFF when the VTH voltage is lower, and the coil current is regenerated in the lower TR. Therefore, as the VTH voltage lowers, the output ON duty increases, increasing the coil current and raising the motor speed. The rotation speed is fed back by the FG output. C. Full speed mode The full-speed mode becomes effective with the VTH voltage of 1.65 V or less. (VTH must be equal to GND when the speed control is not used.) D. PWM-IN input disconnection mode When the PWM-IN input pin is disconnected, VTH becomes 1.65 V or less and the output enables full drive at 100%. The fan runs at full speed (see Figure 1). Figure 2. Control Timing 6 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated TMP816 www.ti.com ........................................................................................................................................................................................................ SLVS787 – MAY 2009 SS Voltage 4.55 V RMI Voltage CPWM VTH Voltage 1.65 V 0V Lock Protection Soft-Start Section VTH Set Speed 100% ON Duty Cycle 0% Time Figure 3. Soft-Start Control Timing (VTH < RMI Voltage) SS Voltage VTH Voltage 4.55 V RMI Voltage CPWM 1.65 V 0V Lock Protection RMI Set Speed SoftStart Section 100% ON Duty Cycle 0% Time Figure 4. Soft-Start Control Timing (VTH > RMI Voltage) Copyright © 2009, Texas Instruments Incorporated Submit Documentation Feedback 7 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device TMP816PWR Package Package Pins Type Drawing TSSOP PW 20 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2000 330.0 16.4 Pack Materials-Page 1 6.95 B0 (mm) K0 (mm) P1 (mm) 7.1 1.6 8.0 W Pin1 (mm) Quadrant 16.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TMP816PWR TSSOP PW 20 2000 367.0 367.0 38.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. 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