ONSEMI SL12T1

SL05T1 Series
300 Watt, SOT-23 Low
Capacitance TVS for High
Speed Line Protections
This new family of TVS offers transient overvoltage protection with
significantly reduced capacitance. The capacitance is lowered by
integrating a compensating diode in series. This integrated solution
offers ESD protection for high speed interfaces such as communication
systems, computers, and computer peripherals.
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1
2
Features
3
(NC)
• TVS Diode in Series with a Compensating Diode Offers <5 pF
•
•
•
•
•
Capacitance
ESD Protection Meeting IEC 61000−4−2, 4−4, 4−5
Peak Power Rating of 300 W, 8 × 20 ms
Bi−Direction Protection Can Be Achieved By Using Two Devices
Flammability Rating UL 94 V−0
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Mechanical Characteristics:
CASE: Void-free, transfer-molded, thermosetting plastic case
FINISH: Corrosion resistant finish, easily solderable
MAXIMUM CASE TEMPERATURE FOR SOLDERING PURPOSES:
260°C for 10 Seconds
Package designed for optimal automated board assembly
Small package size for high density applications
Available in 8 mm Tape and Reel
MARKING
DIAGRAM
3
1
Lxx M G
G
2
SOT−23 (TO−236)
CASE 318
STYLE 26
Lxx = Device Code
xx = 05, 12, 15, or 24
M = Date Code*
G
= Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation and/or overbar may vary
depending upon manufacturing location.
ORDERING INFORMATION
Use the Device Number to order the 7 inch/3,000 unit reel.
Replace the “T1” with “T3” in the Device Number to order the
13 inch/10,000 unit reel.
Package
Shipping†
SOT−23
3000/Tape & Reel
SL05T1G
SOT−23
(Pb−Free)
3000/Tape & Reel
SL12T1G
SOT−23
(Pb−Free)
3000/Tape & Reel
SOT−23
3000/Tape & Reel
SOT−23
(Pb−Free)
3000/Tape & Reel
SOT−23
3000/Tape & Reel
SOT−23
(Pb−Free)
3000/Tape & Reel
Device
SL05T1
SL15T1
SL15T1G
SL24T1
SL24T1G
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
DEVICE MARKING INFORMATION
See specific marking information in the device marking
column of the table on page 3 of this data sheet.
© Semiconductor Components Industries, LLC, 2013
March, 2013 − Rev. 8
1
Publication Order Number:
SL05T1/D
SL05T1 Series
MAXIMUM RATINGS
Symbol
Value
Unit
Peak Power Dissipation @ 8x20 usec (Note 1)
@ TL ≤ 25°C
Rating
Ppk
300
W
IEC 61000−4−2
Level 4
Contact Discharge
Air Discharge
IEC 61000−4−4
EFT
IEC 61000−4−5
Lightning
Vpp
±8
±16
40
12
kV
kV
A
A
Total Power Dissipation on FR−5 Board (Note 2) @ TA = 25°C
Derate above 25°C
°PD°
225
1.8
°mW°
mW/°C
Thermal Resistance Junction to Ambient
RqJA
556
°C/W
Total Power Dissipation on Alumina Substrate (Note 3) @ TA = 25°C
Derate above 25°C
°PD°
300
2.4
°mW
mW/°C
Thermal Resistance Junction−to−Ambient
RqJA
417
°C/W
Junction and Storage Temperature Range
TJ, Tstg
− 55 to +150
°C
TL
260
°C
Lead Solder Temperature − Maximum (10 Second Duration)
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Non−repetitive current pulse per Figure 2
2. FR−5 = 1.0 x 0.75 x 0.62 in.
3. Alumina = 0.4 x 0.3 x 0.024 in., 99.5% alumina
ELECTRICAL CHARACTERISTICS
I
(TA = 25°C unless otherwise noted)
IF
UNIDIRECTIONAL
Symbol
Parameter
IPP
Maximum Reverse Peak Pulse Current
VC
Clamping Voltage @ IPP
VRWM
IR
VBR
IT
QVBR
VC VBR VRWM
Working Peak Reverse Voltage
Maximum Reverse Leakage Current @ VRWM
IR VF
IT
Breakdown Voltage @ IT
Test Current
IPP
Maximum Temperature Coefficient of VBR
IF
Forward Current
VF
Forward Voltage @ IF
ZZT
Maximum Zener Impedance @ IZT
IZK
Reverse Current
ZZK
Maximum Zener Impedance @ IZK
Uni−Directional TVS
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2
V
SL05T1 Series
ELECTRICAL CHARACTERISTICS
Breakdown Voltage
(Note 4)
VC, Clamping Voltage
(Note 5)
Capacitance
@1A
@5A
Max
IPP
Max
(V)
(V)
(A)
Typ
Max
8.0
9.8
11
17
3.5
5.0
13.3
15.5
19
24
12
3.5
5.0
16.7
18.5
24
30
10
3.5
5.0
26.7
29
43
55
5.0
3.5
5.0
VBR @ 1 mA (Volts)
VRWM
IR @ VRWM
Device
Device
Marking
(V)
(mA)
Min
SL05
L05
5.0
20
6.0
SL12
L12
12
1.0
SL15
L15
15
1.0
SL24
L24
24
1.0
@ VR = 0 V, 1 MHz (pF)
4. VBR measured at pulse test current of 1 mA at an ambient temperature of 25°C
5. Surge current waveform per Figure 2
TYPICAL CHARACTERISTICS
100
1
0.1
0.01
0.1
1
10
PULSE WIDTH (ms)
100
tr
90
% OF PEAK PULSE CURRENT
PPK, PEAK POWER (kW)
10
PULSE WIDTH (tP) IS DEFINED
AS THAT POINT WHERE THE
PEAK CURRENT DECAY = 8 ms
80
70
60
HALF VALUE IRSM/2 @ 20 ms
50
40
30
tP
20
10
0
1000
0
20
40
80
60
t, TIME (ms)
Figure 1. Maximum Peak Power Rating
Figure 2. 8 × 20 ms Pulse Waveform
10
4
3.5
3
LEAKAGE (mA)
C, CAPACITANCE (pF), 1 MHz FREQ.
PEAK VALUE IRSM @ 8 ms
2.5
SL05
2
SL15
1.5
SL24
1
SL05T1
1
0.1
0.5
0
@ ZERO BIAS
@ 50% VRWM
0.01
@ VRWM
Figure 3. Typical Junction Capacitance
−55
25
TEMPERATURE (°C)
150
Figure 4. Typical Leakage Over Temperature
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SL05T1 Series
Applications Background
This new family of TVS devices (SL05T1 series) are
designed to protect sensitive electronics such as
communications systems, computers, and computer
peripherals against damage due to ESD conditions or
transient voltage conditions. Because of their low
capacitance value (less than 5 pF), they can be used in high
speed I/O data lines. Low capacitance is achieved by
integrating a compensating diode in series with the TVS
which is basically based in the below theoretical principle:
• Capacitance in parallel: CT = C1+C2+....+Cn
• Capacitance in series: 1/CT = (1/C1)+(1/C2)+....+(1/Cn)
The Figure 5 shows the integrated solution of the SL05T1
series device:
COMPENSATING
DIODE
2
1
3
3
1
2
Figure 6.
An alternative solution to protect unidirectional lines, is to
connect a fast switching steering diode in parallel with the
SL05T1 series device. When the steering diode is
forward−biased, the TVS will avalanche and conduct in
reverse direction. It is important to note that by adding a
steering diode, the effective capacitance in the circuit will be
increased, therefore the impact of adding a steering diode
must be taken in consideration to establish whether the
incremental capacitance will affect the circuit functionality
or not. The Figure 7 shows the connection between the
steering diode and the SL05T1 series device:
TVS
Figure 5.
In the case that an over−voltage condition occurs in the I/O
line protected by the SL05T1 series device, the TVS is
reversed−biased while the compensation diode is
forward−biased so the resulting current due to the transient
voltage is drained to ground.
If protection in both polarities is required, an additional
device is connected in inverse−parallel with reference to the
first one, the Figure 6 illustrates the inverse−parallel
connection for bi−directional or unidirectional lines:
SL05T1 DEVICE
STEERING DIODE
Figure 7.
Another typical application in which the SL05T1 series
device can be utilized, is to protect multiple I/O lines. The
protection in each of the I/O lines is achieved by connecting
two devices in inverse−parallel. The Figure 8 illustrates how
multiple I/O line protection is achieved:
INPUT
OUTPUT
Figure 8.
For optimizing the protection, it is recommended to use ground planes and short path lengths to minimize the PCB’s ground inductance.
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4
SL05T1 Series
PACKAGE DIMENSIONS
SOT−23 (TO−236)
CASE 318−08
ISSUE AP
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH
THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM
THICKNESS OF BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS.
D
SEE VIEW C
3
HE
E
DIM
A
A1
b
c
D
E
e
L
L1
HE
q
c
1
2
e
b
0.25
q
A
L
A1
MIN
0.89
0.01
0.37
0.09
2.80
1.20
1.78
0.10
0.35
2.10
0°
MILLIMETERS
NOM
MAX
1.00
1.11
0.06
0.10
0.44
0.50
0.13
0.18
2.90
3.04
1.30
1.40
1.90
2.04
0.20
0.30
0.54
0.69
2.40
2.64
−−−
10 °
MIN
0.035
0.001
0.015
0.003
0.110
0.047
0.070
0.004
0.014
0.083
0°
INCHES
NOM
0.040
0.002
0.018
0.005
0.114
0.051
0.075
0.008
0.021
0.094
−−−
MAX
0.044
0.004
0.020
0.007
0.120
0.055
0.081
0.012
0.029
0.104
10°
STYLE 26:
PIN 1. CATHODE
2. ANODE
3. NO CONNECTION
L1
VIEW C
SOLDERING FOOTPRINT*
0.95
0.037
0.95
0.037
2.0
0.079
0.9
0.035
SCALE 10:1
0.8
0.031
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for
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any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture
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PUBLICATION ORDERING INFORMATION
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Phone: 421 33 790 2910
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Phone: 81−3−5817−1050
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ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
SL05T1/D