Weltrend Semiconductor, Inc. WT7510 GENERAL DESCRIPTION The WT7510 provides protection circuits, power good output (PGO), fault protection latch (FPL_N), and a protection detector function (PDON_N) control. It can minimize external components of switching power supply systems in personal computer. The Over Voltage Detector (OVD) monitors 3.3V, 5V, 12V input voltage level. The Under Voltage Detector (UVD) monitors 3.3V, 5V input voltage level. When OVD or UVD detect the fault voltage level, the FPL_N is latched HIGH and PGO go low. The latch can be reset by PDON_N goo HIGH. There is 2.4 ms delay time for PDON_N turn off FPL_N. When OVD and UVD detect the right voltage level, the power good output (PGO) will be issue. FEATURES • • • • • • • • The Over Voltage Detector (OVD) monitors 3.3V, 5V, 12V input voltage level. The Under Voltage Detector (UVD) monitors 3.3V, 5V input voltage level. Both of the power good output (PGO) and fault protection latch (FPL_N) are Open Drain Output. 75 ms time delay for UVD. 300 ms time delay for PGO. 38 ms for PDON_N input signal De–bounce. 73 us for internal signal De–glitches. 2.4 ms time delay for PDON_N turn-off FPL_N. PIN ASSIGNMENT AND PACKAGE TYPE PGI 1 8 PGO GND 2 7 VCC FPL_N 3 6 V5 PDON_N 4 5 V33 Package type ORDERING INFORMATION 8–Pin Plastic DIP WT7510–N080WT–12 8–Pin Plastic SOIC WT7510–S080WT–12 PIN DESCRIPTION Pin No. Pin Name TYPE Description 1 PGI I power good input pin 2 GND P Ground 3 FPL_N O fault protection latch output pin(open drain output) 4 PDON_N I protection detector function ON/OFF control input pin 5 V33 I 3.3V input pin 6 V5 I 5V input pin 7 VCC I Supply voltage / 12V input pin 8 PGO O power good output pin(open drain output) 242 2F, No. 24, Industry E. 9th RD., Science-Based Industrial Park, Hsin-Chu, Taiwan TEL:886-3-5780241 FAX:886-3-5794278.5770419 Email:[email protected]