UTC 3511 CMOS IC PC POWER SUPPLY SUPERVISORS DESCRIPTION The UTC 3511 provides protection circuits, power good output (PGO), fault protection latch (FPL_N), and protection detector function (PDON_N) control. It can minimize external components of switching power supply systems in personal computer. The Over Voltage Detector (OVD) monitors 3.3V, 5V, 12V input voltage level. The Under Voltage Detector (UVD) monitors 3.3V, 5V input voltage level. When OVD or UVD detect the fault voltage level, the FPL_N is latched HIGH and PGO goes LOW. The latch can be reset by PDON_N going HIGH. There is 2.4ms delay time for PDON_N turning off FPL_N. When OVD and UVD detect the right voltage level, the power good output (PGO) will be issue. SOP-8 DIP-8 FEATURES * The Over Voltage Detector (OVD) monitors 3.3V, 5V, 12V input voltage level. * The Under Voltage Detector (UVD) monitors 3.3V, 5V input voltage level. * Both of the power good output (PGO) and the fault protection latch (FPL_N) are Open Drain Output. * 75 ms time delay for UVD. * 300 ms time delay for PGO. * 38 ms for PDON_N input signal De-bounce. * 73 us for internal signal De-glitches. * 2.4 ms time delay for PDON_N turn-off FPL_N. PIN CONFIGURATION UTC PGI 1 8 PGO GND 2 7 VDD FPL_N 3 6 V5 PDON_N 4 5 V33 UNISONIC TECHNOLOGIES CO., LTD. 1 QW-R502-015,B UTC 3511 CMOS IC PIN DESCRIPTION PIN No. PIN NAME 1 PGI TYPE I DESCRIPTION Power good input pin 2 GND P Ground 3 FPL-N O Fault protection latch output pin (open drain output) 4 PDON-N I Protection detector function ON/OFF control input pin 5 V33 I 3.3V input pin 6 V5 I 5V input pin 7 VDD I Supply voltage/12V input pin 8 PGO O Power good output pin(open drain output) BLOCK DIAGRAM VDD Power On Reset Vcc Low Voltage 150uA 3.6V CLK POR CLK Clock Generator LVRST PWR CLK PWR PWR RST 38ms debounce PDON_N 2.4ms CLR delay V33 UN CLK + - RWR CLR 75ms delay OV + V5 UN + CLK RST FPL_N R - 73us debounce OV S Q + VDD OV VDD + CLK RST CLK 73us debounce CLR PGO PGI UN + 300ms delay 1.2V ABSOLUTE MAXIMUM RATINGS PARAMETER Supply voltage Input Voltage Output Voltage PDON_N,V5,V33,PGI FPL_N PGO SYMBOL RATINGS UNIT VDD Vin -0.3 ~ 16 -0.3 ~ 7 -0.3 ~ 16 -0.3 ~ 7 -40 ~ 125 -55 ~ 150 V V VOUT Operating temperature Topr Storage temperature Tstg Note:Stresses above those listed may cause permanent damage to the devices UTC V °C °C UNISONIC TECHNOLOGIES CO., LTD. 2 QW-R502-015,B UTC 3511 CMOS IC RECOMMENDED OPERATING CONDITIONS PARAMETER Supply Voltage Input Voltage Output Voltage SYMBOL MIN TYP MAX UNIT VDD Vin 3.8 12 15 7 15 7 30 10 V V V V mA mA ms PDON_N,V5,V33,PGI FPL_N PGO Output Sink Current VOUT FPL_N PGO Iosink Supply Voltage Rising Time Trs 1 ELECTRICAL CHARACTERISTICS (Ta=25℃, VDD=5V) Over Voltage Detection PARAMETER SYMBOL Over voltage threshold TEST CONDITIONS V33 V5 VDD/ V12 ILEAKAGE FPL_N=5V Isink=10mA VOL Isink=30mA Leakage current (FPL_N) Low level output voltage (FPL_N) MIN TYP. MAX UNIT 3.7 5.7 12.8 3.9 6.1 13.4 5 0.3 0.7 4.1 6.5 13.9 V MIN TYP. MAX UNIT 2.55 4.1 1.16 2.69 4.3 1.20 5 0.4 2.83 4.47 1.24 V TYP. MAX UNIT 1.2 uA V V MAX UNIT uA V PGI and PGO PARAMETER SYMBOL Under voltage threshold V33 V5 Input threshold voltage (PGI) Leakage current (PGO) Low level output voltage (PGO) VPGI TEST CONDITIONS ILEAKAGE PGO=5V VOL Isink=10mA uA V PDON_N PARAMETER Input pull-up current High-level input voltage Low-level input voltage SYMBOL Il VIH VIL TEST CONDITIONS MIN PDON_N=0V 150 2.4 TOTAL DEVICE PARAMETER Supply current low voltage UTC SYMBOL Icc VDD TEST CONDITIONS MIN TYP. PDON_N=5V 1 3 UNISONIC TECHNOLOGIES CO., LTD. mA V 3 QW-R502-015,B UTC 3511 CMOS IC SWITCHING CHARACTERISTICS, VDD=5V PARAMETER SYMBOL De-bounce time (PDON_N) Delay time (PGI to PGO) De-bounce time (PDON_N) De-glitch time PDON_N to FPL_N delay time Internal UVD delay time tdb1 tdelay tdb2 tg tdelay2 tdelay3 TEST CONDITIONS MIN TYP. MAX 32 38 61 200 300 490 32 38 61 63 73 120 Tdb2+2.0 Tdb2+2.4 Tdb2+3.8 Ta=-40°C ~ 125°C FPL_N go low & every Time PGI>1.2V 65 75 122 UNIT ms ms ms us ms ms APPLICATION CIRCUIT 5V 5V 0.01uF PGI 470 PDON_N 1 PGI PGO 8 2 GND VDD 7 3 FPL_N V5 6 V33 5 4 PDON_N 12V 5V VSB 3.3V 3511 0.01uF UTC UNISONIC TECHNOLOGIES CO., LTD. 4 QW-R502-015,B UTC 3511 CMOS IC APPLICATION TIMMING 1. PGI (UNDER_VOLTAGE): PDON_N FPL_N tdelay2 tdb1 tdelay1+tg PGO tdb2 PGI PDON_N tdelay2 FPL_N tdb1 tdelay1+tg PGO tdelay1+tg tdb2 PGI UTC UNISONIC TECHNOLOGIES CO., LTD. 5 QW-R502-015,B UTC 3511 CMOS IC 2. V33,V5 (UNDER_VOLTAGE): PDON_N FPL_N tdelay2 tdb1 tdelay1+tg PGO tdb2 V33 / V5 PDON_N tdelay3=75mS tdelay3+tg FPL_N tdb1 tdelay2 tdb1 tdelay1+tg PGO tdb2 PGI V33 / V5 UTC UNISONIC TECHNOLOGIES CO., LTD. 6 QW-R502-015,B UTC 3511 CMOS IC 3. V33,V5,V12 (OVER_VOLTAGE): PDON_N tdelay2 FPL_N tdb1 tdelay1+tg PGO tdb2 V33 / V5 / V12 PDON_N tg FPL_N tdb1 tdelay2 tdb1 tdelay1+tg PGO tdb2 V33 / V5 / V12 UTC assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all UTC products described or contained herein. UTC products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. UTC UNISONIC TECHNOLOGIES CO., LTD. 7 QW-R502-015,B