APITECH HS3860C

H S 3860
12-Bit D AC with Input Registers
D ata Converter Line
FEATURES
•
•
•
•
•
±1/2 LSB Linearity
±0.3% A bsolute A ccuracy Over Temperature
7µSec Settling Time
Input Registers
M l L-STD-883 Screening A vailable (B M odels)
DESCRIPTION
The HS 3860 is a 12-Bit digital-to-analog converter
packaged in a hermetically sealed 24-pin doublewidth, dual-in-line package.
The HS 3860 includes an internal precision reference
supply, a fast output amplifier for minimum settling
time, and input registers for easier microprocessor
interface.
The D/A is constructed using hybrid microcircuit
technology and includes a precision thin-film
network, laser-trimmed to produce a high linearity,
high accuracy converter, stable over a wide
temperature range. Errors in linearity and accuracy
are specified at room temperature as well as
operating temperature extremes for both military
and commercial products.
M IL-STD-883 Rev. C, Level B screening and processing
is available in the “ B” grade device. Operating
temperature range for the HS 3860B is – 55ºC to
+125ºC.
FUNCTIONAL DIAGRAM
BIT 12
LSB
BIT 1
M SB
1
REGISTER
ENA BLE
2 3
4 5
6
7 8 9 10 11 12
20
18
6k
19
6k
INPUT REGISTERS
12-BIT NETW ORK & SW ITCHES
REF
12k
16
24
REF
OUT
REF
IN
23
GA IN
A DJ
8k
17
BIPOLA R
OFFSET
165Cedar Hill Street,Marlborough,MA01752 Tel:508.485.6350 Fax: 508.485.5168
www.SpectrumMicrowave.com
15
OUTPUT
HS3860
SPECIFICATIO N S
(Typical for all models @ +25ºC and nominal power supplies unless otherwise noted)
M ODEL
TY PE
DIGITA L INPUTS
Resolution
Coding
Logic Levels (Data Inputs)
Logic “ 1” (30µA max)
Logic “ 0” (-0.6mA max)
Register Enable Logic1
Logic “ 1” (60µA max)
Logic “ 0” (-1.2mA max)
Pulse W idth
Set up Time
A NA LOG OUTPUT
Output V oltage Ranges
Output Impedance
Output Current
Short Circuit Duration
A CCURA CY
Linearity Error 2, 3
0ºCto+70ºC
-55ºCto+125ºC
M onotonicity
Temperature
Full Scale A bsolute Error 4,5
+25º C
-55ºCto+125ºC 6
Zero Error 4,5
25ºC
-55ºCto 125ºC 6
Gain Error
Gain Drift
CONV ERSION SPEED
Settling Time
20V Step
10V Step
Output Slew Rate
REFERENCE OUTPUT
V oltage
Tempco
Load Current
POW ER SUPPLIES
Power Supply Range
+15V Supply
–15V Supply
+5V Supply
Power Supply Rejection
+15V (from+14.55 to
+15.45V )
–15V (from -14.55 to
–15.45V )
Current Drain
+15V Supply
–15V Supply
+5V Supply
Power Consumption
HS3860
Digital to A nalog Converter
12 bits
Complementary Binary/
Offset Binary
+2V min. +5.5V max
-0.5V min, +0.7V max
+2V min, +5.5V max
-0.5V min, +0.7V max
60nS min
40nS min
0 to +10; ±5; ±10
0.05 typ
±5mA
Indefinite to Common
M ECHA NICA L
Case Style
NOTES
1. The analog output follows the digital input when Register Enable is a
logic “ 0” . The analog output is constant when the Register
Enable is a logic “ 1” .
2. SatCon guarantees and tests maximum Linearity Error at the
extremes of the operating temperature and at room temperature. ±1/2
LSB Linearity Error guarantees monotonicity and differential linearity
of ±1 LSB.
3. One LSB is 0.024% F.S.R. for a 12 bit DA C.
4. F.S.R. is Full Scale Range. For the ± 10V output range the F.S.R. is 20 volts
and 1 LSB is 4.88mV .
5. A bsolute A ccuracy Error includes linearity, gain, offset and all other errors
and is specified without the use of adjustments.
6. Commercial M odels are specified over a temperature range of 0ºCto+70ºC.
±1/4 LSBtyp;±1/2 LSBmax
±1/2 LSB max
Guaranteed Over
±0.05% F.S.R. typ;
±0.1% F.S.R. max
±0.15% F.S.R. typ;
±0.3% F.S.R. max
±0.025% F.S.R. typ;
±0.05% F.S.R. max
±0.05% F.S.R. typ;
±0.1% F.S.R. max
±0.1%
±10ppm/ºC
5µS typ; 7µS max
3µS typ; 5µS max
20 volts/µS typ
6.3 volts ±5%
± 10ppm/ºC
100µA max
+14V to +18V
–14V to –18V
+4V to +7V
–0.01% F.S.R./% typ;
±0.04% F.S.R./% max
±0.001% F.S.R./% typ;
±0.004% F.S.R./% max
25mA max
25mA max
50mA max
675mW typ, 1000mW max
24 Pin DIP. Ceramic
1.310
(33.274)
MAX
24
0.165
(4.191)
MAX
13
0.800
(20.321)
MAX
1
12
PIN (1) INDEX
0.100 ±0.005
TY P
(2.54 ±0.13)
0.600 ±0.010
(15.24 ±0.25)
0.010 +0.002 – 0.001
(0.25 + 0.005 – 0.003)
0.025 ±0.010
(0.64 ±0.25)
0.800
(20.321)
0.205
DIM ENSIONS
(5.21)
inches
M IN
(mm)
0.018 ±0.002
(0.46 ±0.05)
PIN DESIGNA TIONS
PIN
1
2
3
4
5
6
7
8
9
10
11
12
FUNCTION
Bit 1
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
Bit 8
Bit 9
Bit 10
Bit 11
Bit 12
PIN
24
23
22
21
20
19
18
17
16
15
14
13
FUNCTION
REF OUT
-Full Scale A djust (Gain Adj)
+15V
Common
Summing Junction
Register Enable
10V Range
Bipolar Offset
REF IN
A nalog Output
-15V
+5V
Continued on next page.
HS3860
APPLICATIO N IN FO RMATIO N
FULL SCA LE A DJUSTM ENT
+15V
6.8M
PIN 20
10k TO
100k
Range of A djustment = ±0.2% FSR
– 15V
Connect the full scale potentiometer as show n and apply all “ 0's” to
the digital inputs. A djust the potentiometer until the analog output
is equal to the maximum positve voltage for the chosen output range
as show n in the table
ZERO (-FULL SCA LE) A DJUSTM ENT
+15V
6.8M
10k TO
100k
PIN 23
– 15V
Range of A djustment = ±0.2% FSR
Connect the zero (-full scale) potentiometer as show n and apply all
“ 1's” to the digital inputs. A djust the potentiometer until the analog
output is equal to zero volts for unipolar output ranges and -full
scale voltage for bipolar output ranges.
INPUT LOGIC CODING A ND OUTPUT RA NGE SELECTION
DIGITA L INPUT
M SB
LSB
0000 0000 0000
0000 0000 0001
0111 1111 1111
1000 0000 0000
1111 1111 1110
1111 1111 1111
CONNECT
PIN TO PIN
A NA LOG OUTPUT
0 to +10V ±5V
±10V
+9.9976V +4.9976V +9.9951V
+9.9951V +4.9951V +9.9902V
+5.0000V
– 0.0024V
+0.0024V
0.0000V
24 to 16
17 to 21
15 to 18
0.0000V
0.0000V
– 0.0024V – 0.0049V
– 4.9976V – 9.9951V
– 5.0000V – 10.0000V
24 to 16 24 to 16
17 to 20 17 to 20
15 to 18
O RD ERIN G IN FO RMATIO N
M ODEL
HS3860B
HS 3860C
DESCRIPTION
M IL,12BitD/A
COM M , 12 Bit D/A
Specifications subject to change w ithout notice.