AD AD561SD-883B

This specification documents the detailed requirements for Analog Devices space qualified die including die
qualification as described for Class K in MIL-PRF-38534, Appendix C, Table C-II except as modified herein.
The manufacturing flow described in the STANDARD DIE PRODUCTS PROGRAM brochure at
http://www.analog.com/aerospace is to be considered a part of this specification.
This data sheet specifically details the space grade version of this product. A more detailed operational
description and a complete data sheet for commercial product grades can be found at
www.analog.com/AD561
The complete part number(s) of this specification follow:
Part Number
Description
AD561-000C
Low Cost 10-Bit Monolithic D/A Converter
1. GND
2. BPOS
3. -Vs
4. LSB
5. BIT 9
6. BIT 8
7. BIT 7
8. BIT 6
9. BIT 5
10. BIT 4
11. BIT 3
12. BIT 2
13. MSB
14. +Vs
15. IOUT
16. RFB
Digital Input Voltage (VIN) ..........................................................
Output Voltage Compliance (VOUT) .............................................
10V Span Resistor to Ground ...................................................
Bipolar Offset Resistor To Ground ............................................
Operating Temperature Range .................................................
Storage Temperature Range ....................................................
Supply Voltage ..........................................................................
Junction Temperature (TJ)………………………………... ............
VCC to Ground
-2V to +10V
VCC to VEE
VCC to VEE
-55C to +125C
-65C to +150C
±16.5V
175°C
Absolute Maximum Ratings Notes
1/
2/
TA = 25C, unless otherwise noted.
Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum
levels may degrade performance and affect reliability.
In accordance with class-K version of MIL-PRF-38534, Appendix C, Table C-II, except as
modified herein.
(a) Qual Sample Size and Qual Acceptance Criteria – 25/2
(b) Qual Sample Package – Sidebrazed DIP
(c) Pre-screen electrical test over temperature performed post-assembly prior to die qualification.
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Table I Notes:
1/
2/
VCC = +5V, VEE = -15V, TA = 25C, unless otherwise specified.
Also tested in CMOS mode. VCC = +15V, VEE = -15V, VIH = 10.5V, VIL = 4.5V.
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Table II Notes:
1/
2/
VCC = +5V, VEE = -15V, unless otherwise specified.
Also tested in CMOS mode. VCC = +15V, VEE = -15V, VIH = 10.5V, VIL = 4.5V.
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5.1
5.2
5.3
HTRB is not applicable for this drawing.
Burn-in is per MIL-STD-883 Method 1015 test condition B or C.
Steady state life test is per MIL-STD-883 Method 1005.