MAXIM MAX1735EUK

MAX1735EUK
Rev. A
RELIABILITY REPORT
FOR
MAX1735EUK
PLASTIC ENCAPSULATED DEVICES
December 23, 2001
MAXIM INTEGRATED PRODUCTS
120 SAN GABRIEL DR.
SUNNYVALE, CA 94086
Written by
Reviewed by
Jim Pedicord
Quality Assurance
Reliability Lab Manager
Bryan J. Preeshl
Quality Assurance
Executive Director
Conclusion
The MAX1735 successfully meets the quality and reliability standards required of all Maxim products. In addition,
Maxim’s continuous reliability monitoring program ensures that all outgoing product will continue to meet Maxim’s quality
and reliability standards.
Table of Contents
I. ........Device Description
II. ........Manufacturing Information
III. .......Packaging Information
IV. .......Die Information
V. ........Quality Assurance Information
VI. .......Reliability Evaluation
......Attachments
I. Device Description
A. General
The MAX1735 negative-output, low-dropout linear regulator operates from a -2.5V to -6.5V input and delivers a
guaranteed 200mA with a low 80mV dropout. The high-accuracy (±1%) output voltage is preset or can be adjusted
from -1.25V to -5.5V with an external resistive voltage-divider.
An internal N-channel MOSFET allows for a low 85µA quiescent current virtually independent of the load, making this
device ideal for battery-powered portable equipment, such as PDAs, mobile phones, cordless phones, and wireless
data modems.
The device is available in several preset output voltage versions: -5.0V, -3.0V, and -2.5V. All versions offer a 1nA lowpower shutdown mode, short-circuit protection, and thermal overload protection. The device is offered in a tiny 5-pin
SOT23 package.
B. Absolute Maximum Ratings
Item
IN,SET to GND
SHDN to GND
Out to GND
PGND to GND
Operating Temp.
Storage Temp.
Lead Temp. (10 sec.)
Power Dissipation
5-Pin SOT
Derates above +70°C
5-Pin SOT
Rating
-7V to +0.3V
(VIN-0.3)V to +7V
(VIN-0.3)V to +0.3V
-0.3V to +0.3V
-40°C to +85°C
-65°C to +150°C
+300°C
571mW
7.1mW/°C
II. Manufacturing Information
A. Description/Function:
200mA, Negative Output, Low Drop-Out Linear Regulator
B. Process:
S12 (Standard 1.2 micron silicon gate CMOS)
C. Number of Device Transistors:
293
D. Fabrication Location:
Oregon, USA
E. Assembly Location:
Malaysia or Thailand
F. Date of Initial Production:
July, 2000
III. Packaging Information
A. Package Type:
5-Lead SOT
B. Lead Frame:
Copper
C. Lead Finish:
Solder Plate
D. Die Attach:
Silver-filled Epoxy
E. Bondwire:
Gold (1.0 mil dia.)
F. Mold Material:
Epoxy with silica filler
G. Assembly Diagram:
Buildsheet # 05-2301-0057
H. Flammability Rating:
Class UL94-V0
I. Classification of Moisture Sensitivity
per JEDEC standard JESD22-A112: Level 1
IV. Die Information
A. Dimensions:
55 x 42 mils
B. Passivation:
Si3N4/SiO2 (Silicon nitride/ Silicon dioxide)
C. Interconnect:
Aluminum/Si (Si = 1%)
D. Backside Metallization:
None
E. Minimum Metal Width:
1.2 microns (as drawn)
F. Minimum Metal Spacing:
1.2 microns (as drawn)
G. Bondpad Dimensions:
5 mil. Sq.
H. Isolation Dielectric:
SiO2
I. Die Separation Method:
Wafer Saw
V. Quality Assurance Information
A. Quality Assurance Contacts: Jim Pedicord (Reliability Lab Manager)
Bryan Preeshl (Executive Director of QA)
Kenneth Huening (Vice President)
B. Outgoing Inspection Level:
0.1% for all electrical parameters guaranteed by the Datasheet.
0.1% For all Visual Defects.
C. Observed Outgoing Defect Rate: < 50 ppm
D. Sampling Plan: Mil-Std-105D
VI. Reliability Evaluation
A. Accelerated Life Test
The results of the 135°C biased (static) life test are shown in Table 1. Using these results, the Failure
Rate (λ) is calculated as follows:
λ=
1
=
MTTF
1.83
192 x 4389 x 160 x 2
(Chi square value for MTTF upper limit)
Temperature Acceleration factor assuming an activation energy of 0.8eV
λ = 6.79 x 10-9
λ = 6.79 F.I.T. (60% confidence level @ 25°C)
This low failure rate represents data collected from Maxim’s reliability qualification and monitor programs.
Maxim also performs weekly Burn-In on samples from production to assure reliability of its processes. The
reliability required for lots which receive a burn-in qualification is 59 F.I.T. at a 60% confidence level, which equates
to 3 failures in an 80 piece sample. Maxim performs failure analysis on rejects from lots exceeding this level. The
attached Burn-In Schematic (Spec. # 06-5610) shows the static circuit used for this test. Maxim also performs
1000 hour life test monitors quarterly for each process. This data is published in the Product Reliability Report (RR1L).
B. Moisture Resistance Tests
Maxim evaluates pressure pot stress from every assembly process during qualification of each new design.
Pressure Pot testing must pass a 20% LTPD for acceptance. Additionally, industry standard 85°C/85%RH or
HAST tests are performed quarterly per device/package family.
C. E.S.D. and Latch-Up Testing
The PY25 die type has been found to have all pins able to withstand a transient pulse of ±400V, per MilStd-883 Method 3015 (reference attached ESD Test Circuit). Latch-Up testing has shown that this device
withstands a current of ±250mA and/or ±20V.
Table 1
Reliability Evaluation Test Results
MAX1735EUK
TEST ITEM
TEST CONDITION
Static Life Test (Note 1)
Ta = 135°C
Biased
Time = 192 hrs.
FAILURE
IDENTIFICATION
SAMPLE
SIZE
NUMBER OF
FAILURES
DC Parameters
& functionality
160
0
Moisture Testing (Note 2)
Pressure Pot
Ta = 121°C
P = 15 psi.
RH= 100%
Time = 168hrs.
DC Parameters
& functionality
355
0
85/85
Ta = 85°C
RH = 85%
Biased
Time = 1000hrs.
DC Parameters
& functionality
77
0
DC Parameters
77
Mechanical Stress (Note 2)
Temperature
Cycle
-65°C/150°C
1000 Cycles
Method 1010
0
Note 1: Life Test Data may represent plastic D.I.P. qualification lots for the Small Outline package.
Note 2: Generic Package/Process data
Attachment #1
TABLE II. Pin combination to be tested. 1/ 2/
Terminal A
(Each pin individually
connected to terminal A
with the other floating)
Terminal B
(The common combination
of all like-named pins
connected to terminal B)
1.
All pins except VPS1 3/
All VPS1 pins
2.
All input and output pins
All other input-output pins
1/ Table II is restated in narrative form in 3.4 below.
2/ No connects are not to be tested.
3/ Repeat pin combination I for each named Power supply and for ground
(e.g., where VPS1 is VDD, VCC, VSS, VBB, GND, +VS, -VS, VREF, etc).
3.4
Pin combinations to be tested.
a.
Each pin individually connected to terminal A with respect to the device ground pin(s) connected
to terminal B. All pins except the one being tested and the ground pin(s) shall be open.
b.
Each pin individually connected to terminal A with respect to each different set of a combination
of all named power supply pins (e.g., VSS1, or VSS2 or VSS3 or VCC1 , or VCC2 ) connected to
terminal B. All pins except the one being tested and the power supply pin or set of pins shall be
open.
c.
Each input and each output individually connected to terminal A with respect to a combination of
all the other input and output pins connected to terminal B. All pins except the input or output pin
being tested and the combination of all the other input and output pins shall be open.
TERMINAL C
R1
R2
S1
TERMINAL A
REGULATED
HIGH VOLTAGE
SUPPLY
S2
C1
DUT
SOCKET
SHORT
TERMINAL B
TERMINAL D
Mil Std 883D
Method 3015.7
Notice 8
R = 1.5kΩ
Ω
C = 100pf
CURRENT
PROBE
(NOTE 6)
ONCE PER SOCKET
ONCE PER BOARD
25 mA
2 OHMS
- 6 VOLTS
1 uF
100 uF
1
N/C
N/C
8
2
SET
OUT
7
3
SHDNB
4
N/C
VIN
6
G
5
1 uF
200 OHMS
8 PIN NSO
DEVICES:
MAX 1735
MAX. EXPECTED CURRENT = 25 mA
DOCUMENT I.D. 06-5610
REVISION B
DRAWN BY: TEK TAN
NOTES:
MAXIM
TITLE: BI
Circuit (MAX 1735)
PAGE
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