74LVC373A - Diodes Incorporated

74LVC373A
OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS
Description
Pin Assignments
The 74LVC373A provides eight transparent D-type latches. While the
latch-enable (LE) input is high, the Q outputs follow the data (D)
inputs. When LE is taken low, the Q outputs are latched at the logic
levels set up at the D inputs. A buffered output-enable (OE) input can
be used to place the eight outputs in either a normal logic state (high
or low logic levels) or the high-impedance state. In the high-impedance
NEW PRODUCT
state, the outputs neither load nor drive the bus lines significantly. The
high-impedance state and increased drive provide the capability to
drive bus lines without interface or pullup components. OE does not
affect the internal operations of the latches. Old data can be retained
or new data can be entered while the outputs are in the highimpedance state.
The device is designed for operation with a power supply range of
1.65V to 3.6V.
The inputs are tolerant to 5.5V allowing this device to be used in a
mixed voltage environment. The device is fully specified for partial
Applications
power down applications using IOFF. The IOFF circuitry disables the
•
General Purpose Logic
output preventing damaging current backflow when the device is
•
Bus Driving
powered down.
•
Power Down Signal Isolation
•
Features
•
•
Supply Voltage Range from 1.65V to 3.6V
Sinks or Sources 24mA at VCC = 3V
•
•
CMOS Low Power Consumption
IOFF Supports Partial Power Down Operation
•
Inputs or Outputs Accept Up to 5.5V
•
Wide array of products such as:
ƒ
ƒ
PCs, Notebooks, Netbooks, Ultrabooks
Networking Computer Peripherals, Hard Drives, CD/DVD
ROM
ƒ
TV, DVD, DVR, Set Top Box
Inputs Can Be Driven by 3.3V or 5V Allowing for Mixed Voltage
Applications
•
•
Schmitt Trigger Action at All Inputs
Typical VOLP (Quiet Output Ground Bounce) Less Than 0.8V with
VCC = 3.3V and TA = +25°C
•
Typical VOHV (Quiet Output dynamic VOH) Greater than 2.0V with
VCC = 3.3V and TA = +25°C
•
•
•
ESD Protection Tested per JESD 22
ƒ
Exceeds 200-V Machine Model (A115)
ƒ
Exceeds 2000-V Human Body Model (A114)
ƒ
Exceeds 1000-V Charged Device Model (C101)
Latch-Up Exceeds 250mA per JESD 78, Class II
All devices are:
ƒ
Totally Lead-Free & Fully RoHS compliant (Notes 1 & 2)
ƒ
Halogen and Antimony Free. “Green” Device (Note 3)
Notes:
1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant.
2. See http://www.diodes.com/quality/lead_free.html for more information about Diodes Incorporated’s definitions of Halogen and Antimony free,
"Green" and Lead-Free.
3. Halogen and Antimony free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and
<1000ppm antimony compounds.
74LVC373A
Document number: DS35893 Rev. 1 - 2
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© Diodes Incorporated
74LVC373A
Ordering Information
74 LVC
Logic Device
NEW PRODUCT
74 : Logic Prefix
Function
373 :
Package
(Note 4 & 5)
74LVC373AT20-13
T20
TSSOP-20
74LVC373AQ20-13
Q20
V-QFN4525-20
Notes:
Package
Octal
Transparent DType Latch with
3-State Outputs
Package
Code
Part Number
373A xxx -13
Packing
T20 : TSSOP-20
Q20 : QFN-20
Package
Size
-13 : 13” Tape & Reel
13” Tape and Reel
Quantity
Part Number Suffix
6.4mm X 6.5mm X 1.2mm
0.65 mm lead pitch
2.5mm X 4.5mm X 0.95mm
0.50 mm lead pitch
2500/Tape & Reel
-13
2500/Tape & Reel
-13
4. Pad layout as shown on Diodes Inc. suggested pad layout document AP02001, which can be found on our website at
http://www.diodes.com/datasheets/ap02001.pdf.
5. V-QFN4525-20 is a JEDEC recognized naming convention that specifies the package thickness category as V and the number 4525 describes the
package as 4.5mm X 2.5mm.
Pin Descriptions
Logic Diagram
Pin
Number
Pin
Name
Description
OE
1
OE
Output Enable
LE
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Q1
D1
D2
Q2
Q3
D3
D4
Q4
GND
LE
Q5
D5
D6
Q6
Q7
D7
D8
Q8
Vcc
Latch Output
Data Input
Data Input
Latch Output
Latch Output
Data Input
Data Input
Latch Output
Ground
Latch Enable
Latch Output
Data Input
Data Input
Latch Output
Latch Output
Data Input
Data Input
Latch Output
Supply Voltage
D1
1
(Each Latch)
INPUTS
11
OE
3
D
C
D2
4
D
C
D3
7
D
C
D4
8
D
C
D5
13
D
C
D6
14
D
C
D7
17
D
C
D8
18
D
C
74LVC373A
Document number: DS35893 Rev. 1 - 2
Function Table
Q
Q
Q
Q
Q
Q
Q
Q
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2
5
6
9
12
15
16
19
Q1
Q2
L
L
L
H
LE
H
H
L
X
OUTPUT
D
H
L
X
X
Q
H
L
Q0
Z
Q3
Q4
Q5
Q6
Q7
Q8
June 2014
© Diodes Incorporated
74LVC373A
Absolute Maximum Ratings (Notes 6 & 7)
Symbol
ESD HBM
ESD CDM
ESD MM
Rating
2
1
200
Unit
kV
kV
V
V
Supply Voltage Range
-0.5 to +7.0
VI
Input Voltage Range
-0.5 to +7.0
V
IIK
Input Clamp Current
-20
mA
IOK
Output Clamp Current
VCC
NEW PRODUCT
Description
Human Body Model ESD Protection
Charged Device Model ESD Protection
Machine Model ESD Protection
IO
VI< 0V
VO< 0V
Continuous Output Current -0.5V < VO VCC +0.5V
-50
mA
±50
mA
ICC
Continuous Current Through VCC
100
mA
IGND
Continuous Current Through GND
-100
mA
Operating Junction Temperature
-40 to +150
°C
TSTG
Storage Temperature
-65 to +150
°C
PTOT
Total Power Dissipation
500
mW
TJ
Notes:
6. Stresses beyond the absolute maximum may result in immediate failure or reduced reliability. These are stress values and device operation should be
within recommend values.
7. Forcing the maximum allowed voltage could cause a condition exceeding the maximum current or conversely forcing the maximum current could
cause a condition exceeding the maximum voltage. The ratings of both current and voltage must be maintained within the controlled range.
Recommended Operating Conditions (Note 8)
Symbol
VCC
Parameter
Supply Voltage
VI
Input Voltage
VO
Output Voltage
IOH
IOL
Conditions
Operating
Data Retention Only
—
High-Level Output Current
Low-Level Output Current
Min
1.65
1.5
Max
3.6
—
Unit
V
V
0
5.5
V
—
0
VCC
V
VCC = 1.65V
—
-4
VCC = 2.3V
—
-8
VCC = 2.7V
—
-12
VCC = 3.0V
—
-24
VCC = 1.65V
—
4
VCC = 2.3V
—
8
VCC = 2.7V
—
12
VCC = 3.0V
—
24
mA
mA
∆t/∆V
Input Transition Rise or Fall Rate
—
10
ns/V
TA
Operating Free-Air Temperature
-40
+125
°C
Note:
8. Unused inputs should be held at VCC or ground.
74LVC373A
Document number: DS35893 Rev. 1 - 2
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74LVC373A
Electrical Characteristics
NEW PRODUCT
Symbol
Parameter
VIH
High-Level Input
Voltage
VIL
Low-Level Input
Voltage
VOH
VOL
IOFF
II
IOZ
ICC
High-Level Output
Voltage
Low-Level Output
Voltage
Power Down
Leakage Current
Input Current
Control Pins
Z-state Current
Including Input
Current I/O Pins
Supply Current
∆ICC
Additional Supply
Current
Ci
Input Capacitance
Test Conditions
TA = -40°C to +85°C
Min
Max
VCC
1.65V to 1.95V
2.3V to 2.7V
3.0V to 3.6V
—
VCC X 0.65
1.7
2
1.65V to 1.95V
—
2.3V to 2.7V
3.0V to 3.6V
—
—
TA = +85°C to +125°C
Min
Max
—
—
VCC X 0.65
1.7
2
VCC X 0.35
0.7
0.8
—
—
—
Unit
—
—
—
VCC X 0.35
0.7
0.8
V
V
IOH = -50μA
1.65V to 3.6V
VCC -0.2
—
VCC -0.3
—
IOH = -4mA
1.65V
1.2
—
1.05
—
IOH = -8mA
2.3V
1.7
—
1.65
—
IOH = -12mA
2.7V
3.0V
2.2
2.4
—
—
2.05
2.48
—
—
IOH = -24mA
3.0V
2.3
—
2.0
—
IOL = 100μA
1.65V to 3.6V
—
0.2
—
0.3
IOL = 4mA
1.65V
—
0.45
—
0.65
IOL = 8mA
2.3V
—
0.60
—
0.80
IOL = 12mA
2.7V
—
0.40
—
0.60
IOL = 24mA
3.0V
—
0.55
—
0.80
0V
—
±10
—
20
μA
VI = GND or 5.5V
0 to 3.6V
—
±5
—
±20
μA
VI = GND or 5.5V
VO = 0 to 5.5V
3.6V
—
±5
—
±20
µA
3.6V
—
10
—
40
μA
2.7V to 3.6V
—
500
—
5000
μA
VI or VO = 0 or 5.5V
VI = GND or VCC, IO = 0
One input at Vcc-0.6V
Io = 0A
Control Pins VI = GND or
VCC
I/O Pins
74LVC373A
Document number: DS35893 Rev. 1 - 2
0V to 3.6V
4 of 10
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4.0 typical
5.5 typical
4.0 typical
5.5 typical
V
V
pF
June 2014
© Diodes Incorporated
74LVC373A
Switching Characteristics
NEW PRODUCT
Symbol
Parameter
Test
Conditions
tW
Pulse Width
LE
Figure 1
tSU
Set-up Time DN to
LE
Figure 1
tH
Hold Time
DN to LE
Figure 1
Propagation Delay
DN to QN
tPD
Propagation Delay
LE to QN
tPD
Enable Time
tEN
OE
to QN
Disable Time
tDIS
OE
to QN
Disable Time
tDIS
OE
tsk(0)
to QN
Figure 1
Figure 1
Figure 1
Figure 1
Figure 1
Output Skew Time
Vcc
1.8V ± 0.15V
2.5V ± 0.3V
2.7V
3.3V ± 0.3
1.8V ± 0.15V
2.5V ± 0.3V
2.7V
3.3V ± 0.3
1.8V ± 0.15V
2.5V ± 0.3V
2.7V
3.3V ± 0.3
1.8V ± 0.15V
2.5V ± 0.3V
2.7V
3.3V ± 0.3
1.8V ± 0.15V
2.5V ± 0.3V
2.7V
3.3V ± 0.3
1.8V ± 0.15V
2.5V ± 0.3V
2.7V
3.3V ± 0.3
1.8V ± 0.15V
2.5V ± 0.3V
2.7V
3.3V ± 0.3
1.8V ± 0.15V
2.5V ± 0.3V
2.7V
3.3V ± 0.3V
3.3V ± 0.3V
TA = +25°C
Typ.
2.5
2.0
1.7
1.5
2.0
1.5
1.0
1.0
1.5
1.0
1.0
1.0
6
3.9
4.2
3.8
7
4.5
5.4
4.4
7.8
4
4.4
4.1
7.8
4
4.4
4.1
7.8
4
4.4
4.1
Min
5.0
4.0
3.0
3.0
4.0
3.0
2.0
2.0
3.0
2.0
1.5
1.5
1
1
1
1.5
1
1
1
1.5
1
1
1
1.7
1
1
1
1.7
1
1
1
1.7
Max
12.2
7.8
7.8
6.8
14.8
10
8.2
7.2
16.5
9
8.3
7.3
16.5
9
8.3
7.3
16.5
9
8.3
7.3
1.0
-40°C to +85°C
Min
Max
5.0
4.0
3.0
3.0
4.0
3.0
2.0
2.0
3.0
2.0
1.5
1.5
1
12.7
1
8.3
1
7.3
1.5
6.3
1
15.3
1
10.5
1
9.5
1.5
8.5
1
17
1
9.5
1
8.5
1.7
7.5
1
17
1
9.5
1
8.5
1.7
7.5
1
17
1
9.5
1
8.5
1.7
7.5
+85°C to +125°C
Min
Max
5.5
4.5
3.5
3.5
4.5
3.5
2.5
2.5
3.5
2.5
2.0
2.0
1
16.9
1
8.7
1
9.5
1.5
8.0
1
22.5
1
12.4
1
12.0
1.5
11.0
1
14.2
1
8.2
1
10.0
1.7
9.0
1
14.2
1
8.2
1
10.0
1.7
9.0
1
14.2
1
8.2
1
10.0
1.7
9.0
1.5
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
Operating Characteristics
TA = +25°C
Symbol
Cpd
Parameter
Test Conditions
Power dissipation
capacitance per gate
F = 10MHz
Outputs Enabled
Typ
9.9
10.2
10.6
VCC
1.8V ± 0.15V
2.5V ± 0.3V
3.3V ± 0.3V
Unit
pF
Package Characteristics
Symbol
θJA
θJC
θJA
θJC
Note:
Parameter
Thermal Resistance
Junction-to-Ambient
Thermal Resistance
Junction-to-Case
Thermal Resistance
Junction-to-Ambient
Thermal Resistance
Junction-to-Case
Package
Test Conditions
Min
Typ
Max
Unit
TSSOP-20
(Note 9)
—
74
—
°C/W
TSSOP-20
(Note 9)
—
15
—
°C/W
V-QFN4525-20
(Note 9)
—
67
—
°C/W
V-QFN4525-20
(Note 9)
—
20
—
°C/W
9. Test conditions for TSSOP-20 and V-QFN4525-20: Devices mounted on 4 layer FR-4 substrate PC board, 2oz copper, with minimum recommended
pad layout per JESD 51-7.
74LVC373A
Document number: DS35893 Rev. 1 - 2
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© Diodes Incorporated
74LVC373A
NEW PRODUCT
Parameter Measurement Information
Inputs
VCC
TEST
S1
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
Vload
GND
VM
VLOAD
CL
≤2ns
VCC/2
2 x VCC
30pF
1KΩ
0.15V
≤2ns
VCC/2
2 x VCC
30pF
500Ω
0.15V
2.7V
≤2.5ns
1.5V
6V
50pF
500Ω
0.3V
2.7V
≤2.5ns
1.5V
6V
50pF
500Ω
0.3V
VI
tr/tf
1.8V±0.15V
VCC
2.5V±0.2V
VCC
2.7V
3.3V±0.3V
RL
V∆
Voltage Waveform Pulse Duration
Voltage Waveform Enable and Disable Times
Low and High Level Enabling
Voltage Waveform Propagation Delay Times
Inverting and Non Inverting Outputs
Notes:
A. Includes test lead and test apparatus capacitance.
B. All pulses are supplied at pulse repetition rate ≤ 10 MHz.
C. Inputs are measured separately one transition per measurement.
D. tPLZ and tPHZ are the same as tdis.
E. tPZL and tPZH are the same as tEN0
F. tPLH and tPHL are the same as tPD.
Figure 1 Load Circuit and Voltage Waveforms
74LVC373A
Document number: DS35893 Rev. 1 - 2
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74LVC373A
Marking Information
(1)
TSSOP20
NEW PRODUCT
74LVC373A
Part Number
74LVC373AT20
(2)
Package
TSSOP-20
QFN-20 (V-QFN4525-20)
( Top View )
YY : Year : 08, 09,10~
WW : Week : 01~52; 52
Logo
Part Number
74LVC373A
represents 52 and 53 week
X X : Internal Codes
YY WW X X
terminal 1
index area
Part Number
74LVC373AQ20
74LVC373A
Document number: DS35893 Rev. 1 - 2
Package
V-QFN4525-20
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74LVC373A
Package Outline Dimensions (All Dimensions in mm)
Please see AP02002 at http://www.diodes.com/datasheets/ap02002.pdf for the latest version.
(1)
TSSOP-20
D
NEW PRODUCT
θ2
E1
E
0.25
Gauge Plane
θ3
PIN 1
ID MARK
Seating Plane
θ1
e
L
DETAIL
L1
A2
b
(2)
A
TSSOP-20
Dim
Min
Max
Typ
A
1.20
A1
0.05
0.15
A2
0.80
1.05
b
0.19
0.30
c
0.09
0.20
D
6.40
6.60
6.50
E
6.20
6.60
6.40
E1
4.30
4.50
4.40
e
0.65 BSC
L
0.45
0.75
0.60
L1
1.0 REF
0°
8°
θ1
10°
14°
12°
θ2
10°
14°
12°
θ3
All Dimensions in mm
A1
QFN-20 (V-QFN4525-20)
1
A
3
A
A
e
n
a
l
P
g
n
i
t
a
e
S
D
I
1
#
n
i
P
︶
D
︵
e
x
4
1
Z
︵ ︶
E
2
E
2
D
x
0
2
L
︵
Document number: DS35893 Rev. 1 - 2
︵
x
0
2
74LVC373A
b
x
4
Z
︵ ︶
︶
V-QFN4525-20
Dim
Min
Max
Typ
A
0.75
0.85
0.80
A1
0.00
0.05
0.02
A3
0.15
b
0.18
0.30
0.23
D
4.45
4.55
4.50
D2
2.85
3.15
3.00
E
2.45
2.55
2.50
E2
0.85
1.15
1.00
e
0.50BSC
L
0.30
0.50
0.40
Z
0.385
Z1
0.885
All Dimensions in mm
︶
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74LVC373A
Suggested Pad Layout
Please see AP02001 at http://www.diodes.com/datasheets/ap02001.pdf for the latest version.
(1)
TSSOP-20
X (20x)
NEW PRODUCT
C
Y1
Dimensions
C
X
X1
Y
Y1
Y2
Y2
Y (20x)
Value (in mm)
0.650
0.420
6.270
1.789
4.160
7.720
X1
(2)
QFN-20 (V-QFN4525-20)
4
X
3
X
1
X
2
X
3
Y
1
Y
2
Y
Y
Document number: DS35893 Rev. 1 - 2
Value (in mm)
0.500
0.330
0.600
3.200
3.830
4.800
0.600
1.200
0.830
2.800
C
X
74LVC373A
Dimensions
C
X
X1
X2
X3
X4
Y
Y1
Y2
Y3
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74LVC373A
IMPORTANT NOTICE
NEW PRODUCT
DIODES INCORPORATED MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDS TO THIS DOCUMENT,
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
(AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION).
Diodes Incorporated and its subsidiaries reserve the right to make modifications, enhancements, improvements, corrections or other changes
without further notice to this document and any product described herein. Diodes Incorporated does not assume any liability arising out of the
application or use of this document or any product described herein; neither does Diodes Incorporated convey any license under its patent or
trademark rights, nor the rights of others. Any Customer or user of this document or products described herein in such applications shall assume
all risks of such use and will agree to hold Diodes Incorporated and all the companies whose products are represented on Diodes Incorporated
website, harmless against all damages.
Diodes Incorporated does not warrant or accept any liability whatsoever in respect of any products purchased through unauthorized sales channel.
Should Customers purchase or use Diodes Incorporated products for any unintended or unauthorized application, Customers shall indemnify and
hold Diodes Incorporated and its representatives harmless against all claims, damages, expenses, and attorney fees arising out of, directly or
indirectly, any claim of personal injury or death associated with such unintended or unauthorized application.
Products described herein may be covered by one or more United States, international or foreign patents pending. Product names and markings
noted herein may also be covered by one or more United States, international or foreign trademarks.
This document is written in English but may be translated into multiple languages for reference. Only the English version of this document is the
final and determinative format released by Diodes Incorporated.
LIFE SUPPORT
Diodes Incorporated products are specifically not authorized for use as critical components in life support devices or systems without the express
written approval of the Chief Executive Officer of Diodes Incorporated. As used herein:
A. Life support devices or systems are devices or systems which:
1. are intended to implant into the body, or
2. support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the
labeling can be reasonably expected to result in significant injury to the user.
B. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the
failure of the life support device or to affect its safety or effectiveness.
Customers represent that they have all necessary expertise in the safety and regulatory ramifications of their life support devices or systems, and
acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any
use of Diodes Incorporated products in such safety-critical, life support devices or systems, notwithstanding any devices- or systems-related
information or support that may be provided by Diodes Incorporated. Further, Customers must fully indemnify Diodes Incorporated and its
representatives against any damages arising out of the use of Diodes Incorporated products in such safety-critical, life support devices or systems.
Copyright © 2014, Diodes Incorporated
www.diodes.com
74LVC373A
Document number: DS35893 Rev. 1 - 2
10 of 10
www.diodes.com
June 2014
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