E2.1 - Aplus Integrated Circuits Inc.

Integrated Circuits Inc.
aPR33A3
aPR33A3
Fixed 1/ 2/ 4/ 8 Message Mode (E2.1)
Datasheet
Recording voice IC
APLUS INTEGRATED CIRCUITS INC.
Address:
3 F-10, No. 32, Sec. 1, Chenggung Rd., Taipei, Taiwan 115, R.O.C.
TEL:
886-2-2782-9266
FAX:
886-2-2782-9255
WEBSITE :
http://www.aplusinc.com.tw
Technology E-mail:
[email protected]
Sales E-mail:
[email protected]
Ver. A
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Nov 26, 2013
Integrated Circuits Inc.
aPR33A3
FEATURES
Operating Voltage Range: 3V ~ 6.5V
Single Chip, High Quality Audio/Voice Recording & Playback Solution
No External ICs Required
Minimum External Components
User Friendly, Easy to Use Operation
Programming & Development Systems Not Required
340-680 sec duration. Voice Recording Length in aPR33A3
Powerful 16-Bits Digital Audio Processor.
Nonvolatile Flash Memory Technology
No Battery Backup Required
External Reset pin.
Powerful Power Management Unit
Very Low Standby Current: 1uA
Low Power-Down Current: 15uA
Supports Power-Down Mode for Power Saving
Built-in Audio-Recording Microphone Amplifier
No External OPAMP or BJT Required
Easy to PCB layout
Configurable analog interface
Differential-ended MIC pre-amp for Low Noise
High Quality Line Receiver
High Quality Analog to Digital, DAC and PWM module
Resolution up to 16-bits
Simple And Direct User Interface
Averagely 1,2,4 or 8 voice messages record & playback
Ver. A
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Integrated Circuits Inc.
aPR33A3
DESCRIPTION
Today’s consumers demand the best in audio/voice. They want crystal-clear sound wherever they
are in whatever format they want to use. APLUS delivers the technology to enhance a listener’s
audio/voice experience.
The aPR33A series are powerful audio processor along with high performance audio
analog-to-digital converters (ADCs) and digital-to-analog converters (DACs). The aPR33A series
are a fully integrated solution offering high performance and unparalleled integration with analog
input, digital processing and analog output functionality. The aPR33A series incorporates all the
functionality required to perform demanding audio/voice applications. High quality audio/voice
systems with lower bill-of-material costs can be implemented with the aPR33A series because of its
integrated analog data converters and full suite of quality-enhancing features such as sample-rate
convertor.
The aPR33A series E2.1 is specially designed for simple key trigger, user can record & play the
message averagely for 1, 2, 4 or 8 voice message(s) by switch and be adjusted the sample rate by
using different values of resistors to meet your requirement. It is suitable in simple interface or
need to limit the length of single message, e.g. toys, leave messages system, answering machine
etc. Meanwhile, this mode provides the power-management system. Users can let the chip enter
power-down mode when unused. It can effectively reduce electric current consuming to 15uA and
increase the using time in any projects powered by batteries.
Ver. A
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Nov 26, 2013
Integrated Circuits Inc.
aPR33A3
PIN CONFIGURATION
DIP / SOP Package
Ver. A
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Integrated Circuits Inc.
aPR33A3
PIN DESCRIPTION
Pin Names
Pin No
VDDP
VDD
VDDA
8
10
18
VDDL
24
VSSP
VSSL
VSSA
5
11
17
Power ground.
VLDO
25
Internal LDO output.
VCORE
16
Positive power supply for core.
VREF
19
Reference voltage.
VCM
20
Common mode voltage.
Rosc
26
INPUT
Oscillator resistor input.
RSTB
27
INPUT
Reset. (Low active)
SRSTB
28
INPUT
System reset, pull-down a resistor to the VSSL.
MIC+
MIC-
21
22
INPUT
Microphone differential input.
MICG
23
OUTPUT
VOUT1
7
INPUT
VOUT2
6
INPUT
/REC
12
INPUT
Record Mode. (Low active)
M0
13
INPUT
Message-0.
M1
14
INPUT
Message-1.
M2
15
INPUT
Message-2.
M3
9
INPUT
Message-3.
M4
3
INPUT
Message-4.
M5
4
INPUT
Message-5.
M6 / MSEL0
1
INPUT
Message-6, Message select 0.
M7 / MSEL1
2
INPUT
Message-7, Message select 1.
Ver. A
TYPE
Description
Positive power supply.
Microphone ground.
PWM output to drive speaker directly.
DAC option.
PWM output to drive speaker directly.
DAC output.
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aPR33A3
TYPICAL APPLICATION
Ver. A
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aPR33A3
MESSAGE MODE
In fixed 1/ 2/ 4/ 8 message mode (E2.1), user can divide the memory averagely for 1, 2, 4 or 8
message(s). The message mode will be applied after chip reset by the MSEL0 and MSEL1 pin.
Please note the message should be recorded and played in same message mode, we CAN NOT
guarantee the message is complete after message mode changed. For example, user recorded 8
messages in the 8-message mode, those messages can be played in 8-message mode only. If user
changed to 1, 2 or 4 message mode, system will discard those messages.
8-Message Mode
The memory will be divided to 8 messages averagely when both MSEL0 and MSEL1 pin float
after chip reset.
Ver. A
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Integrated Circuits Inc.
aPR33A3
4-Message Mode
The memory will be divided to 4 messages averagely when MSEL0 pin connected to VSS and
MSEL1 pin float after chip reset.
2-Message Mode
The memory will be divided to 2 messages averagely when MSEL1 pin connected to VSS and
MSEL0 pin float after chip reset.
Ver. A
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Integrated Circuits Inc.
aPR33A3
1-Message Mode
The memory will be for 1 message when both MSEL0 and MSEL1 pin connected to VSS after
chip reset.
Ver. A
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Integrated Circuits Inc.
aPR33A3
RECORD MESSAGE
During the /REC pin drove to VIL, chip in the record mode.
When the message pin (M0, M1, M2 … M7) drove to VIL in record mode, the chip will playback
“beep” tone and message record starting.
The message record will continue until message pin released or full of this message, and the chip
will playback “beep” tone 2 times to indicate the message record finished.
If the message already exist and user record again, the old one’s message will be replaced.
The following fig. showed a typical record circuit for 8-message mode. We connected a slide-switch
between /REC pin and VSS, and connected 8 tact-switches between M0 ~ M7 pin and VSS. When
the slide-switch fixed in VSS side and any tact-switch will be pressed, chip will start message record
and until the user releases the tact-switch.
Note: After reset, /REC and M0 to M7 pin will be pull-up to VDD by internal resistor.
Ver. A
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Integrated Circuits Inc.
aPR33A3
PLAYBACK MESSAGE
During the /REC pin drove to VIH, chip in the playback mode.
When the message pin (M0, M1, M2 … M7) drove from VIH to VIL in playback mode, the message
playback starting.
The message playback will continue until message pin drove from VIH to VIL again or end of this
message.
The following fig. showed a typical playback circuit for 8-message mode. We connected a
slide-switch between /REC and VSS, and connected 8 tact-switches between M0 ~ M7 and VSS.
When the slide-switch fixed in float side and any tact-switch will be pressed, chip will start message
playback and until the user pressed the tact-switch again or end of message.
Note: After reset, /REC and M0 to M7 pin will be pull-up to VDD by internal resistor.
Ver. A
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Integrated Circuits Inc.
aPR33A3
VOICE INPUT
The aPR33A series supported single channel voice input by microphone or line-in. The following fig.
showed circuit for different input methods: microphone, line-in and mixture of both.
(A) Microphone
Ver. A
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Integrated Circuits Inc.
aPR33A3
Note: The 10K resistor used for input signal adjust, and the value just for reference.
(B) Line-In
Note: The 10K resistor used for input signal adjust, and the value just for reference.
(C) Microphone + Line-In
Ver. A
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Integrated Circuits Inc.
aPR33A3
VOICE OUTPUT
The aPR33A series support 2 voice output mode, PWM and DAC.
The PWM mode use VOUT1 and VOUT2 pin to drive speaker directly without external components
to save cost.
The DAC mode use VOUT2 pin to output current signal. User can use the signal to drive audio
amplifier or mix with other components in their applications to provide larger voice volume.
The following fig. show circuit for different output methods: PWM, DAC, DAC with transistor, DAC
with audio amplifier AP4890B.
(A) PWM
Ver. A
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Integrated Circuits Inc.
aPR33A3
(B) DAC
(C) DAC with transistor
Ver. A
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aPR33A3
(D) DAC with audio amplifier AP4890B
Ver. A
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Integrated Circuits Inc.
aPR33A3
BUSY
The MICG pin will be drove to low during the message record or playback, and drove to high during
idle or standby, user can detect MICG status to know chip is busy or not.
Please note it is limited for MICG pin driving current. Reference to IOH and IOL in section “DC
CHARACTERISTICS”. If MICG pin is over loading from external circuit, it will cause noise in
microphone circuit.
Ver. A
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Integrated Circuits Inc.
aPR33A3
Below is a typical application. We add one LED to indicate IC record and playback status. We
use one Resistor to limit current. And suggest R> 470Ω
Ver. A
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Integrated Circuits Inc.
aPR33A3
Below Transistor circuit is to get higher current, larger than IOHor IOL.
Ver. A
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Integrated Circuits Inc.
aPR33A3
To get best sound quality, we can use buffer or inverter to isolate MICG to avoid noise from external
circuit. Driving current is provided by buffer(inverter) only.
Ver. A
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Integrated Circuits Inc.
aPR33A3
RESET
aPR33A series can enter standby mode when RSTB pin drive to low. During chip in the standby
mode, the current consumption is reduced to ISB and any operation will be stopped, user also can
not execute any new operate in this mode.
The standby mode will continue until RSTB pin goes to high, chip will be started to initial, and
playback “beep” tone to indicate enter idle mode.
User can get less current consumption by control RSTB pin specially in some application which
concern standby current.
Ver. A
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Integrated Circuits Inc.
aPR33A3
EXAMPLE
The aPR33DB is one of the simplest solutions for achieve fixed 1/ 2/ 4/ 8 message mode demo. The
circuit board already includes the peripheral circuit which containing microphone. Developers only
need to notice how to connect with their development environment. It can effectively decrease the
time of circuit connecting & any possible mistakes. Below figure shows how to connect aPR33DB
with external key in fixed 1/ 2/ 4/ 8 message mode:
Ver. A
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Integrated Circuits Inc.
aPR33A3
BLOCK DIAGRAM
Figure 1. Block Diagram
ABSOLUTE MAXIMUM RATINGS
Ver. A
Symbol
Rating
Unit
VDD – VSS
-0.3 ~ +10.0
V
VIN
VSS-0.3 < VIN < VDD+0.3
V
VOUT
VSS < VOUT < VDD
V
T(Operating)
-40 ~ +85
℃
T(Junction)
-40 ~ +125
℃
T(Storage)
-40 ~ +125
℃
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Integrated Circuits Inc.
aPR33A3
DC CHARACTERISTICS
Symbol
VDD
Parameter
Operating Voltage
Min. Typ. Max. Unit
3.0
6.5
V
1
µA
20
µA
Conditions
ISB
Standby Current
IPDN
Power-Down Current
15
IOP(IDLE)
Operating Current (Idle)
20
mA
VDD = 5V
IOP(REC)
Operating Current (Record)
35
mA
VDD = 5V
IOP(PLAY)
Operating Current (Playback)
25
mA
VDD = 5V
VIH
"H" Input Voltage
VIL
"L" Input Voltage
IVOUT
2.5
V
0.6
VOUT Current
V
185
mA
IOH
O/P High Current
8
mA
VDD = 5V / VOH=4.5V
IOL
O/P Low Current
14
mA
VDD = 5V / VOH=0.5V
300
KΩ
External floating or drive low.
1
MΩ
External drive high.
4.7
KΩ
RNPIO
Input pin pull-down resistance
RUPIO
Input pin pull-up resistance
△Fs/Fs Frequency stability
5
%
VDD = 5V ± 1.0V
△Fc/Fc Chip to chip Frequency Variation
5
%
Also apply to lot to lot
variation.
Ver. A
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Nov 26, 2013
Integrated Circuits Inc.
aPR33A3
AC CHARACTERISTICS
Symbol
■
Parameter
Min.
Typ.
Max.
Unit
Conditions
T1
/CS Setup Time
100
--
--
mS
VDD=5.0V
T2
Trigger Setup Time
16
--
--
mS
VDD=5.0V
T3
Trigger Hold Time
16
--
--
mS
VDD=5.0V
T4
/CS Hold Time
100
--
--
uS
VDD=5.0V
Resistance Values & Sampling Frequencies
Ver. A
Resistance
Sampling
Frequency
Duration
aPR33A3
189K
6K
682 sec
147K
7K
584 sec
115K
8K
512 sec
95K
9K
454 sec
76K
10K
408 sec
60K
11K
372 sec
47K
12K
341 sec
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Integrated Circuits Inc.
aPR33A3
PACKAGE INFORMATION
28Pin 300mil SOP Package
Ver. A
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aPR33A3
28Pin 600mil DIP Package
Ver. A
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aPR33A3
HISTORY
Ver. A (2013/10/30)
- Original version data sheet for aPR33A3-E2.1
Ver. A
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