データシート

ASAHI KASEI
[AK4352]
AK4352
∆Σ
2V
AK4352
18
DR=94dB
∆Σ
DAC
D/A
MD
•
∆Σ
•
DAC
: 8kHz ∼ 50kHz
•
•
•
8
FIR
-
: 20kHz
: ±0.06dB
: 43dB
•
I/F
: MSB First, 2’s Compliment
, 16/18bit
IIS
- 18bit
: 44.1kHz
•
•
: 256fs or 384fs
• THD+N: -83dB@2V, -89dB@3V
• D-Range: 94dB@2V, 96dB@3V
: 1.10Vpp@2V
•
•
: 2V (1.8V ∼ 3.6V)
: 6mW@2V
•
•
: 16pin TSSOP
DIF0 DIF1
LRCK
BICK
SDATA
Serial Input
Interface
VCML
8X
Interpolator
∆Σ
Modulator
LPF
AOUTL
8X
Interpolator
∆Σ
Modulator
LPF
AOUTR
VDD
VSS
PD
De-emphasis
Control
DEM
Clock Divider
MCLK
CKS
M0040-J-02
VCMR
VREF
2000/11
-1-
ASAHI KASEI
[AK4352]
n
-40 ∼ +85°C
AK4352VT
AKD4352
16pin TSSOP (0.65mm pitch)
n
No.
1
2
MCLK
1
16
CKS
PD
2
15
VCML
BICK
3
14
AOUTL
SDATA
4
13
AOUTR
LRCK
5
12
VCMR
DIF0
6
11
VREF
DIF1
7
10
VDD
DEM
8
9
VSS
MCLK
PD
Top
View
I/O
I
I
“L”
“L”
3
BICK
I
4
SDATA
I
5
LRCK
I
6
7
DIF0
DIF1
I
I
8
DEM
I
9
10
VSS
VDD
-
11
VREF
I
12
13
14
15
16
:
VCMR
O
Rch
AOUTR
AOUTL
VCML
CKS
O
O
O
I
Rch
Lch
Lch
L/R
“H”
fs=44.1kHz
VDD
“L”: 256fs,
M0040-J-02
“H”: 384fs
2000/11
-2-
ASAHI KASEI
[AK4352]
(VSS=0V; Note 1)
Parameter
Power Supply
Input Current (any pins except for supplies)
Input Voltage
Ambient Operating Temperature (Power applied)
Storage Temperature
Symbol
VDD
IIN
VIND
Ta
Tstg
min
-0.3
-0.3
-40
-65
max
4.6
±10
VDD+0.3
85
150
Units
V
mA
V
°C
°C
Note 1.
:
(VSS=0V; Note 1)
Parameter
Power Supply
Voltage Reference
Note 1.
Note 2.
(Note 2)
Symbol
VDD
VREF
min
1.8
typ
2.0
-
max
3.6
VDD
Units
V
V
VREF
AOUT(typ.@0dB)=1.10Vpp*VREF/2
:
M0040-J-02
2000/11
-3-
ASAHI KASEI
[AK4352]
(
Ta=25°C; VDD=2.0V, VREF=VDD; fs=44.1kHz; BICK=64fs; Signal Frequency=1kHz;
18bit Input Data; Measurement frequency=10Hz ∼ 20kHz; RL ≥10kΩ)
Parameter
min
typ
max
Units
(Note 3)
Dynamic Characteristics
THD+N
(0dB Output)
-83
-74
dB
Dynamic Range
(-60dB Output, A-weight)
88
94
dB
S/N
(A-weight)
88
94
dB
Interchannel Isolation
90
100
dB
DC Accuracy
Interchannel Gain Mismatch
0.1
0.5
dB
Gain Drift
60
ppm/°C
Output Voltage
(Note 4)
1.02
1.10
1.18
Vpp
Load Resistance
10
kΩ
Power Supplies
Power Supply Current
Normal Operation ( PD = “H”)
3.0
4.7
mA
(Note 5)
10
50
µA
(Note 5)
6.0
20
50
9.4
100
-
mW
µW
dB
VDD
Power-Down Mode ( PD = “L”)
VDD
Power Dissipation (VDD)
Normal Operation
Power-Down Mode
Power Supply Rejection
Note 3.
-
AD725C
VDD=3.0V
THD+N: -89dB
DR: 96dB (A-weight)
S/N: 97dB (A-weight)
Note 4.
(0dB)
VREF
AOUT (typ.@0dB)=1.10Vpp*VREF/2
Note 5.
(MCLK, BICK, LRCK)
VSS
M0040-J-02
VDD
2000/11
-4-
ASAHI KASEI
[AK4352]
(Ta=25°C; VDD=1.8 ∼ 3.6V; fs=44.1kHz; DEM= “L”)
Parameter
Symbol
Digital filter
Passband
-0.1dB
(Note 6)
PB
-6.0dB
Stopband
(Note 6)
SB
Passband Ripple
PR
Stopband Attenuation
SA
Group Delay
(Note 7)
GD
Digital Filter + Analog Filter
Frequency Response 0 ∼ 20.0kHz
Note 6.
min
typ
max
Units
0
24.1
22.05
20.0
-
43
-
14.7
-
kHz
kHz
kHz
dB
dB
1/fs
-
± 0.2
-
dB
± 0.06
fs (
)
PB=0.4535fs(@-0.1dB)
SB=0.546fs(@-43dB)
Note 7.
18
DC
(Ta=25°C; VDD=1.8 ∼ 3.6V)
Parameter
High-Level Input Voltage
Low-Level Input Voltage
Input Leakage Current
Symbol
VIH
VIL
Iin
M0040-J-02
min
75%VDD
-
typ
-
max
25%VDD
±10
Units
V
V
µA
2000/11
-5-
ASAHI KASEI
[AK4352]
(Ta=25°C; VDD=1.8 ∼ 3.6V)
Parameter
256fs:
Master Clock Timing
Pulse Width Low
Pulse Width High
384fs:
Pulse Width Low
Pulse Width High
LRCK Frequency
(Note 8)
Serial Interface Timing
BICK Period
BICK Pulse Width Low
Pulse Width High
BICK rising to LRCK Edge
(Note 9)
LRCK Edge to BICK rising
(Note 9)
SDATA Hold Time
SDATA Setup Time
Reset Timing
PD Pulse Width
(Note 10)
Note 8.
Note 9.
LRCK
Note 10.
PD
BICK
“L”
Symbol
fCLK
tCLKL
tCLKH
fCLK
tCLKL
tCLKH
fs
min
2.048
28
28
3.072
23
23
8
typ
11.2896
max
12.8
16.9344
19.2
44.1
50
Units
MHz
ns
ns
MHz
ns
ns
kHz
tBCK
tBCKL
tBCKH
tBLR
tLRB
tSDH
tSDS
312.5
100
100
50
50
50
50
ns
ns
ns
ns
ns
ns
ns
tRST
300
ns
“↑”
“H”
n
50%
VDD
LRCK
tLRB
tBLR
tBCKH
50%
VDD
BICK
tSDS
SDATA
tBCKL
tSDH
50%
VDD
LSB
tRST
PD
25%VDD
M0040-J-02
2000/11
-6-
ASAHI KASEI
[AK4352]
n
AK4352
CKS
MCLK
CKS
2/3
( PD = “H”)
MCLK(256fs/384fs), LRCK(fs), BICK(32fs∼)
MCLK
MCLK
“L”
256fs “H”
384fs
384fs
1
AK4352
LRCK
(fs)
(MCLK, BICK, LRCK)
( PD = “L”)
AK4352
LRCK
LRCK (fs)
32.0kHz
44.1kHz
48.0kHz
MCLK
CKS= “L”: 256fs
CKS= “H”: 384fs
8.1920MHz
12.2880MHz
11.2896MHz
16.9344MHz
12.2880MHz
18.4320MHz
BICK (64fs)
2.0480MHz
2.8224MHz
3.0720MHz
1.
256fs or 384fs
MCLK
2/3
H
L
256fs
CKS
1. MCLK
M0040-J-02
2000/11
-7-
ASAHI KASEI
[AK4352]
n
AK4352
SDATA, BICK, LRCK
3
DIF0
DIF1
0
0 18
1
ADC
2
DSP
2
DIF1
0
0
1
1
3
DIF0
0
1
0
1
4
DAC
16
I2 S
3
LSB
16
Mode
0: 16bit
1: 18bit
2: 18bit
3: I2S
2
BICK
≥32fs
≥36fs
≥36fs
≥32fs or 36fs
“0”
2
2
3
4
2.
LRCK
Rch
Lch
BICK
SDATA
Mode 0
Don’t care
15
14
0
Don’t care
15
14
0
Don’t care
15
14
0
15
14
0
15:MSB, 0:LSB (@16bit Data)
SDATA
Mode 1
Don’t care
17
16
17:MSB, 0:LSB (@18bit Data)
17
16
*Mode 1: BICK needs 36fs or more than 36fs.
2. Mode 0,1
Rch
Lch
LRCK
BICK
SDATA
16bit
15
14
1
0
SDATA
18bit
17
16
3
2
1
0
Don’t
care
15
14
1
0
Don’t
care
17
16
3
2
1
0
Don’t
care
15
14
Don’t
care
17
16
* BICK needs 36fs or more than 36fs.
3. Mode 2
M0040-J-02
2000/11
-8-
ASAHI KASEI
[AK4352]
Lch
LRCK
Rch
BICK
SDATA
16bit
15
14
1
0
SDATA
18bit
17
16
3
2
1
0
Don’t
care
15
14
1
0
Don’t
care
17
16
3
2
1
0
Don’t
care
15
Don’t
care
17
* BICK needs 32fs or 36fs or more than 36fs.
4. Mode 3
n
IIR
fs=44.1kHz
DEM
= “H”
(50/15µs
)
n
PD
“L”
(Hi-Z)
5
PD
Internal
State
Normal Operation
Power-down
D/A In
(Digital)
Normal Operation
“0”data
GD (1)
GD (1)
(3)
D/A Out
(Analog)
Clock In
External
Mute
(5)
Mute On
5.
(1)
(2)
(4)
(5)
(3)
(4)
MCLK,LRCK,BICK
(3) PD
(2)
/
(GD)
Hi-Z
(“↑ ↓”)
(3)
M0040-J-02
2000/11
-9-
ASAHI KASEI
[AK4352]
n
PD
LRCK
“L”
MCLK
“↑”
6
External
Clock
Reset
Audio
Data
Processor
Mode
Setting
System Ground
(AKD4352)
1
MCLK
2
PD
3
BICK
4
SDATA
5
LRCK
CKS
16
VCML
15
AOUTL
14
AOUTR
13
VCMR
12
VREF
11
AK4352
Top View
6
DIF0
7
DIF1
VDD
10
8
DEM
VSS
9
+
10µ
10µ
+
Lch
MUT
Out
+
Rch
MUT
Out
+
+
0.1µ 10µ
Analog 2V
Analog Ground
6.
Note:
- LRCK = fs, BICK ≥ 32fs or 36fs, MCLK = 256fs/384fs.
- AOUT
M0040-J-02
2000/11
- 10 -
ASAHI KASEI
[AK4352]
1.
6
VDD
PC
AK4352
VREF
VDD,
VSS
2.
VREF
VREF
VREF
VSS
VCML, VCMR
10µF
VCML, VCMR
10µF
0.1µF
0.1µF
AK4352
VDD
VSS
VREF, VCML, VCMR
3.
VCML, VCMR
∆Σ
(
)
2’s
(2
)
7FFFH(@16bit)
0000H(@16bit)
VCML, VCMR
8000H(@16bit)
VCML, VCMR +
mV
1.10Vpp(typ)
DC
DC
M0040-J-02
2000/11
- 11 -
ASAHI KASEI
[AK4352]
16pin TSSOP (Unit: mm)
*5.0
16
1.10max
9
*4.4
6.4±0.2
A
1
0.22±0.1
8
0.65
0.17±0.05
0.1±0.1
| 0.10
1.0
Seating Plane
0.5±0.2
Detail A
NOTE: Dimension "*" does not include mold flash.
0-10°
n Package & Lead frame material
Package molding compound: Epoxy
Lead frame material:
Cu
Lead frame surface treatment: Solder plate
M0040-J-02
2000/11
- 12 -
ASAHI KASEI
[AK4352]
AKM
4352VT
XXYYY
Contents of XXYYY
XX:
Lot#
YYY: Date Code
•
•
•
•
•
•
M0040-J-02
2000/11
- 13 -