AK8128MV Low Spurious Multiclock Generator for Audio AK8128MV Features Description The AK8128MV is a member of AKM’s low power multi clock generator family designed for a high quality audio clock with high performance C/N. The AK8128MV generates different frequency clocks from external clock input. It provides them to up to two outputs configured by pin-setting. The circuitries of PLL in AK8128MV are derived from AKM’s long-term-experienced clock device technology, and enable clock output to perform low jitter and to operate with very low current consumption. The AK8128MV is available in a 10-pin TMSOP package. External Clock Input Frequencies: - 2.8224/3.072/11.2896/12.288/27.000MHz Two Frequency-Selectable Clock Outputs Selectable Clock Output Frequencies: - CLK1: 24.576/45.000/46.40625MHz - CLK2: 11.2896MHz/off Low Jitter Performance - Period Jitter (1σ): 20 psec (Typ.) at CLK1-2 - Long Term Jitter (1000 cycle, 1σ): 40 psec (Typ.) at CLK1-2 Low Current Consumption: 8.0mA (Typ.) at 3.3V Output Load: 15pF (Max.) Supply Voltage: 3.0V to 3.6V Operating Temperature Range: -40℃ to +85℃ Package: 10-pin TMSOP (lead-free) Applications Digital Television Personal Video Recorders Set-Top-Boxes Multi Media Receivers Digital Still Camera Digital Video Camera Block Diagram VDD1-2 CLKIN Divide Logic PLL1 CLK1 & PLL2 Output Control CLK2 VDD S0 GND VDD S1 TEST GND VSS1-2 AK8128MV Multi Clock Generator MS1291-E-01 May-11 -1- AK8128MV Pin Descriptions Package: 10-Pin TMSOP(Top View) 1:VDD2 10:CLK2 2:VSS2 9:N.C. 3:CLKIN 8:S0 4:VSS1 7:S1 5:VDD1 6:CLK1 Pin No. Pin Name Pin Type 1 VDD2 -- Power Supply 2 VSS2 -- Ground 3 CLKIN IN External Clock Input. See table.1. 4 VSS1 -- Ground 5 VDD1 -- Power Supply 6 CLK1 OUT 7 S1 -- Description Clock Output. See table.1. Frequency Select Pin 1. See table.1. (1) (1), (2) 8 S0 IN Frequency Select Pin 0. See table.1. 9 TEST -- Connect to GND 10 CLK2 OUT (2) Clock Output. See table.1. (1) Internal pull up 400kΩ (Typ.) (2) Internal pull down 400kΩ (Typ.) Ordering Information Part Number Marking Shipping Packaging Package Temperature Range AK8128MV 128MV Tape and Reel 10-pin TMSOP -40 to 85 ℃ MS1291-E-01 May-11 -2- AK8128MV Absolute Maximum Rating Over operating free-air temperature range unless otherwise noted (1) Items Symbol Ratings Unit VDD -0.3 to 4.6 V Input voltage Vin VSS-0.3 to VDD+0.3 V Input current (any pins except supplies) IIN ±10 mA Tstg -55 to 130 °C Supply voltage Storage temperature Note (1) Stress beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only. Functional operation of the device at these or any other conditions beyond those indicated under “Recommended Operating Conditions” is not implied. Exposure to absolute-maximum-rating conditions for extended periods may affect device reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. ESD Sensitive Device This device is manufactured on a CMOS process, therefore, generically susceptible to damage by excessive static voltage. Failure to observe proper handling and installation procedures can cause damage. AKM recommends that this device is handled with appropriate precautions. Recommended Operation Conditions Parameter Operating temperature Supply voltage (1) Output Load Capacitance Symbol Ta Conditions AK8128MV VDD Cpl Min -40 3.0 Pin: CLK1-2 Typ 3.3 Max Unit 85 °C 3.6 V 15 pF Note: (1) Power to VDD1 and VDD2 requires to be supplied from a single source. A decoupling capacitor of 0.1μF for power supply line should be installed close to each VDD pin. MS1291-E-01 May-11 -3- AK8128MV DC Characteristics All specifications at VDD: over 3.0 to 3.6V, Ta = -40 to 85 ℃ unless otherwise noted Parameter Symbol Conditions MIN TYP MAX Unit High level input voltage 1 VIH1 Pin: CLKIN, S1 Low level input voltage 1 VIL1 Pin: CLKIN, S1 High level input voltage 2 VIH2 Pin: S0 0.7VDD V Middle level input voltage 2 VIM2 Pin: S0 0.45VDD 0.5VDD 0.55VDD V Low level input voltage 2 VIL2 Pin: S0 0.3VDD V Input leak current 1 IL1 Pin: CLKIN -1 +1 μA Input leak current 2 IL2 Pin: S1 -20 +1 μA Input leak current 3 IL3 Pin: S0 -20 +20 μA Input leak current 4 IL4 -1 +1 μA High Level output voltage VOH Low level output Voltage VOL Current consumption IDD Pin: TEST VIL=GND Pin: CLK1-2 IOH=-4mA Pin: CLK1-2 IOL=+4mA Ta=25℃, No load S[0:1] = All Setting MS1291-E-01 0.7VDD V 0.3VDD 0.8VDD V V 0.2VDD 8.0 V mA May-11 -4- AK8128MV AC Characteristics All specifications at VDD: over 3.0 to 3.6V, Ta = -40 to 85 ℃ unless otherwise noted Parameter Symbol External clock frequency Conditions Output clock frequency TYP MAX Unit Pin: CLKIN S[0:1] = “LL” 2.8224 MHz Pin: CLKIN S[0:1] = “ML” 3.072 MHz Pin: CLKIN S[0:1] = “LH” 11.2896 MHz Pin: CLKIN S[0:1] = “MH” 12.288 MHz Pin: CLKIN S[0:1] = “HL”, “HH” 27.000 MHz Pin: CLKIN At VDD/2 Input Clock Duty Cycle MIN 30 70 % Pin: CLK1 S[0:1] = “LL”, “LH”, “ML”, “MH” 24.576 MHz Pin: CLK1 S[0:1] = “HL” 45.000 MHz Pin: CLK1 S[0:1] = “HH” 46.40625 MHz Pin: CLK2 S[0:1] = “LL”, “LH”, “ML”, “MH” 11.2896 MHz Pin: CLK2 S[0:1] = “HL”, “HH” --- MHz Pin: CLK1, 2(2) S[0:1] = “LL”, “LH”, “ML”, “MH” 20 ps Pin: CLK1(2) S[0:1] = “HL”, “HH” 15 ps Pin: CLK1, 2(2) S[0:1] = “LL”, “LH”, “ML”, “MH” 1000cycles 40 ps Pin: CLK1(2) S[0:1] = “HL”, “HH” 1000cycles 30 ps (1) Period jitter (3) Long Term jitter (3) (2) Output Clock Duty Cycle Pin: CLK1-2 45 50 55 % Output clock rise time trise Pin: CLK1, 2(2) 1.5 3.0 ns Output clock fall time tfall Pin: CLK1, 2(2) 1.5 3.0 ns (2) 0.2 ms 0.2 ms Power-up Time (4) Output Lock Time (5) Pin: CLK1, 2 Pin: CLK1 (2) S[0:1] = “HL” ⇔ “HH” (1) “L” Output (2) Measured with load capacitance of 15pF (3) 1σ in 10000 sampling or more (4) The time to settle output into ±0.1% of specified frequency from the point that the power supply reaches VDD. (5) The time to settle output into ±20ppm of specified frequency from the point that the S[0:1] is switched. MS1291-E-01 May-11 -5- AK8128MV Output clock frequency selection The AK8128MV generates a range of low-jitter and high-accuracy clock frequencies with two built-in PLLs and provides to up to two assigned outputs. A frequency selection at assigned output pin is configured by pin-setting of S0 (Pin8) and S1 (Pin7). The selectable frequency is shown in Table1. Table 1: CLK1-2 Clock output Frequency Selection Pin Clock Input Frequency (MHz) Clock Output Frequency (MHz) S0 (Pin 8) S1 (Pin 7) CLKIN (Pin 3) CLK1 (Pin 6) CLK2 (Pin 10) L L 2.8224 24.576 11.2896 L H 11.2896 24.576 11.2896 M L 3.072 24.576 11.2896 M H 12.288 24.576 11.2896 H L 27.000 45.000 “L” Output H H 27.000 46.40625 “L” Output MS1291-E-01 May-11 -6- AK8128MV Typical Connection Diagram +3.3V typ. AK8128MV CLK2 C2 External Clock C1 1:VDD2 10:CLK2 2:VSS2 9:TEST 3:CLKIN 8:S0 4:VSS1 7:S1 5:VDD1 6:CLK1 SW0 SW1 CLK1 GND Figure 1: Typical Connection Diagram C1-2 SW0 SW1 : 0.1μF : Open is “H” and tied to GND is “L” for S0 because this pin has internal pull up resister. : Open is “M”, tied to VDD is “H” and tied to GND is “L” for S1 because this pin has internal pull down and up resister. PCB Layout Consideration The AK8128MV is a high-accuracy and low-jitter multi clock generator. For proper performances specified in this datasheet, careful PCB layout should be taken. The followings are layout guidelines based on the typical connection diagram shown in Figure 1 Power supply line – AK8128MV has two power supply pins (VDD1-2) which deliver power to internal circuitry segments. A 0.1μF decoupling capacitor should be placed as close to each VDD pin as possible. Ground pin connection – AK8128MV has two ground pins (VSS1-2). These pin require connecting to plane ground which will eliminate any common impedance with other critical switching signal return. 0.1μF decoupling capacitors placed at VDD1 and VDD2 should be grounded at close to the VSS1 pin and the VSS2 pin, respectively. MS1291-E-01 May-11 -7- AK8128MV Package Information • Mechanical data 2.9±0.2 6 1 5 2.8 4.0±0.2 10 0.55±0.2 0.127 +0.1 -0.05 10 TMSOP 0.1 0.5 M 0.2±0.1 1.0MAX 0゜～ 10゜ 0.1 0.1+0.1 -0.05 S S MS1291-E-01 May-11 -8- AK8128MV • Marking 10 6 a: #1 Pin Index b: Part number c: Date code (3 digits, Year/month/Lot No.) b 128MV xxx c a 5 １ • RoHS Compliance All integrated circuits form Asahi Kasei Microdevices Corporation (AKM) assembled in “lead-free” packages* are fully compliant with RoHS. (*) RoHS compliant products from AKM are identified with “Pb free” letter indication on product label posted on the anti-shield bag and boxes. MS1291-E-01 May-11 -9- AK8128MV IMPORTANT NOTICE z These products and their specifications are subject to change without notice. When you consider any use or application of these products, please make inquiries the sales office of Asahi Kasei Microdevices Corporation (AKM) or authorized distributors as to current status of the products. z Descriptions of external circuits, application circuits, software and other related information contained in this document are provided only to illustrate the operation and application examples of the semiconductor products. You are fully responsible for the incorporation of these external circuits, application circuits, software and other related information in the design of your equipments. AKM assumes no responsibility for any losses incurred by you or third parties arising from the use of these information herein. AKM assumes no liability for infringement of any patent, intellectual property, or other rights in the application or use of such information contained herein. z Any export of these products, or devices or systems containing them, may require an export license or other official approval under the law and regulations of the country of export pertaining to customs and tariffs, currency exchange, or strategic materials. z AKM products are neither intended nor authorized for use as critical componentsNote1) in any safety, life support, or other hazard related device or systemNote2), and AKM assumes no responsibility for such use, except for the use approved with the express written consent by Representative Director of AKM. As used here: Note1) A critical component is one whose failure to function or perform may reasonably be expected to result, whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it, and which must therefore meet very high standards of performance and reliability. Note2) A hazard related device or system is one designed or intended for life support or maintenance of safety or for applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to function or perform may reasonably be expected to result in loss of life or in significant injury or damage to person or property. z It is the responsibility of the buyer or distributor of AKM products, who distributes, disposes of, or otherwise places the product with a third party, to notify such third party in advance of the above content and conditions, and the buyer or distributor agrees to assume any and all responsibility and liability for and hold AKM harmless from any and all claims arising from the use of said product in the absence of such notification. MS1291-E-01 May-11 - 10 -