New 36Mbit SigmaQuad-II™, SigmaCIO DDR-II™, and SigmaSIO DDR-II ™ SRAM Product Introduction 1 Agenda • GSI corporate overview • SRAM market transformation • What's new from GSI Technology • New product update – 36Mbit product family information • Part types, availability • GSI commitment to SRAM market – Why buy from GSI Technology 2 GSI Corporate Overview • • • • • • • Established in 1995 Headquarters in Santa Clara, CA TSMC Foundry silicon Largest Fast SRAM product portfolio Highest performance Networking SRAMs Lowest active power consumption Minimum 7-year product life 3 Worldwide Facilities ADMIN., DESIGN SALES, OPERATIONS Santa Clara, CA SALES Ottawa, Canada SALES Milan, Italy OPERATIONS Hsin-Chu, Taiwan SALES San Diego, CA APPS ENGINEERING, MARKETING, SALES Austin and Dallas, TX DESIGN Norcross, GA SALES Shenzhen, China 4 Executive Management Lee-Lean Shu President & CEO AMD, Sony, GSI 3/95 Didier Lasserre David Chapman Doug Schirle VP of Sales VP of Marketing CFO Cypress, Solectron, GSI 11/97 Mostek, Motorola, GSI 11/98 Cypress, Pericom, GSI 6/99 Bor-Tay Wu Robert Yau Leon Lee VP of Taiwan Ops VP of Engineering VP of Telecom Div. AMD, Macronix, GSI 4/97 AMD, Mosel, Sony, GSI 3/95 Lucent, Nortel, GSI 10/99 Ping Wu Meilu Zhang VP of U.S. Ops Quality Manager AMD, Oak Tech, GSI 7/99 AMD, Solectron, GSI 6/00 5 Agenda • GSI corporate overview • SRAM market transformation • • What's new from GSI Technology New product update – 36Mbit product family information • Part types, availability • GSI commitment to SRAM market – Why buy from GSI Technology 6 SRAM Market Transformation • Then: Compute market – External Processor cache • Now: High speed networking and communication applications – External control plane processor cache – Network processor, FPGA and ASIC fast external memory Then Now 7 Density Growth of Very Fast SRAMs 50 n e v i r -D g in k r o tw e N 40 Weighted Average Density (Mbit) 30 20 Cache-Driven 10 0 1997 1998 1999 2000 2001 2002 2003 2004 2005 2006 2007 2008 2009 2010 Source: Gartner Dataquest 8 The New Fast SRAM Market: Extreme Fragmentation • Networking applications are driving demand for: – – – – High speed, high capacity Packet Buffers Packet type sniffing Increasing Look-up Table capacity and speed High speed, high capacity statistics accumulation • Control plane processors, network processors, FPGAs and ASICs are driving demand for multiple memory architectures, densities and performance levels: Sync SDR SRAMs for control plane cache CIO DDR SRAMs for table look-ups SIO Quad SRAMs for packet buffering and statistics accumulation – Async SRAMs for DSP support – All types for FPGA and ASIC support – – – 9 The Exact Preference™ Solution • Architectures—Asynchronous, BurstRAMs, NBT SRAMs, SigmaQuad, and SigmaDDR SRAMs • Densities from 1Mbit to 72Mbit • Data rates to 666Mb/s/pin • Bus widths from 8 to 72 bits • Supply and interface voltages from 3.3 V to 1.5 V • 5/6 and 6/6 RoHS packages, including TQFP and 119, 165, and 209-pin BGAs • Temperature ranges from Commercial to Industrial to Extended and Military 10 Agenda • GSI corporate overview • SRAM market transformation • What's new from GSI Technology • New product update – 36Mbit product family information • Part types, availability • GSI commitment to SRAM market – Why buy from GSI Technology 11 New Product Information • Packaging – RoHS/Pb-free product updates • Addition of RoHS SOJ (GJ), TSSOP-II (GP), and uBGA (GU) to 1Mbit (711xx) and 2Mbit (721xx) Asynchronous SRAM families – New 15x17 CSP 165 (F) package • • Employs flip-chip construction Available for 72Mbit Synchronous Burst, No Bus Turnaround devices – RoHS production status for SigmaQuad 18Mbit x18 and x36 • GSI Technology IPO – More information at http://www.gsitechnology.com/IRstuff/turkey/news.htm • All GSI devices are 100% Industrial, Extended/Automotive & Mil Temp capable 12 New 72Mbit SigmaQuad and SigmaDDR Product Families Shipping in volume with June qualification planned I/O Voltage Type Part # Package 167–300 1.8/1.5 SigmaQuad-II Burst of 2 GS8662Q08/09/18/36 15 mm x 17 m m 165 FBGA 167–333 1.8/1.5 SigmaQuad-II Burst of 4 GS8662D08/09/18/36 15 mm x 17 m m 165 FBGA 167–300 1.8/1.5 Sigm aCIO DDR-II Burst of 2 GS8662T08/09/18/36 15 mm x 17 m m 165 FBGA 167–333 1.8/1.5 Sigm aCIO DDR-II Burst of 4 GS8662R08/09/18/36 15 mm x 17 m m 165 FBGA 167–333 1.8/1.5 Density Configuration Speed (MHz) 72Mbit 2M x 36 4M x 18 8M x 9 8M x 8 2M x 36 4M x 18 8M x 9 8M x 8 2M x 36 4M x 18 8M x 9 8M x 8 2M x 36 4M x 18 8M x 9 8M x 8 1M x 36 2M x 18 4M x 9 4M x 8 SigmaSIO DDR-II GS8662S08/09/18/36 15 mm x 17 m m 165 FBGA 13 Agenda • GSI corporate overview • SRAM market transformation • What's new from GSI Technology • New product update – 36Mbit product family information • Part types, availability • GSI commitment to SRAM market – Why buy from GSI Technology 14 Product Roadmap 72 Mb Type-IIIe 1.2 V VDD 666 MHz Clock 1Gb/s/pin Data Rate 72 Mb Type-II 1.8 V VDD 333 MHz Clock 666Mb/s/pin Data Rate 36 Mb Type-II 1.8 V VDD 200 MHz Clock 400Mb/s/pin Data Rate 167 MHz Clock 333Mb/s/pin Data Rate **9 Mb Type-I 2.5 V VDD 18 Mb Type-II 1.8 V VDD 36 Mb Type-I* 1.8 V VDD 18 Mb Type-I 2.5 V VDD 18 Mb Type-I 1.8 V VDD 72 Mb Type-I* 1.8 V VDD * Offered only as a mode-selectable option on the 72Mb Type-II device * Offered only as a mode-selectable option on the 36Mb Type-II device ** Not offered by GSI 15 New 36Mbit Announcement • Currently shipping 36Mbit SRAM products – Available in SigmaQuad-II, SigmaCIO DDR-II, SigmaSIO DDR-II • Conceived under GSI master die design technique • Using ExactPreferenceTM backend – Results in very short lead times • • • • Fastest 36Mbit Type-II SRAM Available in Burst of 4 or Burst of 2 Industry accepted 15 mm x 17 mm FPBGA TSMC 90nm process technology 16 GSI SigmaQuad-II, SigmaCIO DDR-II & SigmaSIO DDR-II • Product availability • Architectures – SigmaQuad-II, SigmaSIO/CIO DDR-II – 18Mbit • Type-I • DDR-II devices are QDR-IITM form/fit/function compatible – Production—Now • Type-II – Production—Now • Types – 36Mbit • PreQual devices NOW • Production 2Q07 – 72Mbit PreQual devices NOW • Production 2Q07 View the 36Mbit News Release and 36Mbit Announcement Page • • – Type-I • 2.5 V up to 333Mbit/s/pin – Type-II • 1.8 V up to 666Mbits/s/pin • DLL controlled Protocols – Burst of 2 • Address optimized – Burst of 4 • Bandwidth optimized 17 NEW 36Mbit SigmaQuad and SigmaDDR Product Families I/O Voltage Type Part # Package 167–300 1.8/1.5 SigmaQuad-II Burst of 2 GS8342Q08/09/18/36A 15 mm x 17 mm 165 FBGA 167–333 1.8/1.5 SigmaQuad-II Burst of 4 GS8342D08/09/18/36A 15 mm x 17 mm 165 FBGA 167–300 1.8/1.5 SigmaCIO DDR-II Burst of 2 GS8342T08/09/18/36A 15 mm x 17 mm 165 FBGA 167–333 1.8/1.5 SigmaCIO DDR-II Burst of 4 GS8342R08/09/18/36A 15 mm x 17 mm 165 FBGA 167–333 1.8/1.5 15 mm x 17 mm 165 FBGA Density Configuration Speed (MHz) 36Mbit 1M x 36 2M x 18 4M x 9 4M x 8 1M x 36 2M x 18 4M x 9 4M x 8 1M x 36 2M x 18 4M x 9 4M x 8 1M x 36 2M x 18 4M x 9 4M x 8 1M x 36 2M x 18 4M x 9 4M x 8 SigmaSIO DDR-II GS8342S08/09/18/36A 18 Agenda • • • • GSI corporate overview SRAM market transformation What's new from GSI Technology New product update – 36Mbit product family information • Part types, availability • GSI commitment to SRAM market – Why buy from GSI Technology 19 Summary • Why should GSI be YOUR memory supplier? – Highest Performance in class • Fastest speeds with best clock to output valid times – Lowest static and dynamic power consumption • Based on datasheet specifications – Widest product offering with short lead times • Committed to standard and custom SRAM applications – JTAG • Fully IEEE 1149.1-compliant – Longest product support life • 7 year product life guarantee – Best technical support w/ ≤ 24 hr. response 20 Supporting Material 21 Standard Qualification Plan • Characterization – Full temp characterization, 4 Corner Lots – Full Competitor characterization comparison • Process Qualification – Characterization and Burn-in qualification on three lots • Package Qualification – Full device/package qualification to the JEDEC 22 Standards • SER Evaluation Plan – – Accelerated―Alpha and Cosmic Ray Real-time 22 Common SRAM Architectures • • Asynchronous—Clock-free interface Synchronous—Clocked interface – BurstRAM—Developed for CISC processor (‘040 & ‘486) cache; today used as general purpose common I/O sync SRAM; PL & FT Modes; many packages; mostly 3.3 V I/O – NBT SRAM—BurstRAM derivative for Networking; allows zero dead-cycle bus turns from read to write; Late Write in FT mode, Double Late Write in Pipelined mode – Late Write SRAM (MSUG-I)—119 BGA; 1.8 V & 1.5 V HSTL I/O; RISC cache SRAM; allows 1 dead-cycle bus turns – DDR-I SRAM (MSUG-II)—Late Write SRAM derivative; 153 BGA; HSTL; RISC cache SRAM; Transfers data on rising & falling clock edges (Uncommon, not offered by GSI) – SigmaQuad-II—Separate I/O SRAM; runs Input data (D) & Output data (Q) busses simultaneously; Must alternate Read/Write address bus cycles to keep both busses running; DDR data transfers on each bus (DDR x 2 Buses = Quad); 165 BGA – SigmaCIO DDR-II—Common I/O DDR derived from Quad; 165 BGA – SigmaSIO DDR-II—Separate I/O but CANNOT run D & Q buses simultaneously; CAN run continuous Read or Write (which Quad cannot do); 165 BGA SigmaQuad, SigmaSIO DDR-II and SigmaCIO DDR-II are trademarks of GSI Technology. All product and company names mentioned in this document are trademarks of their respective holders. 23 24