5 4 3 2 TXE2 (J1) 0:Port 2 disable 1:Port 1 disable DVDD_33V TXE2 J1 1 2 JUMPER R1 4.7k TXD2_2 EEDO TXD2_3 TXD2_0 J2 1 2 JUMPER R2 R3 R4 R5 4.7k 4.7k 4.7k 4.7k TXD2_1 EECK J4 J5 R6 R7 4.7k 4.7k R8 R9 NC/4.7k 4.7k DVDD_18V TXD2_2 (J2) 0:Port 2 status form external PHY 1:Port 2 status in force mode C1 220uF C2 0.1uF C3 0.1uF C4 0.1uF C5 0.1uF C6 0.1uF C7 0.1uF C8 0.1uF C9 0.1uF C10 220uF C11 0.1uF C12 0.1uF EEDO When Port 2 in force status mode 0:Port 2 in 100Mbps 1:Port 2 in 10Mbps C13 0.1uF TXD2_3 When Port 2 in force status mode 0:link on 1:link off D AVDD_33V C14 220uF AVDD_18V C15 0.1uF C16 0.1uF C17 0.1uF C18 220uF C19 0.1uF EECK 0 0 1 1 0 1 0 1 2 JUMPER 2 JUMPER 1 1 EECS MDIO EECS VCNTL 2SB1386 B TEST2 0:3-Port mode All ports are active in this mode 1:2-Port mode Only 2 ports are active in this mode.Port 1or Port 2 can be disabled by strap TXEN2. In this mode,the memory resource is shared by PCI bus port and the other port AVDD_18V DVDD_33V J3 HEADER_3 F.B/120/SO805 VCNTL VREF Y1 25MHz/49US C24 C25 22pF 22pF B VREF J7 SCLK TEST_POINT 1 C23 0.1uF J8 RST# X1 X2 LNK1_LED SPD1_LED FDX1_LED LNK0_LED SPD0_LED FDX0_LED WOL PME# INT# RST# PCICLK ISOLATE# SCLK GNT# REQ# AD31 TEST_POINT 1 J9 PWRST# 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 TEST_POINT 1 AD30 AD29 AD28 AD27 DVDD_33V DM9106 for PCI Interface TXC2 TXE2 VCC3 TXD2_0 TXD2_1 TXD2_2 TXD2_3 DVDD18 MDIO MDC GND PWRST# EECS EECK EEDO EEDI DVDD33 AD0 AD1 GND AD2 AD3 AD4 AD5 DVDD33 AD6 AD7 AD8 CBE0# GND AD9 AD10 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 TP / LED Interface TX0+ TX0RX0+ RX0TX1+ TX1RX1+ RX1- MDIO MDC PWRST# EECS EECK EEDO EEDI AD0 AD1 MII Interface AD6 AD7 AD8 CBE0# RXD2_0 RXD2_1 RXD2_2 RXD2_3 RXDV2 RXC2 CRS2 COL2 RXER2 RXD2_[0..3] E C B RXDV2 RXC2 CRS2 COL2 RXER2 TXD2_[0..3] TXD2_[0..3] TXD2_0 TXD2_1 TXD2_2 TXD2_3 TXE2 TXC2 U3 RESET_IC_(AP1701DW) TXE2 TXC2 MDIO MDC MDIO MDC A AD14 AD13 AD12 AD11 CBE1# AD15 SERR# PAR STOP# PERR# AD22 AD21 AD20 AD19 AD18 AD17 CBE3# IDSEL AD23 PWRST# AD16 CBE2# FRAME# IRDY# TRDY# DEVSEL# 10k C27 Title 10uF Davicom Semiconductor Inc. 3 Port Switch + PCI Interface Chip Size A3 Date: 5 4 3 2 B RXD2_[0..3] B D1 1N4148 E C R11 A A LNK0_LED SPD0_LED FDX0_LED LNK1_LED SPD1_LED FDX1_LED AD2 AD3 AD4 AD5 AD9 AD10 C TX0+ TX0RX0+ RX0TX1+ TX1RX1+ RX1- LNK0_LED SPD0_LED FDX0_LED LNK1_LED SPD1_LED FDX1_LED 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 DVDD_33V SD[00..31] WOL PME# INT# RST# PCICLK ISOLATE# GNT# REQ# CBE3# IDSEL CBE2# FRAME# IRDY# TRDY# DEVSEL# STOP# PERR# SERR# PAR CBE1# CBE0# TXD2_0 TXD2_1 TXD2_2 TXD2_3 C DVDD_33V C26 0.1uF AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 TXC2 TXE2 CBE3# IDSEL AD23 DVDD33 AD22 AD21 AD20 AD19 AD18 AD17 GND AD16 CBE2# FRAME# IRDY# TRDY# DEVSEL# DVDD33 STOP# PERR# GND SERR# PAR DVDD18 CBE1# AD15 GND AD14 AD13 AD12 AD11 DVDD33 AD26 AD25 AD24 VCNTL VREF AVDD33 DVDD33 X1 X2 GND LNK1_LED SPD1_LED FDX1_LED LNK0_LED SPD0_LED FDX0_LED WOL PME# INT# RST# PCICLK ISOLATE# SCLK GNT# REQ# AD31 DVDD18 AD30 AD29 AD28 AD27 GND AD26 AD25 AD24 8 7 6 5 WOL PME# INT# RST# PCICLK ISOLATE# GNT# REQ# CBE3# IDSEL CBE2# FRAME# IRDY# TRDY# DEVSEL# STOP# PERR# SERR# PAR CBE1# CBE0# 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 L3 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 3 2 1 TEST2 DVDD_18V BGRESG BGRES AVDD33 RX0RX0+ AGND AGND TX0TX0+ AVDD18 AVDD33 RX1RX1+ AGND AGND TX1TX1+ AVDD18 TEST3 TEST2 TEST1 DVDD33 RXD2_0 RXD2_1 RXD2_2 RXD2_3 RXDV2 GND RXC2 RXER2 COL2 CRS2 U1 C22 0.1uF CS VCC SK DC DI ORG DO GND PCI Interface AVDD_18V F.B/120/SO805 C21 0.1uF 1 2 3 4 D RXC2 RXER2 COL2 CRS2 RXD2_0 RXD2_1 RXD2_2 RXD2_3 RXDV2 TEST2 TX1TX1+ RX1RX1+ TX0TX0+ RX0RX0+ AVDD_33V E Q1 C DVDD_18V L2 U2 AD[00..31] Port 2 is in MII mode(DEFAULT) Port 2 is in reverse MII mode Port 2 is in RMII mode Reserved C20 0.1uF AVDD_33V DVDD_33V EEPROM 93LC46 F.B/120/SO805 C 2 JUMPER 75k EECK EEDO EEDI R10 1.4k/1% DVDD_33V L1 J61 R32 EECS Mount R34 use SCLK as system clock NC:use internal system clock TXD2_0 When Port 2 in force status mode 0:Port 2 in full duplex mode 1:Port 2 in half duplex mode TXD2_1 1 DVDD_33V Document Number Rev 1.0 DM9106_EVB_BOARD Wednesday, March 18, 2009 Sheet 1 1 of 3 5 4 3 PCI_5V_1 2 PCI_33V PCI_5V_2 FOR PC PCI BUS ONLY D CN1 TXD2_[0..3] TXD2_[0..3] TXD2_0 TXD2_1 TXD2_2 TXD2_3 TXE2 TXC2 PCICLK REQ# TXE2 TXC2 MDIO MDC MDIO MDC AD31 AD29 AD27 AD25 C CBE3# AD23 PCI Interface AD[00..31] SD[00..31] AD17 CBE2# AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 IRDY# DEVSEL# PERR# SERR# WOL PME# INT# RST# PCICLK ISOLATE# GNT# REQ# CBE3# IDSEL CBE2# FRAME# IRDY# TRDY# DEVSEL# STOP# PERR# SERR# PAR CBE1# CBE0# CBE1# AD14 AD12 AD10 AD8 AD7 AD5 AD3 AD1 TRST* 12V TMS TDI 5V INTA* INTC* 5V NC 5V NC GROUND GROUND 3.3VAUX RST* 5V GNT* GROUND PME# AD30 3.3V AD28 AD26 GROUND AD24 IDSEL 3.3V AD22 AD20 GROUND AD18 AD16 3.3V FRAME* GROUND TRDY* GROUND STOP* 3.3V SDONE SBO* GROUND PAR AD15 3.3V AD13 AD11 GROUND AD9 NC NC C/BE0* 3.3V AD6 AD4 GROUND AD2 AD0 5V REQ64* 5V 5V PCI_5V_1 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A50 A51 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62 D2 A 1N5819 C D3 A 1N5819 C MII_5V L4 DVDD_5V F.B/120/SO803 INT# JP1 +5VSB 1 2 3 WOL HEADER_3/2.5mm CN3P2.5MM 3.3VAUX RST# GNT# PCI_33V D4 A PCI_PME# AD30 L5 1N5819 C DVDD_33V F.B/120/SO803 AD28 AD26 AD22 AD20 D5 A 3.3VAUX AD24 IDSEL R12 1N5819 C C 0 PCI_PME# PME# AD18 AD16 OPTION FRAME# TRDY# DVDD_5V DVDD_33V STOP# U4 I PAR AD15 IN AD13 AD11 AP1117-3.3V OUT O OUT 4 C28 220uF C29 0.1uF AD9 CBE0# AD6 AD4 RXD2_0 RXD2_1 RXD2_2 RXD2_3 CRS2 COL2 RXDV2 RXER2 RXC2 TXC2 TXD2_0 TXD2_1 TXD2_2 TXD2_3 MDIO WOL PME# INT# RST# PCICLK ISOLATE# GNT# REQ# CBE3# IDSEL CBE2# FRAME# IRDY# TRDY# DEVSEL# STOP# PERR# SERR# PAR CBE1# CBE0# B AD21 AD19 Solder GND RXDV2 RXC2 CRS2 COL2 RXER2 -12V TCK GROUND TD0 5V 5V INTB* INTD* PRSNT1* NC PRSNT2* GROUND GROUND NC GROUND CLK GROUND REQ* 5V AD31 AD29 GROUND AD27 AD25 3.3V C/BE3* AD23 GROUND AD21 AD19 3.3V AD17 C/BE2* GROUND IRDY* 3.3V DEVSEL* GROUND LOCK* PERR* 3.3V SERR* 3.3V C/BE1 AD14 GROUND AD12 AD10 GROUND NC NC AD8 AD7 3.3V AD5 AD3 GROUND AD1 5V ACK64* 5V 5V G RXD2_0 RXD2_1 RXD2_2 RXD2_3 RXDV2 RXC2 CRS2 COL2 RXER2 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 B50 B51 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62 1N5819 C B AD2 AD0 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1 RXD2_[0..3] D12 A JP2 HEADER_16X2 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 Component RXD2_[0..3] AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 D PCI_5V_2 MII Interface AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 1 PCICONN PCICON WOL TXE2 MDC (Meet PCI2.2 Spec.) R13 DVDD_33V DVDD_33V DVDD_33V DGND DGND DGND MII_5V MII_5V DVDD_33V 0 ISOLATE# A A Title Davicom Semiconductor Inc. 3 Port Switch + PCI Interface Chip Size A3 Date: 5 4 3 2 Document Number Rev 1.0 DM9106_EVB_BOARD Wednesday, March 18, 2009 2 Sheet 1 of 3 5 4 3 TP / LED Interface 1 AVDD_18V U5 LNK0_LED SPD0_LED FDX0_LED LNK1_LED SPD1_LED FDX1_LED RX0+ TX0TX0+ RDNC RD+ NC CT TDNC TD+ RX+ NC RXMCT NC TX+ NC TX- JP3 RJ-45_LED 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 MAGCOM_HS9024 R14 LNK0_LED SPD0_LED FDX0_LED LNK1_LED SPD1_LED FDX1_LED R15 49.9/1% R16 R17 49.9/1% 49.9/1% C31 0.1uF D LED1+ LED1- TX0+ TX0RX0+ RX0TX1+ TX1RX1+ RX1- 14 13 TX0+ TX0RX0+ RX0TX1+ TX1RX1+ RX1- 1 2 3 4 5 6 7 8 LED2+ LED2- RX0- 16 15 D 2 R18 R19 R20 75/1% 75/1% 75/1% C30 49.9/1% C32 0.1uF C33 0.1uF 0.01uF/2KV R21 R22 RJ45_SPD RJ45_LINK U6A 512 512 74HC04 C C SPD0_LED 1 2 U6B LNK0_LED 3 4 DVDD_33V R23 330 LNK0_LED SPD0_LED FDX0_LED C D7 C D6 LEDA C D8 LEDA C D10 C D9 LEDA C D11 LEDA LEDA 4 3 2 1 5 6 7 8 74HC04 AVDD_18V R24 330 LNK1_LED SPD1_LED FDX1_LED LEDA 4 3 2 1 MAGCOM HS-9016, HS-9024 DELTA LFE8563-DC, LFE8563T-DC JP4 RJ-45 U7 5 6 7 8 RX1- 1 2 3 4 5 6 7 8 RX1+ TX1TX1+ B C34 RDNC RD+ NC CT TDNC TD+ RXNC RX+ MCT NC TXNC TX+ 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 B MAGCOM_HS9016 R25 R26 49.9/1% R27 49.9/1% 49.9/1% 0.1uF R28 R29 R30 R31 75/1% 75/1% 75/1% C35 49.9/1% C36 C37 0.1uF C38 0.1uF C39 0.1uF 0.01uF/2KV 0.1uF A A Davicom Semiconductor Inc. Title 3 Port Switch + PCI Interface Chip Size A4 Date: 5 4 3 2 Document Number Rev 1.0 DM9106_EVB_BOARD Wednesday, March 18, 2009 Sheet 3 1 of 3