5 4 3 2 1 RJ 45 D D EEPROM 30mm SPI I/F 32QFN DM9051 RJ-45 + TRANSFORMER 32QFN DM9051-SPI C C PAGE 2 40mm B B SPI I/F PAGE 2 32QFN DM9051 DEMO BOARD V2.1 P/N: D4L-9051-NN-21-1 A A Davicom Semiconductor Inc. Title Size A4 Date: 5 4 3 2 DM9051 Demo Board (PCB_Overview) Document Number 01TOP Tuesday, August 05, 2014 Rev 2.1 Sheet 1 1 of 3 5 4 3 2 1 +5V POWER IN SELECTION 1-2 = 3.3V 2-3 = 5V 2 3V3 R4 DVDD_33 R1 4.7K/NC R0603 U1 REGULATOR ON : INT LOW ACTIVE OFF : INT HIGH ACTIVE ON : INT PIN OPEN DRAIN OFF : INT PIN FORCE MODE R1 D PWR_IN DVDD_33 L1 C2 47UF/16V C1210 VIN VOUT TAB GND I D R4 4.7K/NC R0603 O TAB F.B/1206 C35 47UF/16V C1210 C41 0.1UF C0603 SOT-223 DVDD_33 U4 G C39 0.1UF C0603 1 J3 HEADER 3 3 2 1 J2 HEADER 3 3 DGND DGND 1 2 3 4 DGND DGND R5 10K R0603 DVDD_33 CS SK DI DO VCC NC NC GND 8 7 6 5 C37 0.1UF C0603 R49 4.7K R0603 93LC46/SO8 WORD MODE DGND LED3 GP1 TEST3 AVDD_18_TX FDXLED VDD33 WOL EECS EECK EEDIO GP1 TEST3 16 15 14 13 12 11 10 9 U3 DM9051/QFN32 R9 R8 R11 R10 C J1 SPI_INT 2 RSTB_IN 4 6 8 10 12 1 3 5 7 9 11 0R 0R 0R 0R C8 0.1UF C0603 C36 47UF/16V C6 0.1UF C1210 C0603 R0603 R0603 R0603 R0603 TEST2 GP2 IRQ R13 0R R0603 SPI_INT PWR_IN 17 18 19 20 21 22 23 24 AVDD TXTX+ AGND RXRX+ AVDD BGRES SPI_CSN SPI_CK SPI_MOSI SPI_MISO VDD33 TEST2 GP2 INT AGND TXTX+ 8 7 6 5 4 3 2 1 RX+ AVDD_18_RX R15 49.9/1% R0603 PIN 33 = EXPOSED PAD UNDER CHIP C9 0.1UF R14 C0603 6.8K1% R0603 C10 47UF/16V C1210 R16 49.9/1% R0603 R50 10K GND_EARTH AGND C16 0.1UF C0603 AVDD_18_RX AGND 33 25 26 27 28 29 30 31 32 8 9 7 10 6 5 4 3 2 1 RX- C RJ-45 LED2 R20 510 R0603 R21 510 R0603 B AGND VSS LINKLED SPDLED RSTB GP3 VDD33 X2 X1 AGND DGND DVDD_33 AVDD_18_TX AGND HEADER 6X2 DGND R7 49.9/1% R0603 JP4 SPI_CSN SPI_CK SPI_MOSI SPI_MISO SPISS SPIMOSI SPIMISO SPICLK R6 49.9/1% R0603 INTEGRATED XFMR AND RJ-45 MODULE SUYIN P/N: 101110FS070M472ZA BOTHHAND P/N: LU1S516 LF MAGCOM P/N: MTC-10007-3 R22 510 R0603 A LED LED3 A K LED1 K LED2 AGND SPEED TP10 AGND DGND DGND LINK/ACT B LED2 LED1 LED LED4 A GP3 DVDD_33 LED3 K FDXLED DVDD_33 LED C4 47UF/16V C1210 R25 4.7K R0603 DVDD_33 RSTB_IN R33 4.7K R0603 RSTB R34 4.7K R0603 C26 0.1UF C0603 C27 0.1UF C0603 DGND C21 10UF/16V C1210 TEST3 GP1 GP2 GP3 C25 0.1UF C0603 Y1 XTAL 25MHZ/49US R12 0R R0603 R32 4.7K R0603 PLACE NEXT TO PIN 15 21 29 C22 20PF C0603 C23 20PF C0603 Preliminary (for Reference Only) DGND TEST2 DGND DGND DGND A A DGND Davicom Semiconductor Inc. Title Size A3 Date: 5 4 3 2 DM9051 Demo Board Document Number DM9051_QFN32 Tuesday, August 05, 2014 Rev 2.1 Sheet 1 2 of 3 5 VER 4 DATE 2.0 D 2.1 ENGINEER 3 2 1 NOTE 06/20/2014 Willie Niou INITAL CIRCUIT CREATION 08/05/2014 Willie Niou Modify J1 pin assignment to show correct connection Pin 1 = SPISS Pin 3 = SPIMOSI Pin 5 = SPIMISO Pin 7 = SPICLK Pin 2 = SPI_INT Pin 4 = RSTB_IN Pin 9, 10 = GND Pin 11, 12 = PWR D C C B B A A Davicom Semiconductor Inc. Title Size A4 Date: 5 4 3 2 DM9051 Demo Board Document Number HISTORY Tuesday, August 05, 2014 Rev 2.1 Sheet 3 1 of 3