HD74LS253 Dual 4-line-to-1-line Data Selectors / Multiplexers (with three-state outputs) REJ03D0468–0300 Rev.3.00 Jul.15.2005 This data selector / multiplexer contains inverters and drivers to supply fully complementary, on-ship, binary decoding data selection to AND-OR gates. Separate output control inputs are provided for each of the two four-line sections. The three-state outputs can interface with and drive data lines of bus-organized systems. With all but one of the common outputs disabled (at highimpedance state) the low-impedance of the single enabled output will drive the bus line to a high or low logic level. Features • Ordering Information Part Name Package Type Package Code (Previous Code) Package Abbreviation Taping Abbreviation (Quantity) HD74LS253P DILP-16 pin PRDP0016AE-B (DP-16FV) P — HD74LS253FPEL SOP-16 pin (JEITA) PRSP0016DH-B (FP-16DAV) FP EL (2,000 pcs/reel) Note: Please consult the sales office for the above package availability. Pin Arrangement Output Control 1G 1 16 VCC Select B 2 15 Output 2G Control 1C3 3 14 Select A 13 2C3 12 2C2 1G 1C3 2G 2C3 1C2 4 1C2 1C1 5 1C0 6 Output 1Y 7 1C1 B B 1C0 A A 1Y GND 8 Data Inputs B 2C2 B A 2C1 A 2C0 2Y (Top view) Rev.3.00, Jul.15.2005, page 1 of 5 Data Inputs 11 2C1 10 2C0 9 2Y Output HD74LS253 Function Table Select inputs B X L L L L H H H H Data inputs A X L L H H L L H H C0 X L H X X X X X X C1 X X X L H X X X X C2 X X X X X L H X X C3 X X X X X X X L H Output control G H L L L L L L L L Output Y Z L H L H L H L H Notes: 1. H; high level, L; low level, X; irrelevant 2. Address inputs A and B are common to both sections. Block Diagram Output Control 1G 1C0 Output 1Y 1C1 Data 1 1C2 1C3 B Select A 2C0 2C1 Output 2Y Data 2 2C2 2C3 Output Control 2G Absolute Maximum Ratings Item Symbol Ratings Supply voltage VCC 7 V Input voltage VIN 7 V Output voltage (off-state) VO (off) 5.5 V Operating temperature Topr –20 to +75 °C PT 400 mW Tstg –65 to +150 °C Power dissipation Storage temperature Note: Voltage value, unless otherwise noted, are with respect to network ground terminal. Rev.3.00, Jul.15.2005, page 2 of 5 Unit HD74LS253 Recommended Operating Conditions Item Supply voltage Output current Operating temperature Symbol Min Typ Max Unit VCC 4.75 5.00 5.25 V IOH — — –2.6 mA IOL — — 8 mA Topr –20 25 75 °C Electrical Characteristics (Ta = –20 to +75 °C) Item Input voltage Symbol VIH VIL min. 2.0 — typ.* — — max. — 0.8 Unit V V VOH 2.4 — — V VOL — — — — 0.4 0.5 V — — — — — — 20 –0.4 0.1 µA mA mA VCC = 5.25 V, VI = 2.7 V VCC = 5.25 V, VI = 0.4 V VCC = 5.25 V, VI = 7 V Output voltage Input current IIH IIL II Condition VCC = 4.75 V, VIH = 2 V, VIL = 0.8 V, IOH = –2.6 mA IOL = 4 mA VCC = 4.75 V, VIH = 2 V, VIL = 0.8 V IOL = 8 mA Output current IOZ — — — — 20 –20 µA VO = 2.7 V VO = 0.4 V Short-circuit output current IOS –30 — –130 mA VCC = 5.25 V Supply current** ICC — — — 7 8.5 — 12 14 –1.5 mA VCC = 5.25 V, VIH = 2 V Condition A VCC = 5.25 V Condition B VCC = 4.75 V, IIN = –18 mA Input clamp voltage VIK V Notes: * VCC = 5 V, Ta = 25°C ** ICC is measured with the outputs open under the following conditions. A; All inputs grounded, B; Output control at 4.5 V, all inputs grounded. Switching Characteristics (VCC = 5 V, Ta = 25°C) Item Propagation delay time Output enable time Output disable time Symbol tPLH tPHL tPLH tPHL Inputs Output Data Y Select Y tZH tZL tHZ tLZ Output Control Y Output Control Y Rev.3.00, Jul.15.2005, page 3 of 5 min. — — — — — — — — typ. 17 13 30 21 15 15 27 18 max. 25 20 45 32 28 23 41 27 Unit ns Condition CL = 15 pF, RL = 2 kΩ ns ns CL = 5 pF, RL = 2 kΩ HD74LS253 Testing Method Test Circuit VCC 4.5V RL Input P.G. Zout = 50Ω Notes: See Function Table G Output C0 C1 C2 C3 S1 Y 5kΩ CL A B S2 1. CL includes probe and jig capacitance. 2. All diodes are 1S2074(H). Waveform tTHL 90% 1.3V Output Control tTLH 3V 10% 0V 10% 3V 90% 1.3V 0V tZL 4.5V Waveform 1 S1 closed, S2 open tLZ S1 and, S2 closed 1.3V VOL tZH VOL tHZ 0.5V VOH Waveform 2 S1 open, S2 closed Notes: 1.5V VOH 1.5V 1.3V 0V 0.5V S1 and, S2 closed 1. Input pulse; tTLH ≤ 15 ns, tTHL ≤ 6 ns, PRR = 1 MHz, duty cycle = 50% 2. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. 3. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. Rev.3.00, Jul.15.2005, page 4 of 5 HD74LS253 Package Dimensions JEITA Package Code P-DIP16-6.3x19.2-2.54 RENESAS Code PRDP0016AE-B MASS[Typ.] 1.05g Previous Code DP-16FV D 9 E 16 1 8 b3 0.89 Z A1 A Reference Symbol L e Nom θ c e1 D 19.2 E 6.3 JEITA Package Code P-SOP16-5.5x10.06-1.27 RENESAS Code PRSP0016DH-B *1 Previous Code FP-16DAV 7.4 A1 0.51 b p 0.40 b 3 0.48 0.56 1.30 c 0.19 θ 0° e 2.29 0.25 0.31 2.54 2.79 15° 1.12 L 2.54 MASS[Typ.] 0.24g NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET. D F 16 20.32 5.06 Z ( Ni/Pd/Au plating ) Max 7.62 1 A bp e Dimension in Millimeters Min 9 c HE *2 E bp Index mark Reference Symbol Terminal cross section ( Ni/Pd/Au plating ) 1 Z *3 bp Nom D 10.06 E 5.50 Max 10.5 A2 8 e Dimension in Millimeters Min x A1 M 0.00 0.10 0.34 0.40 0.46 0.15 0.20 0.25 7.80 8.00 A L1 0.20 2.20 bp b1 c A c A1 θ y L Detail F 1 θ 0° HE 7.50 e 1.27 x 0.12 y 0.15 0.80 Z L L Rev.3.00, Jul.15.2005, page 5 of 5 8° 0.50 1 0.70 1.15 0.90 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. 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