AAT - Advanced Analog Technology

Advanced Analog Technology, Inc.
June 2008
AAT1346A/B/C
Product information presented is for internal use within AAT Inc. only. Details are subject to change without notice
2A 15V Step-Down DC-DC Converter
FEATURES
GENERAL
GENERAL DESCRIPTION
Buck PWM with Internal PMOS
The AAT1346A/B/C is a 2A 15V step-down converter,
4.5V to 15.0V Input Voltage Range
which provides an integrated one-channel PWM
Max. 2A Output Current
Under-Voltage Lockout (UVLO) Protection
power supply circuitry for specific applications.
Internal Short Circuit and Thermal Protection
The buck PWM contains enable control signal, error
Internal Soft-Start
amplifier,
Fixed Switching Frequency (380kHz / 47kHz)
under-voltage
2 µA Shutdown Current
SOP- 8 Package
solution for the power supply of DC-DC system. It
offers system engineers the flexibility to tailor-make the
PWM
comparator,
protection,
output
oscillator,
short
driver,
circuit
protection and voltage reference circuit.
The AAT1346A/B/C contains one buck current mode
PWM with internal PMOS. In addition, a digital
soft-start is also included to prevent inrush current at
startup. AAT1346A/B/C comes with a fixed 380kHz
PIN CONFIGURATION
oscillator, however, when the feedback voltage is lower
than 0.7V, the switching frequency changes to 47kHz
and returns to 380kHz after the short-circuit is
released.
TYPICAL APPLICATION
Power In
VDD
EO
ENC
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VOUT
SW
IN
ENC
GND
Advanced Analog Technology, Inc.
June 2008
AAT1346A/B/C
ORDERING INFORMATION
DEVICE
TYPE
PART NUMBER
PACKAGE
PACKING
TEMP.
RANGE
MARKING
MARKING
DESCRIPTION
AAT1346A
AAT1346A-S-T
S:SOP8
T: Tape
and reel
40 C to +85 C
AAT1346A
XXXXXX
Device Type
Lot no.(6~9Digits)
AAT1346B
AAT1346B-S-T
S:SOP8
T: Tape
and reel
40 C to +85 C
AAT1346B
XXXXXX
Device Type
Lot no.(6~9Digits)
AAT1346C
AAT1346C-S-T
S:SOP8
T: Tape
and reel
40 C to +85 C
AAT1346C
XXXXXX
Device Type
Lot no.(6~9Digits)
NOTE: All AAT products are lead free and halogen free.
ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
VALUE
UNIT
Supply Voltage ( VDD , SW)
VDD
−0.3 to 15.0
V
Pin Voltage (IN, ENC, EO)
VI
−0.3 to ( VDD +0.3)
V
SW Current
ISW
6.5
A
Operating Temperature Range
TC
−40 C to +85 C
C
Tstorage
−65 C to +150 C
C
Storage Temperature Range
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June 2008
AAT1346A/B/C
ELECTRICAL CHARACTERISTICS
( TC =25 C , VDD = 12V, Unless Otherwise Specified)
GENERAL ITEM
PARAMETER
SYMBOL
VDD
Input Voltage Range
Under Voltage Lockout
VUVLO
Under Voltage Lockout Hysteresis
VUHYS
Input Current into VDD
TYP
4.50
VDD Falling
3.33
3.48
MAX
UNIT
15.0
V
3.63
V
150
mV
VIN = 1.5V
1
mA
IDD_ON
VIN = 1.0V
5.5
mA
ISHDN
OSC Frequency
fOSC
VSHORT
EN Low Level
VIL
EN High Level
VIH
Thermal Shutdown
MIN
IDD_OFF
Shutdown Current into VDD
Short Detection Voltage
TEST CONDITION
1.70
10.0
µA
Normal Operation
380
kHz
Short-Circuit
47.5
kHz
VIN Falling
0.67
0.70
0.73
V
0.4
V
1.6
TSHDN
V
160
C
BUCK PWM
PARAMETER
SYMBOL
TEST CONDITION
MIN
TYP
MAX
UNIT
IN Regulation Voltage
VIN
IN=EO
1.209
1.222
1.235
V
IN to EO Transconductance
Gm
IN=EO
35
80
125
µS
Maximum Duty Cycle
90
IN Input Leakage Current
IL
Current-Sense Amplifier
Transresistance
RCS
SW Leakage Current
ILSW
Switch On-Resistance
RON
SW Current Limit
ILIMIT
IN=0V to 1.5V
VSW = 15V
0.1
2.5
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0.01
+100
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nA
V/A
0.2
t SS
Soft-Start Time
−100
%
5.0
µA
200
mΩ
3.7
A
700
µs
Advanced Analog Technology, Inc.
June 2008
AAT1346A/B/C
PIN DESCRIPTION
PIN NO.
NAME
I/O
1, 2
NC
-
Not Connected
1
3
VDD
I
Power Input
3
7, 8
4
SW
I/O
4
5, 6
5
GND
-
Ground
5
4
6
IN
I
Feedback Input
6
3
7
EO
I/O
7
2
8
ENC
I
Enable Control
8
-
-
NC
-
Not Connected
A
B
C
1
-
2
FUNCITION
Switching Node
Error Amplifier Compensation Output
FUNCTION BLOCK DIAGRAM
DIAGRAM
AAT1346A/B/C
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AAT1346A/B/C
TYPICAL OPERATING CHARACTERISTICS
( VIN =12V, TC =25 C Unless Otherwise Noted)
AAT1346A
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AAT1346A/B/C
TYPICAL OPERATING CHARACTERISTICS
CHARACTERISTICS (CONT
(CONT.)
ONT.)
( VIN =12V, TC =25 C Unless Otherwise Noted)
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AAT1346A/B/C
TYPICAL OPERATING CHARACTERISTICS (CONT
(CONT.)
ONT.)
( VIN =12V, TC =25 C Unless Otherwise Noted)
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AAT1346A/B/C
TYPICAL APPLICATION CIRCUIT
AAT1346A/B/C
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AAT1346A/B/C
DETAILED DESCRIPTION
DESIGN PROCEDURE
The AAT1346 is a current-mode buck switch-mode
Programming the Output Voltage
regulator with a fixed switching frequency of 380kHz. It
The output voltage for the AAT1346 is programmed
uses an internal P-channel MOSFET switch to step
using a resistor divider from the output connected to
down the input voltage to the regulated output voltage.
the feedback pins (Figure 1). When setting the output
The converter regulates input voltages from 4.75V to
voltage, connect a resistive voltage divider from the
15V down to an output voltage as low as 1.222V, and is
output to IN pin and then to GND. Choose the
able to supply up to 2A of load current.
lower-side (IN-to-GND) resistor, then calculate the
ENC Control Input
upper-side (output-to-IN) resistor as follows:
V

R upper = Rlower  out − 1
V
 IN

The AAT1346 contains built-in pull high logic. The IC is
enabled when ENC becomes floating (ENC pin voltage
> 1.6V). When the voltage is lower than 0.4V, the IC
is disabled.
Where VIN is the feedback regulation voltage, 1.222V
(typ). Typical values for Rlower are in the range of
10kΩ to 100kΩ.
Soft-Start
The AAT1346 has built-in 700 µs soft-start time. Upon
power turn-on, if ENC pin is not pulled low; and VDD is
above VUVLO (typ. 3.48V), IN pin will climb from 0V to
1.222V during 700 µs soft-start time to reduce inrush
current.
Short Ciecuit Protection
When short circuit happens, and the feedback voltage
Figure 1. Feedback Network
(IN) is less than 0.7V, the switching frequency will
change to 47kHz to reduce the power supply from input
to output to protect the system. The frequency will
switch back to 380kHz after the short circuit is
released.
Inductor Selection
A good rule of thumb when choosing the inductance is
to allow the peak inductor current in the inductor to be
approximately 115% of the maximum load current. Also,
make sure that the peak inductor current is below the
Thermal Shutdown
The AAT1346 includes a thermal-limit circuit that shuts
down the IC at approximately +160°C. The part turns
on after the IC cools by approximately 20°C.
2.5A minimum current limit.
The inductance value can be calculated by the
equation:
V
Vout ⋅ (1 − out )
Vi
L≈
0.3 ⋅ Iout ⋅ fSW
Where Vout is the output voltage, Vi is the input
voltage, fSW is the switching frequency (380kHz), and
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AAT1346A/B/C
Iout is the maximum load current.
When the inductance value is determined, then the
peak inductor current can be calculated by the
equation:
V
Vout ⋅ (1 − out )
Vi
IL(peak ) = Iout +
2 ⋅ fSW ⋅ L setting
approximately as follows:
Vout ⋅ (1 −
Vripple ≈
Vout
)
Vi
8 ⋅ L setting ⋅ C out ⋅ fSW 2
Where Vout is the output voltage, Vi is the input
voltage, fSW is the switching frequency (380kHz),
Where Iout is the maximum load current, Vout is the
Cout is the output capacitance, and L setting is the
output voltage, Vi is the input voltage, fSW is the
inductance value.
switching frequency (380kHz), and L setting is the
If the capacitor has significant ESR, the output ripple
inductance value. Choose an inductor that does not
component due to capacitor ESR is as follows:
saturate under the peak inductor current.
Vripple ≈ 2 ⋅ (IL(peak ) − Iout ) × RESR
Schottky Diode Selection
Choose a Schottky diode whose maximum reverse
voltage rating is greater than the maximum input
voltage, and whose current rating is greater than the
peak inductor current.
The AAT1346 employs current-mode control, thereby
The input capacitor in a DC-to-DC converter reduces
current peaks drawn from the input power source and
switching
ESR.
Compensation
Input Capacitor
reduces
Where IL(peak) is the peak inductor current, Iout is the
maximum load current, and RESR is the capacitor’s
noise
in
the
controller.
The
impedance of the input capacitor at the switching
simplifying the control-loop compensation. When the
AAT1346 operates with continuous inductor current
(typically the case), a RLOAD COUT pole appears in
the loop-gain frequency response. To ensure stability,
frequency should be less than that of the input source
set the compensation RC CC to zero to compensate
so high-frequency switching currents do not pass
for the RLOAD COUT pole. Set the loop crossover
through the input source. Ceramic capacitors are
preferred,
but
tantalum
or
low-ESR
electrolytic
capacitors may also satisfy. For insuring stable
operation the IC must be bypassed with a 0.22 µF
ceramic capacitor placed close to the VDD .
below the lower of 1/10 the switching frequency
(380kHz). The compensation resistor and capacitor are
then chosen to optimize control-loop stability.
Choose the compensation resistor RC to set the
desired crossover frequency fC . Determine the value
by the following equation:
Output Capacitor
The output capacitor keeps output ripple small and
RC =
ensures control-loop stability. The output capacitor
must also have low impedance at the switching
2π × COUT × VOUT × R CS × fc
Gm × VIN
Where Cout is the output capacitance, Vout is the
frequency. Ceramic, polymer, and tantalum or low-ESR
output voltage, RCS is the current-sense amplifier
electrolytic capacitors are suitable.
transresistance (0.2V/A), Gm is the error amplifier
Output ripple with a ceramic output capacitor is
transconductance (80 µS ) and VIN is the feedback
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AAT1346A/B/C
threshold voltage (1.222V).
If the value calculated for RC is greater than 100 kΩ ,
100 kΩ is recommend.
Choose the compensation capacitor CC to set the
zero to 1/4 of the crossover frequency.
CC <
LAYOUT CONSIDERATIONS
CONSIDERATIONS
Conductors carrying discontinuous currents and any
high-current path should be made as short and wide as
possible. The compensation network should be very
close to the EO pin and avoid through VIA. The IC
must be bypassed with a 0.22 µF ceramic capacitor
COUT × VOUT
4 × RC
placed close to the VDD. Tie the feedback resistor
divider to be very close to output capacitor and far
If the output filter capacitor Cout has significant ESR,
away from the inductor or Schottky diode. Keep the
a zero occurs at the following:
feedback network IN close to the IC. Switching nodes
(SW) should be kept as small as possible and should
ZESR =
be routed away from high-impedance nodes such as
1
IN.
2π × C OUT × RESR
If ZESR > fC /4, it can be ignored, as is typically the
case with ceramic output capacitors. If ZESR < fC /4,
it should be cancelled with a pole set by capacitor Cp
connected from EO to GND:
CP =
C OUT × RESR
RC
If Cp is calculated to be <10pF, it can be omitted.
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AAT1346A/B/C
PACKAGE DIMENSION
SOP- 8
Symbol
A
A1
A2
b
C
D
E
E1
e
L
y
θ
Dimensions In Millimeters
MIN
TYP
MIN
1.35
1.60
1.73
0.05
-----0.15
-----1.45
-----0.33
0.41
0.51
0.19
0.20
0.25
4.80
4.85
4.95
5.79
5.99
6.20
3.81
3.91
3.99
1.27 BSC
0.406
0.710
1.270
----------0.076
0˚
-----8˚
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