IS31LT3910 UNIVERSAL HIGH BRIGHTNESS LED DRIVER WITH TEMPERATURE COMPENSATION May 2014 GENERAL DESCRIPTION FEATURES The IS31LT3910 is a peak current mode control LED driver IC. The IS31LT3910 operates in constant offtime mode. It allows efficient operation of High Brightness (HB) LEDs with voltage sources ranging from 8VDC to 450DC or 110VAC/220VAC. The IS31LT3910 includes a PWM dimming input that can accept an external control signal with a duty ratio of 0 - 100% and a frequency of up to a few kilohertz. It also includes a 0 - 240mV linear dimming input which can be used both for linear dimming and temperature compensation of the LED current. The IS31LT3910 is ideally suited for buck LED drivers. Since the IS31LT3910 operates in peak current mode control, the controller achieves good output current regulation without the need for any loop compensation. It achieves good PWM dimming response because the response time is limited only by the rate of rise and fall of the inductor current, enabling very fast rise and fall time. Wide input range from 8VDC to 450DC or 110VAC/220 VAC Temperature compensation to regulate LED current Application from a few mA to more than 1A output Constant off-time operation Linear and PWM dimming capability Switch mode controller for single switch LED drivers Requires few external components for operation APPLICATIONS DC/DC or AC/DC LED driver applications General purpose constant current source Signal and decorative LED lighting backlighting LED driver TYPICAL APPLICATION CIRCUIT VINDC 8V ~ 450V 8 7 CIN NTC D1 RIN COFF VCC C1 L1 TOFF GATE 2 1 R1 3 5 M1 IS31LT3910 PWMD VREF LD CS GND 6 4 RCS C2 Figure 1 Typical Application Circuit Integrated Silicon Solution, Inc. – www.issi.com Rev. B, 05/12/2014 1 IS31LT3910 PIN CONFIGURATIONS Package Pin Configurations (Top View) SOP-8 PIN DESCRIPTION No. Pin Description 1 VREF This pin provides reference a voltage of 1.2V, no bypass capacitor is needed. 2 PWMD This is the PWM dimming input of the IC. When this pin is pulled to GND, the gate driver is turned off. When the pin is pulled high, the gate driver operates normally. 3 LD This pin is the linear dimming input and sets the current sense threshold as long as the voltage at the pin is less than 240mV (Typ.). It can also used as temperature compensation threshold voltage. 4 GND Ground return for all internal circuitry. This pin must be electrically connected to ground. 5 GATE This pin is the output gate driver for an external N-channel power MOSFET. 6 CS This pin is the current sense pin used to sense the MOSFET current by means of an external sense resistor. When this pin exceeds the lower of either the internal 240mV or the voltage at the LD pin, the gate output goes low. 7 TOFF This pin sets the off time of the power MOSFET. If left floating then the off time will be 510ns. When a capacitor is connected between TOFF and GND, the off time is increased. 8 VIN This pin is the input of an 8V ~ 450V voltage supply through a resistor, clamped at 7.1V internally, it must be bypassed with a capacitor to GND. Integrated Silicon Solution, Inc. – www.issi.com Rev. B, 05/12/2014 2 IS31LT3910 ORDERING INFORMATION Industrial Rage: -40°C to +85°C Order Part No. Package QTY/Reel IS31LT3910-GRLS2-TR SOP-8, Lead-free 2500 Copyright © 2014 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that: a.) the risk of injury or damage has been minimized; b.) the user assume all such risks; and c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances Integrated Silicon Solution, Inc. – www.issi.com Rev. B, 05/12/2014 3 IS31LT3910 ABSOLUTE MAXIMUM RATINGS VIN pin voltage to GND CS, LD, PWMD, GATE, TOFF, VREF pin voltage to GND VIN pin Input Current Range (Note 1) Junction temperature range, TJ Storage temperature range, TSTG RθJA ESD (HBM) ESD (CDM) -0.3V ~ +8V -0.3V ~ +6V 1mA ~ 10mA -40°C ~ +150°C -65°C ~ +150°C 80°C/W 8kV 500V Note: Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS The specifications are at TA=25°C and VINDC =10V RIN =2kΩ, unless otherwise noted (Note 1). Symbol Parameter Conditions Min. Typ. Max. Unit 450 V Input DC supply voltage range Connect a decent resistor from DC supply voltage to VIN pin (Note 2) VIN clamp voltage (Note 3) 6.6 7.1 7.6 V Operation current range VIN =6V, GATE floating 0.32 0.48 0.64 mA UVLO Undervoltage lockout threshold VIN rising 6.0 6.5 6.9 V △UVLO Undervoltage lockout hysteresis VIN falling VINDC VIN_CLAMP IIN 8 500 mV VENL Pin PWMD input low voltage 0.8 VENH Pin PWMD input high voltage 2 REN Pin PWMD pull-up resistance 75 100 125 kΩ VCS_TH Current sense pull-in threshold voltage 230 240 250 mV VLD Linear Dimming pin voltage low threshold 0.05 mV VHD Linear Dimming pin voltage high threshold 0.24 mV tBLANK Current sense blanking interval 400 V V 480 550 ns Delay to output VCS=VCS_TH+50mV after tBLANK tOFF Off Time TOFF pin Floating tRISE GATE output rise time CGATE =500pF 19 ns tFALL GATE output fall time CGATE =500pF 29 ns VREF REF pin voltage tDELAY VREF_LOAD Load regulation of reference voltage 30 420 1.12 IREF =0~500µA,VPWMD =5.0V 510 ns 600 ns 1.20 1.30 V 0.5 5 mV Note 1: All parameters are tested at 25°C. Specifications over temperature are guaranteed by design. Note 2: VINDC is the power supply to LED, and there should be an appropriate resistor between VINDC and VIN . Note 3: Beyond the input current range, VIN may not clamp at 7.1V. Integrated Silicon Solution, Inc. – www.issi.com Rev. B, 05/12/2014 4 IS31LT3910 FUNCTIONAL BLOCK DIAGRAM Integrated Silicon Solution, Inc. – www.issi.com Rev. B, 05/12/2014 5 IS31LT3910 APPLICATION INFORMATION The IS31LT3910 is optimized to drive buck LED drivers using peak current mode control. This control method provides fairly accurate LED current control without the need for a high side current sensing or the design of any additional loop compensation. The IC uses very few external components and provides for either Linear or PWM control of the LED current. A capacitor connected to the TOFF pin programs the off-time of the oscillator inside. The oscillator produces pulses at regular intervals. These pulses set the SR flip-flop in the IS31LT3910 which causes the GATE driver to turn on. When the MOSFET turns on, the current through the inductor starts ramping up. This current flows through the external sense resistor RCS and produces a ramp voltage at the CS pin. The comparators are constantly comparing the CS pin voltage to both the voltage at the LD pin and the internal 240mV. Once the blanking time is complete, the output of these comparators is allowed to reset the flip flop. When the output of either one of the two comparators goes high, the flip flop is reset and the GATE output goes low. If neither of the comparator goes high, the GATE keeps high. Assuming a 30% ripple in the inductor, the current sense resistor RCS can be set by using: RCS 0.24V(orVLD ) 1.15 I LED (A) A constant off-time peak current control scheme can easily operate at duty cycles greater than 0.5 and also gives inherent input voltage rejection making the LED current almost insensitive to input voltage variations. INPUT VOLTAGE REGULATOR When a voltage is applied through a suitable input resistor to the VIN pin, the IS31LT3910 maintains a constant 7.1V (Typ.) at the VIN pin. This voltage is used to power the IC. The VIN pin must be bypassed by a low ESR capacitor to provide a low impedance path for the high frequency current of the output GATE driver. The input current drawn from the VIN pin is a sum of the 0.5mA (Typ) current drawn by the internal circuit and the current drawn by the GATE driver (which in turn depends on the switching frequency and the GATE charge of the external MOSFET). I IN 0.5mA QG f S In the above equation, fS is the switching frequency and QG is the GATE charge of the external MOSFET (which can be obtained from the datasheet of the MOSFET). Integrated Silicon Solution, Inc. – www.issi.com Rev. B, 05/12/2014 CURRENT SENSE The current sense input of the IS31LT3910 goes to the non-inverting inputs of two comparators. The inverting terminal of oe comparator is tied to an internal 240mV reference whereas the inverting terminal of the other comparator is connected to the LD pin. The outputs of both these comparators are fed into an OR GATE and the output of the OR GATE is fed into the reset pin of the flip-flop. Thus, the comparator which has the lowest voltage at the inverting terminal determines when the GATE output is turned off. The outputs of the comparators also include a typical 480ns blanking time which prevents spurious turnoffs of the external MOSFET due to the turn-on spike normally present in peak current mode control. In rare cases, this internal blanking time might not be enough to filter out the turn-on spike. In these cases, an external RC filter needs to be added between the external sense resistor (RCS) and the CS pin. Please note that the comparators are relatively fast with a typical 80ns response time. A proper layout minimizing external inductances will prevent false triggering of these comparators. OSCILLATOR The oscillator in the IS31LT3910 is controlled by a single capacitor connected at the TOFF pin. The equation governing the tOFF time of oscillation period is given by: t OFF _ TIME ( s ) 0.51 10 6 (1 COFF ) 10 pF LINEAR DIMMING The Linear Dimming pin is used to control the LED current. An external voltage ranging from 50mV to 240mV can be applied to the LD pin to adjust the LED current during operation. There are two cases when it may be necessary to use the Linear Dimming pin. In some cases, it may not be possible to find the exact RCS value required to obtain the LED current when the internal 240mV is used. In these cases, an external voltage divider from the VIN pin can be connected to the LD pin to obtain a voltage (less than 240mV) corresponding to the desired voltage across RCS. Linear dimming may be desired to adjust the current level to reduce the brightness of the LEDs. Connecting a resistor between the VREF pin and the LD pin, and also connecting an NTC thermistor between the LD pin and ground (refer to Application Circuit), the IS31LT3910 is able to realize the temperature compensation function (See more detail 6 IS31LT3910 in Temperature Compensation section). To use the internal 240mV, the LD pin must be connected to PWMD pin. TOFF TIME REGULATION CAPACITOR (COFF) AND TOFF TIME PWM DIMMING PWM Dimming can be achieved by driving the PWMD pin with a low frequency square wave signal. When the PWM signal is low, the GATE driver is disabled; and when the PWMD signal is high, the GATE driver is enabled. Since the PWMD signal does not turn off the other parts of the IC, the response of the IS31LT3910 to the PWMD signal is almost instantaneous. The rate of rise and fall of the LED current is thus determined solely by the rise and fall times of the inductor current. To disable PWM dimming function, leave the PWMD pin floating. TEMPERATURE COMPENSATION IS31LT3910 provides thermal protection for your LEDs. Refer to application circuit, adding a NTC themistor close to the LEDs string will realize the temperature compensation of LEDs current. If the temperature of the LEDs rises, the resistance of the NTC thermistor decreases until the voltage of the LD pin falls below 0.24V. Then the average current is controlled by the LD pin and the temperature compensation function starts. The formula is given as below: RNTC VREF 0.24V R1 RNTC Assuming a 30% ripple in the inductor, the temperature compensated continuous current may be computed as: I OUT parallel two 430kΩ/0.5W resistor for lifetime consideration. CIN is chosen to be 10µF/40V capacitor For high output voltage, low output current application, we need shorter tOFF time to obtain the smaller application inductor. For high output current application, it is suggested that the frequency is set to not more than 50kHz (typical 25kHz~30kHz). In IS31LT3910, t OFF _ TIME 0.5110 6 (1 COFF ) 10 pF So, apply COFF =150pF, then tOFF =8.16µs. CURRENT SENSE RESISTOR (RCS) Design for low current ripple will also improve current accuracy, but it will require a large value of inductor. High current ripple allows a lower cost inductor. So we need to consider these two factors when selecting an inductor. A capacitor placed in parallel with the array of LEDs can be used to reduce the LED current ripple while keeping the same average current. A typical value is 1µF should be used. Since the output average IO_AVG = 160mA, Assume 50% current ripple, then 1 1 I Ripple 50% 160mA 40mA 2 2 I O _ PEAK I O_AVG RNTC VREF ( R1 RNTC ) RS 1.15 RCS 1 I Ripple 200mA 2 0.24V 1.2 200mA Make sure the value of R1 is more than 1kΩ. THE INDUCTOR (L1) CHOSEN When the LD pin voltage reduces to less than 50mV the chip is shutdown. The inductor value depends on the ripple current in the LEDs. tOFF =8.16µs After the ambient temperature returns to a safe temperature, the current will return to the set value. Example: DC input voltage: VINDC =230V Output LED strings: VO =134.4V (42 LEDs in series, 3.2V for each one), IO_AVG =160mA (8 parallels LEDs, 20mA for each one) IC INPUT RESISTOR (RIN) AND HOLD CAPACITOR (CIN) R IN V INDC V IN 230 7.0 223k I IN 1 Integrated Silicon Solution, Inc. – www.issi.com Rev. B, 05/12/2014 L VO t OFF 134.4 8.16 13.7 mH I Ripple 80 The inductor chosen should have a saturation current higher than the peak output current and a continuous current rating above the required mean output current. The DC resistance (DCR) of the inductor is also essential when choosing an inductor. Bigger DCR will lead to more heat. The value of the inductor will reduce as its temperature rises, leading to higher current ripple, which in turn, reduces the average output current. 7 IS31LT3910 MOSFET (Q1) AND DIODE (D1) The peak voltage seen by the MOSFET is equal to the maximum input voltage. Using a 50% safety rating, VFET 1.5 VINDC The maximum RMS current through the MOSFET depends on the maximum current. Hence, the current rating of the MOSFET is: Integrated Silicon Solution, Inc. – www.issi.com Rev. B, 05/12/2014 I FET I PEAK 150% For this application, choose a MOSFET 600V, 1A to 2A. 2N60 is good choice. The peak voltage rating of the diode is the same as the FET. The current range of the diode is: I Diode I PEAK 150% For this example, 600V/1A fast recovery diode is recommended. 8 IS31LT3910 CLASSIFICATION REFLOW PROFILES Profile Feature Pb-Free Assembly Preheat & Soak Temperature min (Tsmin) Temperature max (Tsmax) Time (Tsmin to Tsmax) (ts) 150°C 200°C 60-120 seconds Average ramp-up rate (Tsmax to Tp) 3°C/second max. Liquidous temperature (TL) Time at liquidous (tL) 217°C 60-150 seconds Peak package body temperature (Tp)* Max 260°C Time (tp)** within 5°C of the specified classification temperature (Tc) Max 30 seconds Average ramp-down rate (Tp to Tsmax) 6°C/second max. Time 25°C to peak temperature 8 minutes max. Figure 2 Classification Profile Integrated Silicon Solution, Inc. – www.issi.com Rev. B, 05/12/2014 9 IS31LT3910 PACKAGE INFORMATION SOP-8 Note: All dimensions in millimeters unless otherwise stated. Integrated Silicon Solution, Inc. – www.issi.com Rev. B, 05/12/2014 10