HD74HC595 8-bit Shift Register/Latch (with 3-state outputs) REJ03D0634-0200 (Previous ADE-205-514) Rev.2.00 Mar 30, 2006 Description This device each contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift register and the storage register. The shift register has a direct-overriding clear, serial input, and serial output pins for cascading. Both the shift register and storage register clocks are positive-edge triggered. If the user wishes to connect both clocks together, the shift register state will always be one clock pulse ahead of the storage register. Features • High Speed Operation: tpd (RCK to Q) = 17 ns typ (CL = 50 pF) • High Output Current: Fanout of 15 LSTTL Loads (QA to QH outputs) • Wide Operating Voltage: VCC = 2 to 6 V • Low Input Current: 1 µA max • Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) • Ordering Information Part Name Package Type HD74HC595P DILP-16 pin HD74HC595FPEL SOP-16 pin (JEITA) Package Code (Previous Code) PRDP0016AE-B (DP-16FV) PRSP0016DH-B (FP-16DAV) Package Abbreviation Taping Abbreviation (Quantity) P — FP EL (2,000 pcs/reel) Note: Please consult the sales office for the above package availability. Function Table Inputs RCK X SCK X SCLR X G H QA to QH high impedance X X X L H X X Shift register cleared QH’ = L Shift register clocked Qn = Qn – 1, QA = SER X H X Contents of shift register transferred to output latches Rev.2.00 Mar 30, 2006 page 1 of 10 Function HD74HC595 Pin Arrangement QB 1 16 VCC QC 2 15 QA QD 3 14 SER QE 4 13 G QF 5 12 RCK QG 6 11 SCK QH 7 10 SCLR GND 8 9 QH' (Top view) Rev.2.00 Mar 30, 2006 page 2 of 10 HD74HC595 Logic Diagram G RCK SER D Q D QA D QB D QC D QD D QE D QF D QG D QH R D Q R D Q R D Q R D Q R D Q R D Q R D Q SCK R SCLR Rev.2.00 Mar 30, 2006 page 3 of 10 QH' HD74HC595 Absolute Maximum Ratings Item Symbol Ratings Unit Supply voltage range Input / Output voltage VCC VIN, VOUT –0.5 to 7.0 –0.5 to VCC +0.5 V V IIK, IOK IOUT ±20 ±35 mA mA ICC or IGND PT ±75 500 mA mW Input / Output diode current Output current VCC, GND current Power dissipation Storage temperature Tstg –65 to +150 °C Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of which may be realized at the same time. Recommended Operating Conditions Item Supply voltage Symbol VCC Ratings 2 to 6 Unit V Input / Output voltage Operating temperature VIN, VOUT Ta 0 to VCC –40 to 85 V °C tr , tf 0 to 1000 0 to 500 Input rise / fall time Note: *1 0 to 400 1. This item guarantees maximum limit when one input switches. Waveform: Refer to test circuit of switching characteristics. Rev.2.00 Mar 30, 2006 page 4 of 10 ns Conditions VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V HD74HC595 Electrical Characteristics Ta = 25°C Item Input voltage Symbol VCC (V) VIH VIL Output voltage VOH VOL Output voltage VOH VOL Ta = –40 to+85°C 2.0 Min 1.5 Typ — Max — Min 1.5 Max — 4.5 6.0 3.15 4.2 — — — — 3.15 4.2 — — 2.0 4.5 — — — — 0.5 1.35 — — 0.5 1.35 6.0 2.0 — 1.9 — 2.0 1.8 — — 1.9 1.8 — 4.5 6.0 4.4 5.9 4.5 6.0 — — 4.4 5.9 — — 4.5 6.0 4.18 5.68 — — — — 4.13 5.63 — — 2.0 4.5 — — 0.0 0.0 0.1 0.1 — — 0.1 0.1 6.0 4.5 — — 0.0 — 0.1 0.26 — — 0.1 0.33 6.0 2.0 — 1.9 — 2.0 0.26 — — 1.9 0.33 — 4.5 6.0 4.4 5.9 4.5 6.0 — — 4.4 5.9 — — 4.5 6.0 4.18 5.68 — — — — 4.13 5.63 — — 2.0 4.5 — — 0.0 0.0 0.1 0.1 — — 0.1 0.1 6.0 4.5 — — 0.0 — 0.1 0.26 — — 0.1 0.33 Unit Test Conditions V V V QA to QH IOH = –20 µA Vin = VIH or VIL IOH = –6 mA IOH = –7.8 mA V QA to QH IOL = 20 µA Vin = VIH or VIL IOL = 6 mA V IOL = 7.8 mA Q’H IOH = –20 µA Vin = VIH or VIL IOH = –4 mA IOH = –5.2 mA V Q’H IOL = 20 µA Vin = VIH or VIL IOL = 4 mA Off-state output current IOZ 6.0 6.0 — — — — 0.26 ±0.5 — — 0.33 ±5.0 IOL = 5.2 mA µA Vin = VIH or VIL, Vout = VCC or GND Input current Quiescent supply current Iin ICC 6.0 6.0 — — — — ±0.1 4.0 — — ±1.0 40 µA Vin = VCC or GND µA Vin = VCC or GND, Iout = 0 µA Rev.2.00 Mar 30, 2006 page 5 of 10 HD74HC595 Switching Characteristics (CL = 50 pF, Input tr = tf = 6 ns) Ta = 25°C Item Symbol VCC (V) Maximum clock frequency fmax Propagation delay time tPLH tPHL tPLH tPHL tPLH Ta = –40 to +85°C 2.0 Min — Typ — Max 5 Min — Max 4 4.5 6.0 — — — — 27 31 — — 21 24 2.0 4.5 — — — 12 115 23 — — 145 29 6.0 2.0 — — — — 20 150 — — 25 190 4.5 6.0 — — 17 — 30 26 — — 38 33 2.0 4.5 — — — 20 175 35 — — 220 44 6.0 2.0 — — — — 30 150 — — 37 190 4.5 6.0 — — 13 — 30 26 — — 38 33 Output enable time tZL tZH Output disable time tLZ tHZ 2.0 4.5 — — — 15 150 30 — — 190 38 Setup time tsu 6.0 2.0 — 100 — — 26 — — 125 33 — 4.5 6.0 20 17 1 — — — 25 21 — — 2.0 4.5 200 40 — 8 — — 250 50 — — 6.0 2.0 34 80 — — — — 43 100 — — 4.5 6.0 16 14 8 — — — 20 17 — — 2.0 4.5 100 20 — — — — 125 25 — — 6.0 2.0 17 5 — — — — 21 5 — — 4.5 6.0 5 5 1 — — — 5 5 — — 2.0 4.5 — — — 5 75 15 — — 95 19 6.0 2.0 — — — — 13 60 — — 16 75 4.5 6.0 — — 4 — 12 10 — — 15 13 — — 5 10 — 5 Pulse width Removal time Hold time Output rise/fall time Input capacitance tw trem th tTLH tTHL Cin Rev.2.00 Mar 30, 2006 page 6 of 10 Unit Test Conditions MHz ns SCK to QH’ ns RCK to Q ns SCLR to QH’ ns ns ns SER to SCK ns SCK to RCK ns ns ns ns QH’ ns Q pF HD74HC595 Test Circuit VCC VCC Output Pulse Generator Zout = 50 Ω Input Pulse Generator Zout = 50 Ω 1 kΩ G QA to QH or RCK QH' See Function Table Input S1 OPEN GND CL = 50 pF SER SCK SCLR VCC TEST t PLH / t PHL S1 OPEN t ZH/ t HZ t ZL / t LZ GND VCC Note : 1. CL includes probe and jig capacitance. Waveforms • Waveform – 1 (SCK to QH') tf tr VCC 90 % 50 % 50 % Input SCK 10 % 50 % 10 % tw(H) t PLH t PHL 90 % Output QH' 0V tw(L) VOH 90 % 50 % 10 % 50 % 10 % t TLH VOL t THL Note : 1. Input waveform : PRR ≤ 1 MHz, duty cycle 50%, tr ≤ 6 ns, tf ≤ 6 ns • Waveform – 2 (RCK to Q) tr VCC 90 % Input RCK 50 % 10 % 0V tPLH/tPHL Output QA to QH 90 % 90 % 10 % 50 % 10 % tTLH/tTHL Note : 1. Input waveform : PRR ≤ 1 MHz, duty cycle 50%, tr ≤ 6 ns, tf ≤ 6 ns Rev.2.00 Mar 30, 2006 page 7 of 10 VOH VOL HD74HC595 • Waveform – 3 (SCLR to QH') tf tr 90 % 50 % Input SCLR VCC 90 % 50 % 10 % 10 % 0V tw t PHL VOH 90 % Output QH' 50 % 10 % VOL t THL t rem 90 % Input SCK 50 % 10 % VCC 0V t TLH Note : 1. Input waveform : PRR ≤ 1 MHz, duty cycle 50%, tr ≤ 6 ns, tf ≤ 6 ns • Waveform – 4 (SER to SCK) tr/tf Input SER 90 % 50 % 10 % tr/tf 90 % 50 % 10 % t su 90 % 50 % 10 % VCC 0V th 90 % Input SCK 90 % 50 % 10 % 50 % 10 % VCC 0V tr Note : 1. Input waveform : PRR ≤ 1 MHz, duty cycle 50%, tr ≤ 6 ns, tf ≤ 6 ns Rev.2.00 Mar 30, 2006 page 8 of 10 HD74HC595 • Waveform – 5 (SCK to RCK) tr tf 90 % Input SCK VCC 90 % 50 % 10 % 10 % t su 0V tw VCC 90 % Input RCK 50 % 10 % 50 % 10 % tr 0V tf Note : 1. Input waveform : PRR ≤ 1 MHz, duty cycle 50%, tr ≤ 6 ns, tf ≤ 6 ns • Waveform – 6 (tZL, tZH, tLZ, tHZ) tf Input G tr 90 % 50 % 90 % 50 % 10 % t ZL 10 % VCC 0V t LZ VOH Waveform - A 50 % t ZH Waveform - B 10 % t HZ VOL 90 % VOH 50 % VOL Notes : 1. Input waveform : PRR ≤ 1 MHz, duty cycle 50%, tr ≤ 6 ns, tf ≤ 6 ns 2. Waveform - A is for an output with internal conditions such that the output is low except when disabled by the output control. 3. Waveform - B is for an output with internal conditions such that the output is high except when disabled by the output control. 4. The output are measured one at a time with one transition per measurement. Rev.2.00 Mar 30, 2006 page 9 of 10 HD74HC595 Package Dimensions JEITA Package Code P-DIP16-6.3x19.2-2.54 RENESAS Code PRDP0016AE-B Previous Code DP-16FV MASS[Typ.] 1.05g D 9 E 16 1 8 b3 0.89 A1 A Z L Reference Symbol θ bp e e1 D E A A1 bp b3 c θ e Z L c e1 ( Ni/Pd/Au plating ) JEITA Package Code P-SOP16-5.5x10.06-1.27 RENESAS Code PRSP0016DH-B *1 Previous Code FP-16DAV Dimension in Millimeters Min Nom Max 7.62 19.2 20.32 6.3 7.4 5.06 0.51 0.40 0.48 0.56 1.30 0.19 0.25 0.31 0° 15° 2.29 2.54 2.79 1.12 2.54 MASS[Typ.] 0.24g D F 16 NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET. 9 c HE *2 E bp Index mark Terminal cross section ( Ni/Pd/Au plating ) 1 Z 8 e *3 bp x Reference Symbol M A L1 A1 θ y L Detail F Rev.2.00 Mar 30, 2006 page 10 of 10 D E A2 A1 A bp b1 c c1 θ HE e x y Z L L1 Dimension in Millimeters Min Nom Max 10.06 10.5 5.50 0.00 0.10 0.20 2.20 0.34 0.40 0.46 0.15 0.20 0.25 0° 8° 7.50 7.80 8.00 1.27 0.12 0.15 0.80 0.50 0.70 0.90 1.15 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. 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