HD74HCT620, HD74HCT623 Octal Bus Transceivers (with inverted 3-state outputs) Octal Bus Transceivers (with 3-state outputs) REJ03D0671–0200 (Previous ADE-205-561) Rev.2.00 Mar 30, 2006 Description This octal bus transceiver is designed for asynchronous two-way communication between data buses. The control function implementation allows for maximum flexibility in timing. This device allows data transmission from the A bus to the B bus or from the B bus to the A bus depending upon the logic levels at the enable inputs (GBA and GAB). The enable inputs can be used to disable the device so that the buses are effectively isolated. The dual-enable configuration gives these devices the capability to store data by simultaneous enabling of GBA and GAB. Each output reinforces its input in this transceiver configuration. Thus, when both control inputs are enabled and all other data sources to the two sets of bus lines are at high impedance, both sets of bus lines (16 in all) will remain at their last states. The 8-bit codes appearing on the two sets of buses will be identical for the HD74HCT623 or complementary for the HD74HCT620. Features • • • • • • • LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility High Speed Operation: tpd (Bus to Bus) = 15 ns typ (CL = 50 pF) High Output Current: Fanout of 15 LSTTL Loads (QA to QH outputs) Wide Operating Voltage: VCC = 4.5 to 5.5 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) Ordering Information Part Name Package Type HD74HCT623FPEL SOP-20 pin (JEITA) HD74HCT620RPEL HD74HCT623RPEL SOP-20 pin (JEDEC) Package Code (Previous Code) PRSP0020DD-B (FP-20DAV) PRSP0020DC-A (FP-20DBV) Package Abbreviation Taping Abbreviation (Quantity) FP EL (2,000 pcs/reel) RP EL (1,000 pcs/reel) Note: Please consult the sales office for the above package availability. Function Table Enable Inputs GBA L H H L GAB L H L H Rev.2.00 Mar 30, 2006 page 1 of 8 Operation HD74HCT620 HD74HCT623 B data to A bus B data to A bus A data to B bus A data to B bus Isolation Isolation B data to A bus, A data to B bus B data to A bus, A data to B bus HD74HCT620, HD74HCT623 Pin Arrangement Enable GAB 1 20 VCC A1 2 19 Enable GBA A2 3 18 B1 A3 4 17 B2 A4 5 16 B3 A5 6 15 B4 A6 7 14 B5 A7 8 13 B6 A8 9 12 B7 GND 10 11 B8 (Top view) Logic Diagram HD74HCT620 GAB GBA VCC A1 VCC B1 A2 B2 A3 B3 A4 B4 A5 B5 A6 B6 A7 B7 A8 B8 Rev.2.00 Mar 30, 2006 page 2 of 8 HD74HCT620, HD74HCT623 HD74HCT623 GAB GBA VCC A1 B1 VCC A2 B2 A3 B3 A4 B4 A5 B5 A6 B6 A7 B7 A8 B8 Absolute Maximum Ratings Item Supply voltage range Input / Output voltage Input / Output diode current Output current VCC, GND current Power dissipation Storage temperature Symbol VCC VIN, VOUT IIK, IOK IOUT ICC or IGND PT Tstg Ratings –0.5 to 7.0 –0.5 to VCC +0.5 ±20 ±35 ±75 500 –65 to +150 Unit V V mA mA mA mW °C Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of which may be realized at the same time. Recommended Operating Conditions Item Symbol Ratings Supply voltage VCC 4.5 to 5.5 Input / Output voltage VIN, VOUT 0 to VCC Operating temperature Ta –40 to 85 Input rise / fall time*1 tr, tf 0 to 500 Notes: 1. This item guarantees maximum limit when one input switches. Waveform: Refer to test circuit of switching characteristics. Rev.2.00 Mar 30, 2006 page 3 of 8 Unit V V °C ns Conditions VCC = 4.5 V HD74HCT620, HD74HCT623 Electrical Characteristics Item Input voltage Output voltage Ta = 25°C Min Typ Max 4.5 to 5.5 2.0 — — 4.5 to 5.5 — — 0.8 4.5 4.4 — — 4.5 4.18 — — 4.5 — — 0.1 4.5 — — 0.26 5.5 — — ±0.5 Symbol VCC (V) VIH VIL VOH VOL Off-state output current Input current IOZ Quiescent supply current ICC Iin 5.5 5.5 — — — — Ta = –40 to+85°C Min Max 2.0 — — 0.8 4.4 — 4.13 — — 0.1 — 0.33 — ±5.0 ±0.1 4.0 ±1.0 40 — — Unit V V V V µA µA µA Test Conditions Vin = VIH or VIL IOH = –20 µA IOH = –6 mA Vin = VIH or VIL IOL = 20 µA IOL = 6 mA Vin = VIH or VIL, Vout = VCC or GND Vin = VCC or GND Vin = VCC or GND, Iout = 0 mA Switching Characteristics (CL = 50 pF, Input tr = tf = 6 ns) Item Propagation delay time Output enable time Output disable time Output rise/fall time Input capacitance Symbol VCC (V) tPLH tPHL tZH tZL tHZ tLZ tTLH tTHL Cin Rev.2.00 Mar 30, 2006 page 4 of 8 4.5 Ta = 25°C Min Typ Max — 13 20 Ta = –40 to +85°C Min Max — 25 Unit ns 4.5 4.5 4.5 4.5 4.5 — — — — — 16 16 16 19 21 20 30 30 30 30 — — — — — 25 38 38 38 38 4.5 — 4 12 — 15 ns — — 5 10 — 10 pF ns ns Test Conditions HD74HCT620, HD74HCT623 Test Circuit HD74HCT620 VCC VCC Pulse Generator Zout = 50 Ω See Function Table GBA Input Output A1 S1 1 kΩ S2 B1 OPEN GND CL = 50 pF VCC GAB TEST tPLH / tPHL S2 OPEN tZH / tHZ tZL / tLZ GND VCC Note : 1. CL includes probe and jig capacitance. 2. A2–B2, A3–B3, A4–B4, A5–B5, A6–B6, A7–B7, A8–B8 are identical to above load circuit. 3. S1 is a input / output swich. HD74HCT623 VCC VCC Pulse Generator Zout = 50 Ω See Function Table GBA Input Output A1 S1 1 kΩ S2 B1 OPEN GND CL = 50 pF VCC GAB TEST tPLH / tPHL S2 OPEN tZH / tHZ tZL / tLZ GND VCC Note : 1. CL includes probe and jig capacitance. 2. A2–B2, A3–B3, A4–B4, A5–B5, A6–B6, A7–B7, A8–B8 are identical to above load circuit. 3. S1 is a input / output swich. Rev.2.00 Mar 30, 2006 page 5 of 8 HD74HCT620, HD74HCT623 Waveforms HD74HCT620 • Waveform – 1 tf tr 90 % 1.3 V Input A or B VCC 90 % 1.3 V 10 % 10 % 0V tPLH tPHL 90 % Output B or A 90 % 1.3 V 10 % 1.3 V 10 % VOH VOL tTLH tTHL Notes : 1. Input waveform : PRR ≤ 1 MHz, duty cycle 50%, tr ≤ 6 ns, tf ≤ 6 ns 2. The output are measured one at a time with one transition per measurement. HD74HCT623 • Waveform – 1 tf tr 90 % 1.3 V Input A or B 10 % 10 % 0V tPHL t PLH Output B or A VCC 90 % 1.3 V 90 % 1.3 V 10 % tTLH VOH 90 % 1.3 V 10 % tTHL Notes : 1. Input waveform : PRR ≤ 1 MHz, duty cycle 50%, tr ≤ 6 ns, tf ≤ 6 ns 2. The output are measured one at a time with one transition per measurement. Rev.2.00 Mar 30, 2006 page 6 of 8 VOL HD74HCT620, HD74HCT623 HD74HCT620, HD74HCT623 • Waveform – 2 tr tf Enable Input GBA 90 % 1.3 V VCC 90 % 1.3 V 10 % 10 % tZL 0V tLZ VOH 1.3 V Waveform - A 10 % tZH Waveform - B VOL tHZ 90 % 1.3 V VOH VOL • Waveform – 3 tf tr Enable Input GAB 90 % 1.3 V 10 % VCC 90 % 1.3 V 10 % tZL 0V tLZ VOH Waveform - A 1.3 V tZH Waveform - B 1.3 V 10 % VOL tHZ 90 % VOH VOL Notes : 1. Input waveform : PRR ≤ 1 MHz, duty cycle 50%, tr ≤ 6 ns, tf ≤ 6 ns 2. Waveform– A is for an output with internal conditions such that the output is low except when disabled by the output control. 3. Waveform– B is for an output with internal conditions such that the output is high except when disabled by the output control. 4. The output are measured one at a time with one transition per measurement. Rev.2.00 Mar 30, 2006 page 7 of 8 HD74HCT620, HD74HCT623 Package Dimensions JEITA Package Code P-SOP20-7.5x12.8-1.27 RENESAS Code PRSP0020DC-A *1 Previous Code FP-20DBV MASS[Typ.] 0.52g D F 20 NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" @ DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT @ INCLUDE TRIM OFFSET. 11 HE c *2 E bp Index mark Terminal cross section ( Ni/Pd/Au plating ) 1 e *3 bp x M L1 A Z Reference Dimension in Millimeters Symbol 10 A1 θ L y Detail F JEITA Package Code P-SOP20-5.5x12.6-1.27 RENESAS Code PRSP0020DD-B *1 Previous Code FP-20DAV Min Nom Max 12.80 13.2 7.50 0.10 0.20 0.30 2.65 0.34 0.40 0.46 0.20 0.25 0.30 0° 8° 10.00 10.40 10.65 1.27 0.12 0.15 0.935 0.40 0.70 1.27 1.45 MASS[Typ.] 0.31g D NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET. F 20 D E A2 A1 A bp b1 c c1 θ HE e x y Z L L1 11 c HE *2 E bp Index mark Terminal cross section ( Ni/Pd/Au plating ) 10 1 Z e *3 bp x Reference Dimension in Millimeters Symbol M A L1 A1 θ y L Detail F Rev.2.00 Mar 30, 2006 page 8 of 8 D E A2 A1 A bp b1 c c1 θ HE e x y Z L L1 Min Nom Max 12.60 13.0 5.50 0.00 0.10 0.20 2.20 0.34 0.40 0.46 0.15 0.20 0.25 0° 8° 7.50 7.80 8.00 1.27 0.12 0.15 0.80 0.50 0.70 0.90 1.15 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. 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