Da t a s he e t , Ve r s i on 2. 1, 24 Ma y 20 1 1 I CE2 H S 01 G H igh Pe r f or ma nc e Re s ona nt M ode Co ntr ol l e r P o w e r Ma n a g e m e n t & S u p p l y N e v e r s t o p t h i n k i n g . ICE2HS01G Revision History: 11 May 2010 Previous Version: 2.0 Page Subjects (major changes since last revision) 19 section 3:10 burst mode enable For questions on technology, delivery and prices please contact the Infineon Technologies Offices in Germany or the Infineon Technologies Companies and Representatives worldwide: see our webpage at http:// www.infineon.com CoolMOS™, CoolSET™ are trademarks of Infineon Technologies AG. Edition 24 May 2011 P u b lish ed b y In fin eo n T ec hn o log ies A G 81726 M u nich , G erm a n y © 2010 In fine o n T ech n o log ies AG A ll R ig h ts R ese rved . L eg al D isclaim er T he inform ation given in this docum ent shall in no event be regard ed as a guara ntee of conditions or characteristics. W ith respect to an y exam ples or hints given herein, an y typical values stated herein and/or an y inform ation regarding the application of the device, Infine on Technologies hereb y disclaim s any and a ll w arranties and liabilities of any kind, including w ithout lim itation, w arran ties of non-infringem ent of intellectual property rights of an y third party. In form atio n F or further info rm ation on techno log y, delivery te rm s and conditions and prices, please conta ct the nearest Infineon T ech nologies O ffice (w w w .infineon.co m ). W arn in g s D ue to technical requirem ents, co m ponents m a y contain dangerou s substances. For inform ation on the types in question, please contact the nearest Infineon T echn ologies O ffice. Infine on Technologies com ponents m a y be used in life -support devices or system s o nly w ith the exp ress w ritten approval of In fineon T echnolog ies, if a failure of such com ponents can reasonably b e expected to cause the failure of that life-support device or system or to affect the safety o r effectiveness of that device or system . Life support devices or system s are intend ed to be im planted in the hu m an bod y or to support an d/or m aintain and sustain and/or p rotect hum a n life. If the y fail, it is reasonable to assum e that the health of the user or other persons m a y be e ndange red. ICE2HS01G High Performance Resonant Mode Controller for Half-bridge LLC Resonant Converter Product Highlights ICE2HS01G • 30kHz~1MHz switching frequency range • High efficiency over wide load range • Innovative drive method for synchronous rectification • High accuracy frequency setting • High accuracy setting and adjustable dead time • Over load/open loop protection with adjustable blanking time and restart time • Mains undervoltage protection with hysteresis • External latch-off and over temperature protections PG-DSO-20-45 Features • Resonant mode controller for Half-bridge LLC resonant converter with synchronous rectification drives • 20-pin DSO package • 30kHz to 1MHz switching frequency • Adjustable minimum switching frequency with high accuracy • 50% duty cycle for both primary and secondary gate drives • Adjustable dead time with high accuracy • Driving signal for synchronous rectification which support full operation of Half-bridge LLC resonant converter • Internal and External disable function for synchronous rectification • Mains input under votlage protection with adjustable hysteresis • Three levels of overcurrent protection for enhanced dynamic performance • Open-loop/over load protection with adjustable blanking time and restart time • Adjustable over-temperature protection with latch-off • External latch-off enable pin Applications • PC power supplies • Server power supplies • Telecom power supplies • Flat panel TV and Flat panel display power supplies • AC-DC adapter Type ICE2HS01G Version 2.1 Package PG-DSO-20 3 24 May 2011 High Performance Resonant Mode Controller ICE2HS01G Typical Application Circuit The ICE2HS01G is a high performance resonant mode controller designed specially for high efficiency half-bridge LLC converter with synchrnous rectification at the secondary side. With its new driving techqiues, the synchronous rectification can be realized for half-bridge LLC converter operated with secondary switching current in both CCM and DCM conditions. No special synchronous rectification controller IC is needed at the seondary side.For best performance, it is suggested to use half-bridge driver IC in the primary side with ICE2HS01G. The typical application circuit of ICE2HS01G is shown in Figure 1. Figure 1 Version 2.1 Typical application circuit 4 24 May 2011 High Performance Resonant Mode Controller ICE2HS01G Table of Contents Page 1 Pin Configuration and Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.1 Pin configuration with PG-DSO-20 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.2 Pin Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2 Representative Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.7.1 3.7.2 3.7.3 3.7.4 3.7.5 3.8 3.9 3.10 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IC power supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Dead time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Softstart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Current sense and over-current protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Light load operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Synchronous rectification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SRD and CL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Turn-on delay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Turn-off delay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SR protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SR softstart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Mains Input Voltage Sense . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Over load protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EnA pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 10 10 13 12 14 14 15 15 16 16 17 17 18 18 19 4 4.1 4.2 4.3 4.3.1 4.3.2 4.3.3 4.3.4 4.3.5 4.3.6 4.3.7 4.3.8 4.3.9 4.3.10 4.3.11 4.3.12 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Supply Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Oscillator Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input voltage sense . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Current sense and current level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Soft start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Light load operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Reference Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Over load/Open loop protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Enable function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Synchronous rectification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Primary gate drive (HG, LG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Secondary gate drive (SHG, SLG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 20 21 22 22 23 23 24 24 24 25 25 25 26 27 27 5 Outline Dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Version 2.1 5 24 May 2011 High Performance Resonant Mode Controller ICE2HS01G Pin Configuration and Functionality 1 1.1 Pin Configuration and Functionality Pin configuration with PG-DSO-20 Figure 2 Pin configuration with PG-DSO-20 Table 1 Pin names Pin Symbol Function Pin Symbol Function 1 Timer Over-load blanking time and autorestart time 11 VINS Input bus voltage sense 2 EnA Enable 12 CS Current sense 3 SS Softstart 13 CL Currsnt sense output level 4 LOAD Load detection 14 SRD Sychronous rectification on duration and disable function 5 FREQ Frequency of operation 15 GND IC ground 6 Delay Advance delay time setting 16 SLG Gate logic for secondary low side switch 7 TD Primary dead time setting 17 SHG Gate logic for secondary high side switch 8 Vmc Voltage level for entering and leaving missing cycle mode 18 LG Gate logic for primary low side switch 9 Vref Reference voltage output 19 HG Gate logic for primary highside switch 10 Vres Resonant voltage setting 20 VCC IC power supply 1.2 Pin Functionality Timer (Over-load blanking time and auto-restart timer) Timer pin is used to set the blanking time and restart time for over load protection. The RC parallel circuit, C TL and RTL, is connected to this pin. The blanking time is determined by charging time of C TL through IC internal current source, and the restart time is determined by the discharging time of CTL through RTL. This allows the system to face a sudden power surge for a short period of time without triggering the over load protection. In addition, the average power delivered is not influenced by any VCC dip which can not reset internal reference voltage. EnA (Enable) Internally, this pin has a pull-up current source of 100mA. By connecting a resistor outside from this pin to ground, certain voltage level is set up on this pin. If the voltage level on this pin is pulled down below certain level, IC is latched. If the external resistor has a negative temperature coefficient, this pin can be used to implement over- Version 2.1 6 24 May 2011 High Performance Resonant Mode Controller ICE2HS01G Pin Configuration and Functionality temperature protection. In addition, the burst mode can be enabled/disabled by connnecting different capacitance to this pin. IC will do the set up function the first time VCC rise from a voltage lower than internal reference. SS (soft start) SS pin connects an external capacitor CSS to GND and a resistor ROCP to FREQ pin. An internal switch will first fully discharge CSS before soft start or autorestart, which guarantee high operating frequency for soft start or restart. ROCP determines the max operating frequency. During softstart, a internally current source is used to charge up the softstart capacitor. This current is big at first, it will be reduced once the SS voltage increases to some level and it will be further reduced if SS voltage increases to a higher level. In such a way, the smooth rising of output voltage can be achieved. Also, the soft start during time is mainly determined by the C SS. In case of over current condition, SS pin will be discharged through 2 internal resistors toward zero votlage. As a result, the operating frequeny will be increased and the highest frequency in this case is determined by the equivalent resistance of RFMIN and ROCP in parallal. LOAD (Load condition detection) A voltage divider, consist of RFT1 and RFT2, is connected to the collector of optocoupler, and this divided voltage is delivered to LOAD pin. If LOAD pin voltage is lower than a certain threshold, 0.1V, IC will stop switch. Only if the voltage level is higher than 0.15V, IC will resume swith again. A second function of this pin is to detect the over-load or open-loop faults. Once the voltage on this pin is higher than 1.8V, IC will start internal and external timer to determine whether entering the protection mode. The third function on this pin is to disable SR during light load mode. When the voltage on load pin is too low, IC will stop the SR gate drives. FREQ (Operating frequency) This pin provides a precise 2V reference and a resistor RFMIN connected from this pin to GND, which defines a current that is used to determin the minimum operating frequency. In order to regulate the converter output voltage by changing the operating frequency, the phototransistor of an optocoupler is connected to this pin through resistor RREG. Delay (Advance delay time setting) For SR purpose, the delay time between primary side switch’s gate off signal and secondary side SR switch’s gate off signal can be adjusted by a resistor Rdelay connected to Delay pin. TD (Primary dead time setting) In order to provide the design flexbility, the dead time between two primary switches can be adjusted by external resistor RTD1 connected from Vref pin to TD pin. The TD pin voltage is regulated at 2V. The current flow into this pin determines the dead time, which ranges from 100ns to 1000ns. Vmc (Voltage levels for entering and leaving missing cycle mdoe) The voltages on this pin is used to setting the levels, on CL pin, which IC enters missing cycle operation mode or leaves missing cycle mode. Internally, a current source from internal power supply to this pin is provided which will generate the hysteresis voltage between entering and leaving missing cycle voltages. Vref (Reference voltage ouput) This pin is the output of refernce voltage, which is tight regulated at 5V. This reference voltage supplies the bias current for dead time setting, and also setting of resonant voltage, missing cylce voltages. Vres (resonant voltage setting) The voltage on this pin is used for determination the operation mode of the half-bridge LLC resonant converter, CCM or DCM. There is no turn-on delay between secondary and primary gate signals if the converter is in DCM mode. If the converter is in CCM mode, IC will add the turn-on delay when the Vres voltage is lower than VINS pin voltage. VINS (mains input voltage sense) Version 2.1 7 24 May 2011 High Performance Resonant Mode Controller ICE2HS01G Pin Configuration and Functionality The mains input voltage is fed to this pin via a resistive voltage divider. If the voltage on VINS pin is higher than the threshold VINSON, IC will start to operate with softstart when VCC increases beyond turn on threshold. During operation, if the voltage on this pin falls below the threshold VINSON, IC will stop switching until the voltage on this pin increases again. CS (current sense) The current sense signal is fed to this pin. Inside the IC, three comparators are provided for 3 level OCP function. If the voltage on CS pin is higher than the first threshold, IC will increase the switching frequency to limit the maximum output power of the converter. If the voltage on this pin exceeds the second threshold, IC will further increase the switching frequency to a higher value with higher frequency rising slope. If the voltage on this pin exceeds the third threshold, IC will be latched off immediately. A second function of CS pin is to sense the output power level. If CS voltage is lower than some preset value on Vmc pin, IC will enter the missing cycle mode to improve the converter efficiency. Protection function is also integrated on this pin for synchoronous rectification. IC will stop the SR gate drives if the CS votlage is too high or it drops too fast. CL (current sense average level) A resistor RCL is connected between CL pin and SRD pin. This resistor determines how much the synchrnous rectifcation on duration is changed according to load condition. Internally, CL pin voltage is proportional to the CS pin voltage. A clamp circuit set the maximum voltage of 1.95V on CL pin. A capacitor is recommended to be put between this pin and ground. This can filter out the high ripple component on CS voltage and therefore decrease the variation of SR dirves’ on time versus output load. SRD (SR Disable input) This pin is used to disable SR function, by pulling down SR pin to zero, in case of softstart, hold up time, OCP or any other conditions specified by customers. A limited current source is built internally which generates a constant 2V voltage on SR pin. The current, depending on the external resistors RSRD, and also RCL and VCL if connected, is used to charge the internal capacitor. Therefore, the on time of secondary gate drives can be set by choosing different RSRD during design or different RCL which sets the dependence of the current on the current sense voltage. GND (ground) IC common ground. SLG (Low side SR gate drive) This pin delivers gate drive signal for low side synchornous rectification switch. SHG (High side SR gate drive) This pin delivers gate drive signal for high side synchronous rectification switch. LG (low side gate drive) This pin delivers gate drive signal for primary low side switch. HG (high-side gate drive) This pin delivers gate drive signal for primary high side switch. VCC (IC power supply) Supply voltage of the IC. Version 2.1 8 24 May 2011 High Performance Resonant Mode Controller ICE2HS01G Representative Block Diagram 2 Representative Block Diagram Figure 3 Version 2.1 Representative Block Diagram 9 24 May 2011 High Performance Resonant Mode Controller ICE2HS01G Functional description Functional description1) 3 The controller ICE2HS01G, a 20-pin IC, is designed for pulse-frequency-modulated resonant converters, especially halfbridge LLC resonant converter. It operates with 50% duty cylce for two primary gate drives and 180 o out of phase. The regulation of output voltage is achieved through adjustment of the switching frequency. To ensure the zero-voltage-switching and safe operation in half-bridge topologies, the dead time between primary high side switch and low side switch is set independently to the switching frequency and also with high accuracy. In half-bridge LLC resonant converetr, as there is only one voltage control loop, current information in the LLC converter is used for proetctions. The current loop is designed to be much more faster compared to voltage loop and therefore providing a reliable protection for the converter. As synchronous rectification (SR) is a necessary measure to achieve high efficiency, ICE2HS01G features two driving signal for secondary SR switches. In order to ensure SR safe and proper operation, both the delay time between primary side switch and secondary SR switch and the duration of secondary SR switches can be programmed with external resistors. ICE2HS01G also offers multiple protections which ease the design of a reliable and high efficiency half-bridge LLC resonant converter. 3.1 IC power supply The controller ICE2HS01G is targetting at applications with auxiliary power supply. In most cases, a front-end PFC pre-regulator with a PFC controller is used in the same system. The controller ICE2HS01G starts to operate when the supply voltage VVCC reaches the on-threshold, VVCCon of 12V. The minimum operating voltage after turn-on, VVCCoff, is at 11V. The maximum supply voltage VVCCmax is 18V. 3.2 Oscillator The pulse-frequency-modulation is built with current controlled oscillators. The period of charging capacitor C OSC determines the on time of primary switches. The period for charging capacitor C TD determines the dead time between two primary swithes. The simplified oscillator circuit is shown in Figure 4. The typical switching waveforms of C OSC and CTD are shown in Figure 5. Figure 4 1) Simplified oscillator circuit All values which are used in the functional description are typical values. For calculating the worst cases the min/max values, which can be found in section 4 Electrical Characteristics, have to be considered. Version 2.1 10 24 May 2011 High Performance Resonant Mode Controller ICE2HS01G Functional description Assume the current flows output from FREQ pin and TD pin are IFREQ and ITD, respectively, the switching frequency during normal operation can be obtained according to equation [1]. 0.5 F S = --------------------------------------------------------------V OS CF × C F V OS CT × C TD -------------------------- + -----------------------------k F × I FREQ k TD × ITD [1] According to the typical application circuit shown in Figure 1, the minimum operating frequency of the converter can be set by choosing RFMIN. Assume the dead time is 300ns, the minimum switching frequency is 50kHz when the R FMIN is 30kW. The minimum operating frequency versus various RFMIN is shown in Figure 6. Figure 5 Oscillator waveforms 290 270 RFREQ(kΩ) 6.2 9.1 13 15 18 22 24 27 30 33 36 39 43 47 51 250 230 210 Fmin(kHz) 190 170 150 130 110 90 70 F(kHz) 215 153 111 97 82 67 62 55 50 46 42 39 35 33 30 50 30 10 0 5 10 15 20 25 30 35 40 45 50 Rfm in(kΩ ) Figure 6 Minimum switching frequency versus RFMIN with TD=300ns As shown in Figure 1, the regulation of output voltage is achieved by controlling the current flowing into collector of the opto-coupler. The maximum current flowing through the capacitor is achieved when the collector is pulled to ground. The equivalent resistance at FREQ pin, the resistor Rreg, together with RFMIN, determines the maximum Version 2.1 11 24 May 2011 High Performance Resonant Mode Controller ICE2HS01G Functional description switching frequency during load and line regulation. The actual switching frequency of the converter can also be checked from Figure 6 by using the equivalent resistance at FREQ pin. 3.3 Dead time As shown in Figure 4, the dead time can be adjusted by changing the current flowing into TD pin. There is a 5V reference voltage provided on Vref pin. By connecting a resistor RTD from Vref pin to TD pin, the current can be set. The dead time is longer if the resistance is larger and vice versa. A typical value of 300ns dead time can be achieved by setting RTD=180kW. The relationship between RTD and dead time is shown in Figure 7. Furthermore, a minimum dead time limitation, 135ns, is built inside the IC for protection. 1000 900 800 700 Td(ns) 600 RTD(kΩ) 100 150 180 220 270 300 330 360 390 500 400 300 200 100 TD(ns) 180 255 300 360 435 480 525 570 615 0 0 50 100 150 200 250 300 350 400 450 500 550 600 650 Rtd(kΩ ) Figure 7 3.4 Dead time versus RTD Softstart Soft start is implemented by sweeping the operating frequency from an initial high value until the control loop takes over. This initial switching frequency should be high enough so that the resonant current at first pulse can be limited within the desired value. The internal block diagram for softstart funciton block is shown in Figure 8. Initially, capacitor C OCP is fully discharged by IC internal switch, so that ROCP is effectively in parallel to RFMIN and the resulting parallel resistance determines the initial frequency. During start up, CSS is continuously charged until its voltage reaches the internal 2V reference voltage, and accordingly the current through ROCP drops to zero. Before this time, the LLC output voltage will have rise up to a level close to the regulated value and the feedback loop takes over, so that it will be the current through phototransistor to determine the operating frequency. To ensure a smooth rise of output voltage during start up, different internal current will be used to charge up the softstart capacitor CSS. At the moment softstart block is enabled, all three current sources I SS1 through ISS3 will turned on. Therefore, the charge current at this moment will be the sum of these three current plus the current flows from FREQ pin, through ROCP, to CSS. When the voltage VCSS is higher than VSS1 (1.5V), current source ISSa (150mA) is turned off. When CSS is charged to higher than VSS2 (1.8V), the second current source ISSb (50mA) is Version 2.1 12 24 May 2011 High Performance Resonant Mode Controller ICE2HS01G Functional description turned off. The last threshold VSS3 is 1.9V and the third current source ISSc (50mA) is turned off after VCSS is higher than VSS3. Figure 8 soft start block In some case the frequency set by ROCP is not high enough for softstart, additional series resistor and capactior can be connected to FREQ pin for further increment the soft start frequency. During soft start, the overload protection is disabled After VSS is higher than VSS3 for 10 ms, softstart block will enable overload protection function and IC will monitor the voltage on LOAD pin to detect any open-loop/over-load conditions. However, the IC will enable the overload protection after 40ms of softstart if SS pin voltage never goes higher than Vss3. 3.5 Current sense and over-current protection Current sense in LLC half bridge converters is mainly for protection. The circuit is shown in Figure 9. The controller ICE2HS01G incooperates three-level over current protection. In case of over-load condition, the lower level OCP will be triggerred, the switching frequency will be increased according to the duration and power of the over load. The higher level OCP (1.6V) is used to protect the converter if transformer is saturated. the IC will be latched after a 220ns blanking time. If the sensed VCS is higher than 0.8V, SS pin capacitor will be discharged by an internal discharge resistor R dischg1. This will result in higher switching frequency and less delivered power to secondary side. If sensed VCS is higher than 0.9V (the 2nd level), another discharge resistor Rdischg2 is also used to discharge the capacitor CSS.The CSS will be discharged faster which means the switching frequency increases faster. This is to limit the fastly increasing resonant current. This is useful if the system encounter some steep load change at the output side during dynamics. Both discharge resistors are turned off if the current sense voltage falls belower than 0.75V. Figure 9 Version 2.1 Current sense and over-current protection block 13 24 May 2011 High Performance Resonant Mode Controller ICE2HS01G Functional description 3.6 Light load operation The switching frequency of a half-bridge LLC resonant converter can be very high at no load or light load operations. High switching frequency results in higher switching loss and magnetized core loss. In most cases, reduction of the switching frequency will result in efficiency increase, which highly depends on the balance between switching losses and conduction losses in the converter. ICE2HS01G offers various options of light load operation to meet the different requirements in applications. These including Missing Cycle mode in light load and Burst Mode in no load. In addition, both modes can be enabled/ disabled with parameter selctions. For detailed operation of light load, the block diagram is shown in Figure 10. Figure 10 Light load control module If the current sense voltage is lower than the preset reference level on Vmc pin for 20ms, IC enters into a Missing Cylce (MC) mode, where every two out of five switches are removed to reduce the average switching frequency. Vref pin is the output of internal reference voltage, which is an accurate 5V voltage source, with up to 2 mA. A typical output gate drive waveforms in MC mode is shown in Figure 11. Figure 11 ICE2HS01G gate outpus during Missing Cycle The entering and leaving missing cycle level can be adjusted through connecting different resistors to V mc pin. The actual values can be calculated from equations [2] and [3]. The current source Imc is 50mA built inside with high accuracy. For example, with Rmc1=33kW and Rmc2=1.3kW, the current sense voltage for entering and leaving missing cylce mode can be calculated to be 0.19V and 0.252V. R mc2 V LMC = V ref × ----------------------------R m c1 + R mc2 [2] R mc2 R m c1 × R mc2 VEMC = V ref × ----------------------------- + I mc × ----------------------------R mc1 + R mc2 R mc1 + R mc 2 [3] Version 2.1 14 24 May 2011 High Performance Resonant Mode Controller ICE2HS01G Functional description The Missing Cycle mode can be disabled by pulling down Vmc pin to ground. In this case, even very low voltage on CS pin will let the IC works in normal mode. It is recommended to use a 10k resistor for pulling down purpose. The Burst Mode (BM) operation in ICE2HS01G is implemented with LOAD pin voltage. If the voltage on LOAD pin is lower than 0.1V, all the gate drives will be pulled low after the next high side switch cycle is finished. If the LOAD pin voltage increases higher than 0.15V, IC will resume switch. Every time IC resumes switch from burst mode, the first pulse will be high gate with reduced duty cycle. In certain conditions, Burst Mode opeation is not wanted and can be disabled. The method will be described in Section 3.10. 3.7 Synchronous Rectification Synchronous Rectification (SR) in a half-bridge LLC resonant converter is the key to achieve very high efficiency, and this is the major benefits from the patent pending method integrated in ICE2HS01G. The control of Synchronous Rectification in ICE2HS01G have four main parts: On time control, turn-on delay, turn-off delay and protections, with the block diagram shown in Figure 12. Figure 12 Synchronous rectification control block diagram 3.7.1 SR On time control The oscillator of SR control, with divide-by-two function, determines the on time of both SR gates. It uses regulated current to charge the capacitor, while the current is proportional to current flowing out of SRD pin and the capacitor is fixed inside the IC. The SRD pin is regulated to 2V. On time of SR gates can then be programmed by regulating the equivalent resistance connected to SRD pin. In typical conditions, a 5ms SR on time is set when the equivalent resistance from SRD pin to ground is 62kW. The typical relation between SRD resistance and the corresponding SR on time can be found in Figure 13. The internal circuit of SRD pin is designed with certain limit of maximum current flowing out. The minimum resistor, or equivalent resistance to SRD pin, can not be less than 15kW. A simple constant on time control does not provide the best performance of LLC HB converter. In fact, the actual resonant period of secondary current reduces when the output load decreases or input voltage increases. The primary winding current can reflects this change. Certain current sense circuit can be used to get such information and input to ICE2HS01G on CS pin. In ICE2HS01G, a function called current level (CL) pin is implemented. During heavy load and low input voltage, the CL pin voltage is clamped at same voltage of SRD pin. Therefore, the SR on time in such conditions is determined by R SRD only. In case of light load, with low CS voltage, the CL pin voltage is reduced and therefore the actual SR on time is reduced Version 2.1 15 24 May 2011 High Performance Resonant Mode Controller ICE2HS01G Functional description as well. The resistor RCL can be adjusted to find the suitable reducing speed of SR on time. The relationship between CS voltage and CL voltage is shwon in Figure 14. 7.5 7.0 6.5 6.0 Ton(μs) 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 30 40 50 60 70 80 90 Rsrd(kΩ) Figure 13 SR on time versus SRD resistance Figure 14 Relationship between VCS and VCL 3.7.2 Turn-on delay When the input voltage is too high, the LLC converter secondary switches are working in CCM condition. Certain recovery time of the MOSFET body diode is required depending on the turn-off current. For better performance, the other MOSFET should be turned on after the recovery phase. The turn-on delay function is built in ICE2HS01G for such purpose. When the VINS pin voltage is higher than Vres pin, the SR MOSFETs are turned on 250ns after the corresponding primary MOSFETs are turned on. 3.7.3 Turn-off delay The SR on time control determines the conduction time for secondary switches and the duration is actually link to resonant parameters and output load. However, the SR on time can not be longer than the primary gate signals, which otherwise will cause damage to the system. Therefore, SR gate will be turned off by two conditions: the primary gate signal or the SR on time oscillator, the one comes first will determine the actual SR duation. However, the delay from IC gate signal to secondary SR switches can be longer than those delay to primary SR swithes. The function turn-off delay is used to adjust this difference. Instead of using the primary gate signal (PHG/PLG) to turn off SR gate, a signal with certain advance time to primary gate signal is used to generate SR gate off signal. And this certain advance time is adjustable through delay pin resistor. Version 2.1 16 24 May 2011 High Performance Resonant Mode Controller ICE2HS01G Functional description IC delay pin is regulated at a constant voltage, the current, depending on external resistor only, is used to calculate this turnoff delay. The turn-off delay is 330ns when Rdelay is 51kW. In addition, the relationship of turn-off delay time and delay resistance is shown in Figure 15. 0.7 0.6 Tdelay(μs) 0.5 0.4 0.3 0.2 0.1 0.0 10 20 30 40 50 60 70 80 90 100 110 Rdelay(kΩ) Figure 15 Relationship between Rdelay and Tdelay 3.7.4 SR protections As the SR control in ICE2HS01G is realized with indirect method, there are some cases that the SR can not work properly. In this cases, the SR gate drive will be disabled. Once the condition is over, IC will restart the SR with SRSoftstart. During softstart, the SR is disabled. When the softstart pin voltage is higher than 1.9V for 20ms, SR will be enabled with SRSoftstart. When LOAD pin voltage is lower than 0.2V, IC will disable the SR immediately. If LOAD pin voltage is higher than 0.7V, IC will resume SR with SRSoftstart. During over-current protection phase, if the softstart pin voltage is lower than 1.8V, SR will be disabled. The SR will resume with softstart 10ms after SS pin voltage is higher than 1.9V again. In over-current protection, if the CS pin voltage is higher than 0.9V, SR is disabled. SR will be enabled with SRSoftstart after CS pin voltage is lower than 0.6V. All the above four conditions are built inside the IC. If IC detects such a condition, IC will disable SR and pull down the voltage on SRD pin to zero. When the CS voltage suddenly drops from 0.55V to below 0.30V within 1ms, the SR gate is turned off for 1ms, after 1ms, SR operation is enabled again with SRsoftstart. An addition option is also provided. If some fault conditions are not reflected on the four conditions mentioned above but can be detected outside with other measures, the SR can also be disabled and enabled with softstart from outside. This is implemented on SRD pin as well. The internal SRD reference voltage has limited current source capability. If a transistor QSRD is connected as shown in typical application circuit, the voltage on SRD pin can be pulled to zero if this transistor is turned on, which will stop the SR. If the SRD voltage is released and increases above 1.75V, SR is enabled with softstart. 3.7.5 SR softstart The SR operaton is enabled after the output voltage has been built up. However, as the SR MOSFET drain-source voltage drop is much lower than the forward voltage drop of the body diodes or the schottky diodes, the output power of the converter will increase a lot if the SR MOSFETs are started with full duty. In ICE2HS01G, SR operation will start with small duty. The SR MOSFET will start with its own softstart, the duty cycle for first pulse is around one-tenth of its normal duty, which will be kept same for 16 consective switching cycles. Then, the duty is increased gradually step by step to the full duty. Total 7 steps are built for the softstart and each step includes 16 switching cycles. Therefore, after 128 switching cycles, the SR duty will reach its normal value. Version 2.1 17 24 May 2011 High Performance Resonant Mode Controller ICE2HS01G Functional description 3.8 Mains Input Voltage Sense The operation range of mains input voltage needs to be specified for LLC resonant converter. In addition, the input voltage information is used to determines whether the SR turned on delay is added or not. The typical circuit of mains input voltage sense and process is shown Figure 16. Figure 16 Mains input voltage sense With the current source Ihys connected between VINS and Ground, an adjustable hysteresis between the on and off input voltage can be created as V HYS = R INSH × I hys [4] The mains input voltage is divided by RINS1 and RINS2. A current source Ihys is connected from VINS pin to ground in the IC. If the on and off threshold for mains voltage is Vmainon and Vmainoff, the resistors can be decided as V mainon – V mainoff R INSH = ------------------------------------------I hys [5] V INSON R INSL = R INSH × -----------------------------------------V ma inoff – V INSON [6] The blanking time for leaving brown-out is around 450ms and for entering brown-out is around 47ms. For example, if RINS1=6.2MW and RINS2=27kW, the turn-on bus voltage is 350V and the turn-off bus voltage is 288V. 3.9 Over load protection In the typical application circuit, a voltage divider with RFT1 and RFT2, is connected to the collector of optocoupler, and this divided voltage is delivered to LOAD pin. This is used to determine the feedback voltage threshold for over load protection. During operation, if VLOAD > 1.8V, and this condition last longer than an adjustable blanking time of TOLP, the IC will immediately stop delivering all the driving signals, and only after an adjustable restart time Trestart , IC will restart with soft start. This allows the system to face a sudden power surge for a short period of time without triggering the protection. The Timer pin is used to set the blanking time TOLP and restart time Trestart for over load protection. The RC parallel circuit, CT and RT, is connected to this pin. When the voltage on load pin is higher than V load, an internal current source of IBL starts charging the external capacitor CT. This current source turns off only when the capacitor voltage, VTL reaches VTLH or when VLOAD decreases below 1.8V. Once VTL exceeds 4.0V, the overload/openloop protection is triggered by turning off the GATE signal. From this time, CT slowly discharges through the external resistance RT. When VT drops below 0.5V, the IC restarts its operation with soft-start. The charging time and the Version 2.1 18 24 May 2011 High Performance Resonant Mode Controller ICE2HS01G Functional description discharging time of the capacitor CT determine respectively the open load/over loop protection blanking time TOLP and the restart time Trestart of the IC. The circuit about how this protection works is shown in following Figure 17. Figure 17 Over-Load protection scheme The OLP blanking time can be calculated as V TH T OLP = 20ms – RT × C T × ln æè 1 – ------------------öø R T × I BL [7] The restart time can be calculated as V TLö T R estart = – R T × C T × ln æ --------è V TH-ø 3.10 [8] EnA pin In addition, this IC provides an external enable/disable function. Internal current source, IEnA, is used to built up the voltage on EnA pin. During operation, if the voltage on this pin is reduced below 1.0V, IC will stop switch. Recycling the IC VCC supply can reset this protection. This pin can used for external latch enable function. It can also be used for over-temperature protection with latch off protection. The block diagram of Ena function is shown in Figure 18. Figure 18 Latch-off enable function block diagram and burst mode selection In addition to the latch-off enable function, this pin is also built for the selection of burst mode enable or not during softstart. If the burst mode is enabled, the gate drives will be disabled if LOAD pin voltage falls below some threshold. However, if burst mode is not selected, the gate drives will not be stopped by LOAD pin voltage. The selection block works only after the first time IC VCC increases above UVLO. After CVCC is higher than turn on threshod, a current source Isele, in addition to the IEnA, is turned on to charge the capacitor CEnA. After 26ms, IC will compare the voltage on EnA pin and 1.0V, if voltage on EnA pin is higher than 1.0V, the burst mode function will be enabled. As the voltage on EnA pin depends on REnA and CEnA, by selection of different capacitance can select whether this IC works with burst mode. After the selection is done, the current source Isele is turned off. An blanking time of 320ms is given before IC starts to sense the EnA pin voltage latch off enable purpose. This blanking time is used to let the EnA pin votlage be stablized to avoid mistriggering of Latch-off Enable function. Version 2.1 19 24 May 2011 High Performance Resonant Mode Controller ICE2HS01G Electrical Characteristics 4 Note: 4.1 Note: Electrical Characteristics All voltages are measured with respect to ground (Pin 13). The voltage levels are valid if other ratings are not violated. Absolute Maximum Ratings Absolute maximum ratings are defined as ratings, which when being exceeded may lead to destruction of the integrated circuit. For the same reason make sure, that any capacitor that will be connected to pin 16 (VCC) is discharged before assembling the application circuit. Parameter Symbol Limit Values min. max. Unit VCC Supply Voltage VVCC -0.3 18 V VHG Voltage VHG -0.3 18 V VLG Voltage VLG -0.3 18 V VSHG Voltage VSHG -0.3 18 V VSLG Voltage VSLG -0.3 18 V Timer Voltage VTIMER -0.3 Vdd+0.3 V EnA Voltage VEnA -0.3 Vdd+0.3 V SS Voltage VSS -0.3 Vdd+0.3 V LOAD Voltage VLOAD -0.3 Vdd+0.3 V FREQ Voltage VFREQ -0.3 Vdd+0.3 V FREQ Current IFREQ 0 3.5 mA TD Voltage VTD -0.3 Vdd+0.3 V TD Current ITD -200 0 mA Delay Voltage VDelay -0.3 Vdd+0.3 V Delay Current IDelay -200 0 mA Vref Voltage VVR -0.3 Vdd+0.3 V Vref Current IVR 0 3 mA Vmc Voltage VMC -0.3 Vdd+0.3 V Vres Voltage VMC -0.3 Vdd+0.3 V VINS Voltage VVINS -0.3 Vdd+0.3 V CS Voltage VCS -0.3 Vdd+0.3 V CL Voltage VCL -0.3 Vdd+0.3 V CL Current ICL -10 2 mA SRD Voltage VSRD -0.3 Vdd+0.3 V SRD Current ISRD 0 2.5 mA Junction Temperature Tj -40 125 °C Storage Temperature TS -55 150 °C Version 2.1 20 Remarks 24 May 2011 High Performance Resonant Mode Controller ICE2HS01G Electrical Characteristics Thermal Resistance Junction-Ambient for PG-DSO-8 RthJA(DSO) ESD Capability VESD 1) - 75 K/W PG-DSO-20 - 2 kV Human body model1) According to EIA/JESD22-A114-B (discharging a 100pF capacitor through a 1.5kW series resistor) 4.2 Note: Operating Range Within the operating range the IC operates as described in the functional description. Parameter Symbol Limit Values min. max. Unit VCC Supply Voltage VVCC VVCCOff 18 V Junction Temperature TjCon -25 125 °C Version 2.1 21 Remarks 24 May 2011 High Performance Resonant Mode Controller ICE2HS01G Electrical Characteristics 4.3 4.3.1 Note: Characteristics Supply Section The electrical characteristics involve the spread of values guaranteed within the specified supply voltage and junction temperature range TJ from – 25 oC to 125oC. Typical values represent the median values, which are related to 25°C. If not otherwise stated, a supply voltage of V CC = 15 V is assumed. Parameter Symbol Limit Values min. typ. Unit Test Condition mA VVCCon-0.1V mA no switching; mA Freq=97kHz RFREQ=15kW RTD=180kW VVCC=15V VCS>Vmc max. 930 Start up Current IVCCstart Supply Current in operation with inactive gate IVCCop Supply Current in normal operation with active gate IVCCactive VCC Turn-On Threshold VVCCon 11.3 12 12.7 V VCC Hysteresis VVCChys 0.6 1 1.3 V VCC Turn-Off Threshold VVCCoff - VVCCon VVCChys - V Trimmed Reference Voltage Vdd 4.90 5.0 5.10 V Version 2.1 8 7.5 22 Guaranteed by design 24 May 2011 High Performance Resonant Mode Controller ICE2HS01G Electrical Characteristics 4.3.2 Oscillator Section Parameter Symbol Limit Values min. typ. max. Unit Test Condition Minimum switching frequency FMIN 48.25 50 51.75 kHz RFMIN=30kW; RTD=180kW; VSS=2V Maximum switching frequency FMAX 205 215 225 kHz RFMIN_EQ=6.2kW; RTD=180kW; VSS=2V Recommend Maximum switching frequency FMAX_abs 1000 kHz RFMIN_EQ=1.1kW; RTD=62kW; VSS=2V Reference voltage on FREQ VFREQ 2 V Reference voltage on TD VTD 2 V Dead time Td 260 Minimum dead time TD_MIN 115 Dead time 1 TD_MAX1 Dead time 2 TD_MAX2 Oscillation duty cycle D First pulse half duty 4.3.3 300 48 330 ns RTD=180kW ns RTD=62kW 870 ns RTD=560kW 1.5 ms RTD=1200kW % based on calculation % First pulse on high side gate at softstart or leaving burst mode or at miss cycle mode Unit Test Condition 50 52 25 DFISRT Input voltage sense Parameter Symbol Limit Values min. typ. max. Input voltage on threshold VVINSon 1.2 1.25 1.3 V Bias current on VINS pin Ihys 8 10 12 mA Blankint time for leaving mains undervoltage protection TVINS_out 450 ms Blanking time for entering mains under voltage protection TVINS_in 47 ms Offset for comparator between VINS pin and Vres pin Version 2.1 -18 0 23 18 mV 24 May 2011 High Performance Resonant Mode Controller ICE2HS01G Electrical Characteristics 4.3.4 Current sense and current level Parameter Symbol Limit Values min. Overcurrent protection 1st typ. VCSL Hysteresis voltage for overcurrent protection low Unit Test Condition max. 0.82 V 45 mV Overcurrent protection 2nd VCSM 0.925 V Overcurrent protection 3rd VCSH 1.63 V Blanking time for OCP latch TOCP_L 340 ns CL pin clamped voltage VCL_C Ratio between CL pin and CS pin voltage RCL_CS 4.8 CL pin maximum source current, output rising IOUTCSL 1.1 mA VCL=0V, VCS 0V -> 0.6V step change CL pin maximum sink current, output falling IINCSL 6 mA VCL=1.8V, VCS 0.6V -> 0V step change Unit Test Condition 4.3.5 1.89 1.95 2.01 V VCS=0.6V Vcs=0.35V Soft start Parameter Symbol Limit Values min. typ. max. Softstart current 1 ISS1 260 mA VSS=1V Softstart current 2 ISS2 105 mA VSS=1.6V Softstart current 3 ISS2 52.5 mA VSS=1.9V Voltage threshold 1 VSS1 1.515 V Voltage threshold 2 VSS2 1.815 V Voltage threshold 3 VSS3 1.91 V Maximum softstart time TSS_MAX 32 40 48 ms Normal softstart time TSS_nom 8 10 12 ms Discharge resistance 1 RSS_dchga 180 W Discharge resistance 2 RSS_dchgb 100 W 4.3.6 After VSS is higher than 1.9V Light load operation Parameter Symbol Comparator offset for Vmc pin Internal current for hysteresis IMC Entering missing cycle mode blanking time TBL_EM Version 2.1 Limit Values Unit min. typ. max. -25 0 25 mV 40 50 60 mA 20 24 ms Test Condition Test after VCS<VMC 24 May 2011 High Performance Resonant Mode Controller ICE2HS01G Electrical Characteristics Entering burst mode threshold VEB Hysteresis for entering/leaving burst mode VB_Hys 4.3.7 0.07 0.12 50 V mV Reference Voltage Parameter Symbol Limit Values min. Reference voltage of Vref pin Vref Current capability of Vref pin Iref_max 4.3.8 0.17 typ. Unit max. 5 V 2 mA guaranteed by design 1.86 V VLOAD voltage follows the VFREQ voltage Over load/Open loop protection 1.73 1.795 Feedback voltage for open loop/ over load protection VLOAD Fixed over-load blanking time TOLP 20 ms Threshold for adjustable over load blanking time VTH 4.015 V Threshold for adjustable restart time VTL 0.525 V Current for adjustable over load blanking teim IBL 16 20 24 mA Current on EnA pin in normal operation IEnA 94 100 106 mA Current on EnA pin for burst mode selection Isele 80 100 120 mA Charing time for burst mode selection Tsele1 19 26 33 ms Threshold for Latch-off Enable VEnA 0.95 1.0 1.05 V Delay for Latch-off Enable TDEnA 4.3.9 Test Condition Enable function Version 2.1 5 25 ms - guaranteed by design 24 May 2011 High Performance Resonant Mode Controller ICE2HS01G Electrical Characteristics 4.3.10 Synchronous rectification Parameter Symbol Limit Values min. typ. Unit Test Condition max. Reference voltage on SRD VSRD 2 SR on time setting TSRD 4.875 5 5.125 ms RSRD=62kW, with typical gate load of 300pf Rising edge delay between primary and secondary drive TD_ON 225 250 275 ns VVINS>VRES Reference voltage on Delay pin VDelay Minimum Falling edge delay between primary and secondary drive TD_OFF 270 330 390 ns SRD voltage to stop SR externally VSRD_Dis 1.7 1.75 1.8 V SR disable blanking time TSRD_Dis SRD voltage when SR is disabled internally VSRD_Stop LOAD voltage to stop SR VLOAD_SRD 0.18 LOAD voltage to restart SR VLOAD_SRR CS voltage to stop SR VCS_SRD V 1.785 V 775 ns 0.2 V 0.22 0.26 V 0.67 0.715 0.76 V 0.875 0.925 0.975 V 220 Blanking time of CS pin 0.9V comparator 0.575 0.625 0.675 VCS_SRR CS voltage to start dynamic load detector VCS_DD1 0.55 V CS voltage to set dynamic load protection VCS_DD2 0.3 V SS voltage to stop SR VSS_SRD 1.765 1.815 1.865 V Hysteresis on SS voltage to restart SR VSS_SR_Hys 0.06 0.1 0.14 V 8 10 12 ms SR softstart first time on time Version 2.1 VCS_SRD and VCS_SRR follows each other 8 SR softstart steps Difference between CL clamped voltage and SRD pin reference voltage VCS_SRD and VCS_SRR follows each other ns CS voltage to restart SR Blanking time for restart SR if VSS>1.9V RDelay=51kW, RFREQEQ=15kW VSRD-VCL_C 1.2 1.49 1.8 ms RSRD=62kW 0 45 90 mv VCS=0.6V 26 24 May 2011 High Performance Resonant Mode Controller ICE2HS01G Electrical Characteristics 4.3.11 Primary gate drive (HG, LG) Parameter Symbol Limit Values min. typ. max. 1.5 Unit Test Condition V VVCC=5V IOUT = 5mA Output voltage at logic low VGATElow - Output voltage at logic high VGATEhigh 10.5 V IOUT = -5mA 9.8 V VVCC=VVCCoff+0.2V CL=0.3nF Rise Time trise - 25 - ns CL = 0.3nF Fall Time tfall - 25 - ns CL = 0.3nF Unit Test Condition V VVCC=5V IOUT = 5mA 4.3.12 Secondary gate drive (SHG, SLG) Parameter Symbol Limit Values min. typ. max. 1.5 Output voltage at logic low VGATElow - Output voltage at logic high VGATEhigh 10.5 V IOUT = -5mA 9.8 V VVCC=VVCCoff+0.2V CL=0.3nF Rise Time trise - 25 - ns CL = 0.3nF Fall Time tfall - 25 - ns CL = 0.3nF Version 2.1 27 24 May 2011 High Performance Resonant Mode Controller ICE2HS01G Outline Dimension 5 Outline Dimension PG-DSO-20 ( Plastic Dual Small Outline) Figure 19 PG-DSO-20 *Dimensions in mm Version 2.1 28 24 May 2011 Total Quality Management Qualität hat für uns eine umfassende Bedeutung. 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