MX29LV640B T/B FEATURES 64M-BIT [8M x 8/4M x 16] SINGLE VOLTAGE 3V ONLY FLASH MEMORY GENERAL FEATURES • 8,388,608 x 8 / 4,194,304 x 16 switchable • Sector Structure - 8KB(4KW) x 8 and 64KB(32KW) x 127 • Extra 128-word sector for security - Features factory locked and identifiable, and customer lockable • Sector Groups Protection / Chip Unprotect - Provides sector group protect function to prevent program or erase operation in the protected sector group - Provides chip unprotect function to allow code changing - Provides temporary sector group unprotect function for code changing in previously protected sector groups • Single Power Supply Operation - 2.7 to 3.6 volt for read, erase, and program operations • Latch-up protected to 250mA from -1V to Vcc + 1V • Low Vcc write inhibit : Vcc <= 1.5V • Compatible with JEDEC standard - Pinout and software compatible to single power supply Flash PERFORMANCE • High Performance - Fast access time: 90/120ns - Fast program time: 11us/word (typical) - Fast erase time: 0.9s/sector, 45s/chip (typical) • Low Power Consumption - Low active read current: 9mA (typical) at 5MHz - Low standby current: 0.2uA (typical) • Minimum 100,000 erase/program cycle • 10 years data retention SOFTWARE FEATURES • Erase Suspend/ Erase Resume - Suspends sector erase operation to read data from or program data to another sector which is not being erased • Status Reply - Data# Polling & Toggle bits provide detection of program and erase operation completion • Support Common Flash Interface (CFI) HARDWARE FEATURES • Ready/Busy# (RY/BY#) Output - Provides a hardware method of detecting program and erase operation completion • Hardware Reset (RESET#) Input - Provides a hardware method to reset the internal state machine to read mode • WP#/ACC input pin - Provides accelerated program capability PACKAGE • 48-Pin TSOP • 63-Ball CSP • All Pb-free devices are RoHS Compliant • All non RoHS Compliant devices are not recommeded for new design in P/N:PM1076 REV. 1.8, FEB. 26, 2008 1 MX29LV640B T/B PIN CONFIGURATION 48 TSOP A15 A14 A13 A12 A11 A10 A9 A8 A19 A20 WE# RESET# A21 WP#/ACC RY/BY# A18 A17 A7 A6 A5 A4 A3 A2 A1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 MX29LV640B T/B A16 BYTE# GND Q15/A-1 Q7 Q14 Q6 Q13 Q5 Q12 Q4 VCC Q11 Q3 Q10 Q2 Q9 Q1 Q8 Q0 OE# GND CE# A0 63 Ball CSP (Top View, Ball Down) 12.0 mm 8 NC NC 7 NC NC A13 A12 A14 A15 A16 BYTE# Q15/ A-1 GND 6 A9 A8 A10 A11 Q7 Q14 Q13 Q6 5 WE# RESET# A21 A19 Q5 Q12 VCC Q4 4 RY/ BY# WP#/ ACC A18 A20 Q2 Q10 Q11 Q3 3 A7 A17 A6 A5 Q0 Q8 Q9 Q1 A3 A4 A2 A1 A0 CE# OE# GND NC* NC* NC* NC* 11.0 mm 2 NC* 1 NC* NC* A B C D E F G H J K NC* NC* NC* NC* L M * Ball are shorted together via the substrate but not connected to the die. P/N:PM1076 REV. 1.8, FEB. 26, 2008 2 MX29LV640B T/B PIN DESCRIPTION SYMBOL PIN NAME A0~A21 Address Input Q0~Q14 Data Inputs/Outputs Q15/A-1 Q15(Word Mode)/LSB addr(Byte Mode) CE# Chip Enable Input WE# Write Enable Input OE# Output Enable Input RESET# Hardware Reset Pin, Active Low LOGIC SYMBOL 22 A0-A21 CE# OE# WP#/ACC Hardware Write Protect/Programming Acceleration Input RY/BY# Read/Busy Output BYTE# Selects 8 bit or 16 bit mode VCC +3.0V single power supply GND Device Ground NC Pin Not Connected Internally 16 or 8 Q0-Q15 (A-1) WE# RY/BY# RESET# WP#/ACC BYTE# P/N:PM1076 REV. 1.8, FEB. 26, 2008 3 MX29LV640B T/B BLOCK DIAGRAM CE# OE# WE# RESET# BYTE# WP#/ACC WRITE CONTROL STATE INPUT LOGIC HIGH VOLTAGE MACHINE (WSM) LATCH BUFFER STATE FLASH REGISTER ARRAY ARRAY Y-DECODER AND X-DECODER ADDRESS A0-AM PROGRAM/ERASE Y-PASS GATE SOURCE HV COMMAND DATA DECODER SENSE AMPLIFIER PGM DATA HV COMMAND DATA LATCH PROGRAM DATA LATCH Q0-Q15/A-1 I/O BUFFER AM: MSB address P/N:PM1076 REV. 1.8, FEB. 26, 2008 4 MX29LV640B T/B Table 1. BLOCK STRUCTURE MX29LV640BT SECTOR GROUP ARCHITECTURE Sector Group 1 1 1 1 2 2 2 2 3 3 3 3 4 4 4 4 5 5 5 5 6 6 6 6 7 7 7 7 8 8 8 8 9 9 9 9 10 10 10 10 Sector Sector Address A21-A12 SA0 0000000xxx SA1 0000001xxx SA2 0000010xxx SA3 0000011xxx SA4 0000100xxx SA5 0000101xxx SA6 0000110xxx SA7 0000111xxx SA8 0001000xxx SA9 0001001xxx SA10 0001010xxx SA11 0001011xxx SA12 0001100xxx SA13 0001101xxx SA14 0001110xxx SA15 0001111xxx SA16 0010000xxx SA17 0010001xxx SA18 0010010xxx SA19 0010011xxx SA20 0010100xxx SA21 0010101xxx SA22 0010110xxx SA23 0010111xxx SA24 0011000xxx SA25 0011001xxx SA26 0011010xxx SA27 0011011xxx SA28 0011100xxx SA29 0011101xxx SA30 0011110xxx SA31 0011111xxx SA32 0100000xxx SA33 0100001xxx SA34 0100010xxx SA35 0100011xxx SA36 0100100xxx SA37 0100101xxx SA38 0100110xxx SA39 0100111xxx Sector Size (Kbytes/Kwords) 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 P/N:PM1076 (x8) Address Range 000000h-00FFFFh 010000h-01FFFFh 020000h-02FFFFh 030000h-03FFFFh 040000h-04FFFFh 050000h-05FFFFh 060000h-06FFFFh 070000h-07FFFFh 080000h-08FFFFh 090000h-09FFFFh 0A0000h-0AFFFFh 0B0000h-0BFFFFh 0C0000h-0CFFFFh 0D0000h-0DFFFFh 0E0000h-0EFFFFh 0F0000h-0FFFFFh 100000h-10FFFFh 110000h-11FFFFh 120000h-12FFFFh 130000h-13FFFFh 140000h-14FFFFh 150000h-15FFFFh 160000h-16FFFFh 170000h-17FFFFh 180000h-18FFFFh 190000h-19FFFFh 1A0000h-1AFFFFh 1B0000h-1BFFFFh 1C0000h-1CFFFFh 1D0000h-1DFFFFh 1E0000h-1EFFFFh 1F0000h-1FFFFFh 200000h-20FFFFh 210000h-21FFFFh 220000h-22FFFFh 230000h-23FFFFh 240000h-24FFFFh 250000h-25FFFFh 260000h-26FFFFh 270000h-27FFFFh (x16) Address Range 000000h-07FFFh 008000h-0FFFFh 010000h-17FFFh 018000h-01FFFFh 020000h-027FFFh 028000h-02FFFFh 030000h-037FFFh 038000h-03FFFFh 040000h-047FFFh 048000h-04FFFFh 050000h-057FFFh 058000h-05FFFFh 060000h-067FFFh 068000h-06FFFFh 070000h-077FFFh 078000h-07FFFFh 080000h-087FFFh 088000h-08FFFFh 090000h-097FFFh 098000h-09FFFFh 0A0000h-0A7FFFh 0A8000h-0AFFFFh 0B0000h-0B7FFFh 0B8000h-0BFFFFh 0C0000h-0C7FFFh 0C8000h-0CFFFFh 0D0000h-0D7FFFh 0D8000h-0DFFFFh 0E0000h-0E7FFFh 0E8000h-0EFFFFh 0F0000h-0F7FFFh 0F8000h-0FFFFFh 100000h-107FFFh 108000h-10FFFFh 110000h-117FFFh 118000h-11FFFFh 120000h-127FFFh 128000h-12FFFFh 130000h-137FFFh 138000h-13FFFFh REV. 1.8, FEB. 26, 2008 5 MX29LV640B T/B Sector Group 11 11 11 11 12 12 12 12 13 13 13 13 14 14 14 14 15 15 15 15 16 16 16 16 17 17 17 17 18 18 18 18 19 19 19 19 20 20 20 20 Sector Sector Address A21-A12 SA40 0101000xxx SA41 0101001xxx SA42 0101010xxx SA43 0101011xxx SA44 0101100xxx SA45 0101101xxx SA46 0101110xxx SA47 0101111xxx SA48 0110000xxx SA49 0110001xxx SA50 0110010xxx SA51 0110011xxx SA52 0110100xxx SA53 0110101xxx SA54 0110110xxx SA55 0110111xxx SA56 0111000xxx SA57 0111001xxx SA58 0111010xxx SA59 0111011xxx SA60 0111100xxx SA61 0111101xxx SA62 0111110xxx SA63 0111111xxx SA64 1000000xxx SA65 1000001xxx SA66 1000010xxx SA67 1000011xxx SA68 1000100xxx SA69 1000101xxx SA70 1000110xxx SA71 1000111xxx SA72 1001000xxx SA73 1001001xxx SA74 1001010xxx SA75 1001011xxx SA76 1001100xxx SA77 1001101xxx SA78 1001110xxx SA79 1001111xxx Sector Size (Kbytes/Kwords) 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 P/N:PM1076 (x8) Address Range 280000h-28FFFFh 290000h-29FFFFh 2A0000h-2AFFFFh 2B0000h-2BFFFFh 2C0000h-2CFFFFh 2D0000h-2DFFFFh 2E0000h-2EFFFFh 2F0000h-2FFFFFh 300000h-30FFFFh 310000h-31FFFFh 320000h-32FFFFh 330000h-33FFFFh 340000h-34FFFFh 350000h-35FFFFh 360000h-36FFFFh 370000h-37FFFFh 380000h-38FFFFh 390000h-39FFFFh 3A0000h-3AFFFFh 3B0000h-3BFFFFh 3C0000h-3CFFFFh 3D0000h-3DFFFFh 3E0000h-3EFFFFh 3F0000h-3FFFFFh 400000h-40FFFFh 410000h-41FFFFh 420000h-42FFFFh 430000h-43FFFFh 440000h-44FFFFh 450000h-45FFFFh 460000h-46FFFFh 470000h-47FFFFh 480000h-48FFFFh 490000h-49FFFFh 4A0000h-4AFFFFh 4B0000h-4BFFFFh 4C0000h-4CFFFFh 4D0000h-4DFFFFh 4E0000h-4EFFFFh 4F0000h-4FFFFFh (x16) Address Range 140000h-147FFFh 148000h-14FFFFh 150000h-157FFFh 158000h-15FFFFh 160000h-147FFFh 168000h-14FFFFh 170000h-177FFFh 178000h-17FFFFh 180000h-187FFFh 188000h-18FFFFh 190000h-197FFFh 198000h-19FFFFh 1A0000h-1A7FFFh 1A8000h-1AFFFFh 1B0000h-1B7FFFh 1B8000h-1BFFFFh 1C0000h-1C7FFFh 1C8000h-1CFFFFh 1D0000h-1D7FFFh 1D8000h-1DFFFFh 1E0000h-1E7FFFh 1E8000h-1EFFFFh 1F0000h-1F7FFFh 1F8000h-1FFFFFh 200000h-207FFFh 208000h-20FFFFh 210000h-217FFFh 218000h-21FFFFh 220000h-227FFFh 228000h-22FFFFh 230000h-237FFFh 238000h-23FFFFh 240000h-247FFFh 248000h-24FFFFh 250000h-257FFFh 258000h-25FFFFh 260000h-247FFFh 268000h-24FFFFh 270000h-277FFFh 278000h-27FFFFh REV. 1.8, FEB. 26, 2008 6 MX29LV640B T/B Sector Group 21 21 21 21 22 22 22 22 23 23 23 23 24 24 24 24 25 25 25 25 26 26 26 26 27 27 27 27 28 28 28 28 29 29 29 29 30 30 30 30 Sector Sector Address A21-A12 SA80 1010000xxx SA81 1010001xxx SA82 1010010xxx SA83 1010011xxx SA84 1010100xxx SA85 1010101xxx SA86 1010110xxx SA87 1010111xxx SA88 1011000xxx SA89 1011001xxx SA90 1011010xxx SA91 1011011xxx SA92 1011100xxx SA93 1011101xxx SA94 1011110xxx SA95 1011111xxx SA96 1100000xxx SA97 1100001xxx SA98 1100010xxx SA99 1100011xxx SA100 1100100xxx SA101 1100101xxx SA102 1100110xxx SA103 1100111xxx SA104 1101000xxx SA105 1101001xxx SA106 1101010xxx SA107 1101011xxx SA108 1101100xxx SA109 1101101xxx SA110 1101110xxx SA111 1101111xxx SA112 1110000xxx SA113 1110001xxx SA114 1110010xxx SA115 1110011xxx SA116 1110100xxx SA117 1110101xxx SA118 1110110xxx SA119 1110111xxx Sector Size (Kbytes/Kwords) 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 P/N:PM1076 (x8) Address Range 500000h-50FFFFh 510000h-51FFFFh 520000h-52FFFFh 530000h-53FFFFh 540000h-54FFFFh 550000h-55FFFFh 560000h-56FFFFh 570000h-57FFFFh 580000h-58FFFFh 590000h-59FFFFh 5A0000h-5AFFFFh 5B0000h-5BFFFFh 5C0000h-5CFFFFh 5D0000h-5DFFFFh 5E0000h-5EFFFFh 5F0000h-5FFFFFh 600000h-60FFFFh 610000h-61FFFFh 620000h-62FFFFh 630000h-63FFFFh 640000h-64FFFFh 650000h-65FFFFh 660000h-66FFFFh 670000h-67FFFFh 680000h-68FFFFh 690000h-69FFFFh 6A0000h-6AFFFFh 6B0000h-6BFFFFh 6C0000h-6CFFFFh 6D0000h-6DFFFFh 6E0000h-6EFFFFh 6F0000h-6FFFFFh 700000h-70FFFFh 710000h-71FFFFh 720000h-72FFFFh 730000h-73FFFFh 740000h-74FFFFh 750000h-75FFFFh 760000h-76FFFFh 770000h-77FFFFh (x16) Address Range 280000h-287FFFh 288000h-28FFFFh 290000h-297FFFh 298000h-29FFFFh 2A0000h-2A7FFFh 2A8000h-2AFFFFh 2B0000h-2B7FFFh 2B8000h-2BFFFFh 2C0000h-2C7FFFh 2C8000h-2CFFFFh 2D0000h-2D7FFFh 2D8000h-2DFFFFh 2E0000h-2E7FFFh 2E8000h-2EFFFFh 2F0000h-2F7FFFh 2F8000h-2FFFFFh 300000h-307FFFh 308000h-30FFFFh 310000h-317FFFh 318000h-31FFFFh 320000h-327FFFh 328000h-32FFFFh 330000h-337FFFh 338000h-33FFFFh 340000h-347FFFh 348000h-34FFFFh 350000h-357FFFh 358000h-35FFFFh 360000h-347FFFh 368000h-34FFFFh 370000h-377FFFh 378000h-37FFFFh 380000h-387FFFh 388000h-38FFFFh 390000h-397FFFh 398000h-39FFFFh 3A0000h-3A7FFFh 3A8000h-3AFFFFh 3B0000h-3B7FFFh 3B8000h-3BFFFFh REV. 1.8, FEB. 26, 2008 7 MX29LV640B T/B Sector Group 31 31 31 31 32 32 32 33 34 35 36 37 38 39 40 Sector Sector Address A21-A12 SA120 1111000xxx SA121 1111001xxx SA122 1111010xxx SA123 1111011xxx SA124 1111100xxx SA125 1111101xxx SA126 1111110xxx SA127 1111111000 SA128 1111111001 SA129 1111111010 SA130 1111111011 SA131 1111111100 SA132 1111111101 SA133 1111111110 SA134 1111111111 Sector Size (Kbytes/Kwords) 64/32 64/32 64/32 64/32 64/32 64/32 64/32 8/4 8/4 8/4 8/4 8/4 8/4 8/4 8/4 (x8) Address Range 780000h-78FFFFh 790000h-79FFFFh 7A0000h-7AFFFFh 7B0000h-7BFFFFh 7C0000h-7CFFFFh 7D0000h-7DFFFFh 7E0000h-7EFFFFh 7F0000h-7F1FFFh 7F2000h-7F3FFFh 7F4000h-7F5FFFh 7F6000h-7F7FFFh 7F8000h-7F9FFFh 7FA000h-7FBFFFh 7FC000h-7FDFFFh 7FE000h-7FFFFFh (x16) Address Range 3C0000h-3C7FFFh 3C8000h-3CFFFFh 3D0000h-3D7FFFh 3D8000h-3DFFFFh 3E0000h-3E7FFFh 3E8000h-3EFFFFh 3F0000h-3F7FFFh 3F8000h-3FFFFFh 3F9000h-3F9FFFh 3FA000h-3FAFFFh 3FB000h-3FBFFFh 3FC000h-3FCFFFh 3FD000h-3FDFFFh 3FE000h-3FEFFFh 3FF000h-3FFFFFh Top Boot Security Sector Addresses Sector Address A21~A12 1111111111 Sector Size (bytes/words) 256/128 (x8) Address Range 7FFF00h-7FFFFFh P/N:PM1076 (x16) Address Range 3FFF70h-3FFFFFh REV. 1.8, FEB. 26, 2008 8 MX29LV640B T/B MX29LV640BB SECTOR GROUP ARCHITECTURE Sector Group 1 2 3 4 5 6 7 8 9 9 9 10 10 10 10 11 11 11 11 12 12 12 12 13 13 13 13 14 14 14 14 15 15 15 15 16 16 16 16 Sector Sector Address A21-A12 SA0 0000000000 SA1 0000000001 SA2 0000000010 SA3 0000000011 SA4 0000000100 SA5 0000000101 SA6 0000000110 SA7 0000000111 SA8 0000001xxx SA9 0000010xxx SA10 0000011xxx SA11 0000100xxx SA12 0000101xxx SA13 0000110xxx SA14 0000111xxx SA15 0001000xxx SA16 0001001xxx SA17 0001010xxx SA18 0001011xxx SA19 0001100xxx SA20 0001101xxx SA21 0001110xxx SA22 0001111xxx SA23 0010000xxx SA24 0010001xxx SA25 0010010xxx SA26 0010011xxx SA27 0010100xxx SA28 0010101xxx SA29 0010110xxx SA30 0010111xxx SA31 0011000xxx SA32 0011001xxx SA33 0011010xxx SA34 0011011xxx SA35 0011100xxx SA36 0011101xxx SA37 0011110xxx SA38 0011111xxx Sector Size (Kbytes/Kwords) 8/4 8/4 8/4 8/4 8/4 8/4 8/4 8/4 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 P/N:PM1076 (x8) Address Range 000000h-001FFFh 002000h-003FFFh 004000h-005FFFh 006000h-007FFFh 008000h-009FFFh 00A000h-00BFFFh 00C000h-00DFFFh 00E000h-00FFFFh 010000h-01FFFFh 020000h-02FFFFh 030000h-03FFFFh 040000h-04FFFFh 050000h-05FFFFh 060000h-06FFFFh 070000h-07FFFFh 080000h-08FFFFh 090000h-09FFFFh 0A0000h-0AFFFFh 0B0000h-0BFFFFh 0C0000h-0CFFFFh 0D0000h-0DFFFFh 0E0000h-0EFFFFh 0F0000h-0FFFFFh 100000h-10FFFFh 110000h-11FFFFh 120000h-12FFFFh 130000h-13FFFFh 140000h-14FFFFh 150000h-15FFFFh 160000h-16FFFFh 170000h-17FFFFh 180000h-18FFFFh 190000h-19FFFFh 1A0000h-1AFFFFh 1B0000h-1BFFFFh 1C0000h-1CFFFFh 1D0000h-1DFFFFh 1E0000h-1EFFFFh 1F0000h-1FFFFFh (x16) Address Range 000000h-000FFFh 001000h-001FFFh 002000h-002FFFh 003000h-003FFFh 004000h-004FFFh 005000h-005FFFh 006000h-006FFFh 007000h-007FFFh 008000h-00FFFFh 010000h-017FFFh 018000h-01FFFFh 020000h-027FFFh 028000h-02FFFFh 030000h-037FFFh 038000h-03FFFFh 040000h-047FFFh 048000h-04FFFFh 050000h-057FFFh 058000h-05FFFFh 060000h-067FFFh 068000h-06FFFFh 070000h-077FFFh 078000h-07FFFFh 080000h-087FFFh 088000h-08FFFFh 090000h-097FFFh 098000h-09FFFFh 0A0000h-0A7FFFh 0A8000h-0AFFFFh 0B0000h-0B7FFFh 0B8000h-0BFFFFh 0C0000h-0C7FFFh 0C8000h-0CFFFFh 0D0000h-0D7FFFh 0D8000h-0DFFFFh 0E0000h-0E7FFFh 0E8000h-0EFFFFh 0F0000h-0F7FFFh 0F8000h-0FFFFFh REV. 1.8, FEB. 26, 2008 9 MX29LV640B T/B Sector Group 17 17 17 17 18 18 18 18 19 19 19 19 20 20 20 20 21 21 21 21 22 22 22 22 23 23 23 23 24 24 24 24 25 25 25 25 26 26 26 26 Sector Sector Address A21-A12 SA39 0100000xxx SA40 0100001xxx SA41 0100010xxx SA42 0100011xxx SA43 0100100xxx SA44 0100101xxx SA45 0100110xxx SA46 0100111xxx SA47 0101000xxx SA48 0101001xxx SA49 0101010xxx SA50 0101011xxx SA51 0101100xxx SA52 0101101xxx SA53 0101110xxx SA54 0101111xxx SA55 0110000xxx SA56 0110001xxx SA57 0110010xxx SA58 0110011xxx SA59 0110100xxx SA60 0110101xxx SA61 0110110xxx SA62 0110111xxx SA63 0111000xxx SA64 0111001xxx SA65 0111010xxx SA66 0111011xxx SA67 0111100xxx SA68 0111101xxx SA69 0111110xxx SA70 0111111xxx SA71 1000000xxx SA72 1000001xxx SA73 1000010xxx SA74 1000011xxx SA75 1000100xxx SA76 1000101xxx SA77 1000110xxx SA78 1000111xxx Sector Size (Kbytes/Kwords) 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 P/N:PM1076 (x8) Address Range 200000h-20FFFFh 210000h-21FFFFh 220000h-22FFFFh 230000h-23FFFFh 240000h-24FFFFh 250000h-25FFFFh 260000h-26FFFFh 270000h-27FFFFh 280000h-28FFFFh 290000h-29FFFFh 2A0000h-2AFFFFh 2B0000h-2BFFFFh 2C0000h-2CFFFFh 2D0000h-2DFFFFh 2E0000h-2EFFFFh 2F0000h-2FFFFFh 300000h-30FFFFh 310000h-31FFFFh 320000h-32FFFFh 330000h-33FFFFh 340000h-34FFFFh 350000h-35FFFFh 360000h-36FFFFh 370000h-37FFFFh 380000h-38FFFFh 390000h-39FFFFh 3A0000h-3AFFFFh 3B0000h-3BFFFFh 3C0000h-3CFFFFh 3D0000h-3DFFFFh 3E0000h-3EFFFFh 3F0000h-3FFFFFh 400000h-40FFFFh 410000h-41FFFFh 420000h-42FFFFh 430000h-43FFFFh 440000h-44FFFFh 450000h-45FFFFh 460000h-46FFFFh 470000h-47FFFFh (x16) Address Range 100000h-107FFFh 108000h-10FFFFh 110000h-117FFFh 118000h-11FFFFh 120000h-127FFFh 128000h-12FFFFh 130000h-137FFFh 138000h-13FFFFh 140000h-147FFFh 148000h-14FFFFh 150000h-157FFFh 158000h-15FFFFh 160000h-167FFFh 168000h-16FFFFh 170000h-177FFFh 178000h-17FFFFh 180000h-187FFFh 188000h-18FFFFh 190000h-197FFFh 198000h-19FFFFh 1A0000h-1A7FFFh 1A8000h-1AFFFFh 1B0000h-1B7FFFh 1B8000h-1BFFFFh 1C0000h-1C7FFFh 1C8000h-1CFFFFh 1D0000h-1D7FFFh 1D8000h-1DFFFFh 1E0000h-1E7FFFh 1E8000h-1EFFFFh 1F0000h-1F7FFFh 1F8000h-1FFFFFh 200000h-207FFFh 208000h-20FFFFh 210000h-217FFFh 218000h-21FFFFh 220000h-227FFFh 228000h-22FFFFh 230000h-237FFFh 238000h-23FFFFh REV. 1.8, FEB. 26, 2008 10 MX29LV640B T/B Sector Group 27 27 27 27 28 28 28 28 29 29 29 29 30 30 30 30 31 31 31 31 32 32 32 32 33 33 33 33 34 34 34 34 35 35 35 35 36 36 36 36 Sector Sector Address A21-A12 SA79 1001000xxx SA80 1001001xxx SA81 1001010xxx SA82 1001011xxx SA83 1001100xxx SA84 1001101xxx SA85 1001110xxx SA86 1001111xxx SA87 1010000xxx SA88 1010001xxx SA89 1010010xxx SA90 1010011xxx SA91 1010100xxx SA92 1010101xxx SA93 1010110xxx SA94 1010111xxx SA95 1011000xxx SA96 1011001xxx SA97 1011010xxx SA98 1011011xxx SA99 1011100xxx SA100 1011101xxx SA101 1011110xxx SA102 1011111xxx SA103 1100000xxx SA104 1100001xxx SA105 1100010xxx SA106 1100011xxx SA107 1100100xxx SA108 1100101xxx SA109 1100110xxx SA110 1100111xxx SA111 1101000xxx SA112 1101001xxx SA113 1101010xxx SA114 1101011xxx SA115 1101100xxx SA116 1101101xxx SA117 1101110xxx SA118 1101111xxx Sector Size (Kbytes/Kwords) 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 P/N:PM1076 (x8) Address Range 480000h-48FFFFh 490000h-49FFFFh 4A0000h-4AFFFFh 4B0000h-4BFFFFh 4C0000h-4CFFFFh 4D0000h-4DFFFFh 4E0000h-4EFFFFh 4F0000h-4FFFFFh 500000h-50FFFFh 510000h-51FFFFh 520000h-52FFFFh 530000h-53FFFFh 540000h-54FFFFh 550000h-55FFFFh 560000h-56FFFFh 570000h-57FFFFh 580000h-58FFFFh 590000h-59FFFFh 5A0000h-5AFFFFh 5B0000h-5BFFFFh 5C0000h-5CFFFFh 5D0000h-5DFFFFh 5E0000h-5EFFFFh 5F0000h-5FFFFFh 600000h-60FFFFh 610000h-61FFFFh 620000h-62FFFFh 630000h-63FFFFh 640000h-64FFFFh 650000h-65FFFFh 660000h-66FFFFh 670000h-67FFFFh 680000h-68FFFFh 690000h-69FFFFh 6A0000h-6AFFFFh 6B0000h-6BFFFFh 6C0000h-6CFFFFh 6D0000h-6DFFFFh 6E0000h-6EFFFFh 6F0000h-6FFFFFh (x16) Address Range 240000h-247FFFh 248000h-24FFFFh 250000h-257FFFh 258000h-25FFFFh 260000h-267FFFh 268000h-26FFFFh 270000h-277FFFh 278000h-27FFFFh 280000h-287FFFh 288000h-28FFFFh 290000h-297FFFh 298000h-29FFFFh 2A0000h-2A7FFFh 2A8000h-2AFFFFh 2B0000h-2B7FFFh 2B8000h-2BFFFFh 2C0000h-2C7FFFh 2C8000h-2CFFFFh 2D0000h-2D7FFFh 2D8000h-2DFFFFh 2E0000h-2E7FFFh 2E8000h-2EFFFFh 2F0000h-2F7FFFh 2F8000h-2FFFFFh 300000h-307FFFh 308000h-30FFFFh 310000h-317FFFh 318000h-31FFFFh 320000h-327FFFh 328000h-32FFFFh 330000h-337FFFh 338000h-33FFFFh 340000h-347FFFh 348000h-34FFFFh 350000h-357FFFh 358000h-35FFFFh 360000h-367FFFh 368000h-36FFFFh 370000h-377FFFh 378000h-37FFFFh REV. 1.8, FEB. 26, 2008 11 MX29LV640B T/B Sector Group 37 37 37 37 38 38 38 38 39 39 39 39 40 40 40 40 Sector Sector Address A21-A12 SA119 1110000xxx SA120 1110001xxx SA121 1110010xxx SA122 1110011xxx SA123 1110100xxx SA124 1110101xxx SA125 1110110xxx SA126 1110111xxx SA127 1111000xxx SA128 1111001xxx SA129 1111010xxx SA130 1111011xxx SA131 1111100xxx SA132 1111101xxx SA133 1111110xxx SA134 1111111xxx Sector Size (Kbytes/Kwords) 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 64/32 (x8) Address Range 700000h-70FFFFh 710000h-71FFFFh 720000h-72FFFFh 730000h-73FFFFh 740000h-74FFFFh 750000h-75FFFFh 760000h-76FFFFh 770000h-77FFFFh 780000h-78FFFFh 790000h-79FFFFh 7A0000h-7AFFFFh 7B0000h-7BFFFFh 7C0000h-7CFFFFh 7D0000h-7DFFFFh 7E0000h-7EFFFFh 7F0000h-7FFFFFh (x16) Address Range 380000h-387FFFh 388000h-38FFFFh 390000h-397FFFh 398000h-39FFFFh 3A0000h-3A7FFFh 3A8000h-3AFFFFh 3B0000h-3B7FFFh 3B8000h-3BFFFFh 3C0000h-3C7FFFh 3C8000h-3CFFFFh 3D0000h-3D7FFFh 3D8000h-3DFFFFh 3E0000h-3E7FFFh 3E8000h-3EFFFFh 3F0000h-3F7FFFh 3F8000h-3FFFFFh Bottom Boot Security Sector Addresses Sector Address A21~A12 0000000000 Sector Size (bytes/words) 256/128 (x8) Address Range 000000h-0000FFh P/N:PM1076 (x16) Address Range 000000h-00007Fh REV. 1.8, FEB. 26, 2008 12 MX29LV640B T/B Table 2. BUS OPERATION--1 Mode Select RE- CE# WE# OE# Address SET# Data (I/O) Q0~Q7 Byte# Vil WP#/ Vih ACC Data (I/O) Q8~Q15 Device Reset L X X X X HighZ HighZ HighZ L/H Standby Mode Vcc± Vcc± X X X HighZ HighZ HighZ H 0.3V 0.3V H L H H X HighZ HighZ HighZ L/H Read Mode H L H L AIN DOUT Q8-Q14= DOUT L/H Write (Note1) H L L H AIN (Note4) HighZ DIN (Note3) Accelerate H L L H AIN (Note4) Q15= DIN Vhv Output Disable Program Temporary A-1 Vhv X X X AIN (Note4) HighZ DIN (Note3) Vhv L L H Sector Address, (Note4) X X L/H (Note4) X X (Note3) Sector-Group Unprotect Sector-Group Protect (Note2) A6=L, A1=H, A0=L Chip Unprotect (Note2) Vhv L L H Sector Address, A6=H, A1=H, A0=L Notes: 1. All sectors will be unprotected if WP#/ACC=Vhv. 2. The two outmost boot sectors are protected if WP#/ACC=Vil. 3. When WP#/ACC = Vih, the protection conditions of the two outmost boot sectors depend on previous protection conditions."Sector/Sector Block Protection and Unprotection" describes the protect and unprotect method. When WP#/ACC=Vil, the two outer most boot sectors remain protected. 4. Q0~Q15 are input (DIN) or output (DOUT) pins according to the requests of command sequence, sector protection, or data polling algorithm. 5. In Word Mode (Byte#=Vih), the addresses are AM to A0. In Byte Mode (Byte#=Vil), the addresses are AM to A-1 (Q15). 6. AM: MSB of address. P/N:PM1076 REV. 1.8, FEB. 26, 2008 13 MX29LV640B T/B BUS OPERATION--2 Item Control Input CE# WE# OE# AM A11 to to A8 A9 A12 A10 Sector Lock Status L H L SA x to A5 A6 A7 Vhv x to A1 A0 Q0~Q7 Q8~Q15 H L 01h or x A2 L x Verification 00h (Note1) Read Silicon ID L H L x x Vhv x L x L L C2H Manufacturer Code Read Silicon ID XXH(Byte) L H L x x Vhv x L x L H C9H MX29LV640BT Read Silicon ID 22H(Word) XXH(Byte) L H L x x Vhv x L x L H CBH MX29LV640BB Read Indicator Bit 22H(Word) 22H(Word) XXH(Byte) L H L x x Vhv x L x H H (Note2) x (Q7) For Security Sector Notes: 1. Sector unprotected code:00h. Sector protected code:01h. 2. Factory locked code: XX88H Factory unlocked code: XX08H 3. AM: MSB of address. P/N:PM1076 REV. 1.8, FEB. 26, 2008 14 MX29LV640B T/B WRITE COMMANDS/COMMAND SEQUENCES To write a command to the device, system must drive WE# and CE# to Vil, and OE# to Vih. In a command cycle, all address are latched at the later falling edge of CE# and WE#, and all data are latched at the earlier rising edge of CE# and WE#. Figure 1 illustrates the AC timing waveform of a write command, and Table 3 defines all the valid command sets of the device. System is not allowed to write invalid commands not defined in this datasheet. Writing an invalid command will bring the device to an undefined state. REQUIREMENTS FOR READING ARRAY DATA Read array action is to read the data stored in the array. While the memory device is in powered up or has been reset, it will automatically enter the status of read array. If the microprocessor wants to read the data stored in the array, it has to drive CE# (device enable control pin) and OE# (Output control pin) as Vil, and input the address of the data to be read into address pin at the same time. After a period of read cycle (Tce or Taa), the data being read out will be displayed on output pin for microprocessor to access. If CE# or OE# is Vih, the output will be in tri-state, and there will be no data displayed on output pin at all. After the memory device completes embedded operation (automatic Erase or Program), it will automatically return to the status of read array, and the device can read the data in any address in the array. In the process of erasing, if the device receives the Erase suspend command, erase operation will be stopped temporarily after a period of time no more than Tready and the device will return to the status of read array. At this time, the device can read the data stored in any address except the sector being erased in the array. In the status of erase suspend, if user wants to read the data in the sectors being erased, the device will output status data onto the output. Similarly, if program command is issued after erase suspend, after program operation is completed, system can still read array data in any address except the sectors to be erased. The device needs to issue reset command to enable read array operation again in order to arbitrarily read the data in the array in the following two situations: 1. In program or erase operation, the programming or erasing failure causes Q5 to go high. 2. The device is in auto select mode or CFI mode. In the two situations above, if reset command is not issued, the device is not in read array mode and system must issue reset command before reading array data. ACCELERATED PROGRAM OPERATION The accelerated program can improve programming performance compared with word/byte program. By applying Vhv on WP#/ACC pin, the device will enter accelerated program and draw current no more than IACC from WP#/ACC pin. Removing the Vhv from WP#/ACC pin will put the device back to normal operation (not accelerated). P/N:PM1076 REV. 1.8, FEB. 26, 2008 15 MX29LV640B T/B RESET# OPERATION Driving RESET# pin low for a period more than Trp will reset the device back to read mode. If the device is in program or erase operation, the reset operation will take at most a period of Tready for the device to return to read array mode. Before the device returns to read array mode, the RY/BY# pin remains low (busy status). When RESET# pin is held at GND±0.3V, the device consumes standby current(Isb).However, device draws larger current if RESET# pin is held at Vil but not within GND±0.3V. It is recommended that the system to tie its reset signal to RESET# pin of flash memory, so that the flash memory will be reset during system reset and allows system to read boot code from flash memory. SECTOR GROUP PROTECT OPERATION When a sector group is protected, program or erase operation will be disabled on these sectors. MX29LV640B T/B provides two methods for sector group protection. Once the sector group is protected, the sector group remains protected until next chip unprotect, or is temporarily unprotected by asserting RESET# pin at Vhv. Refer to temporary sector group unprotect operation for further details. The first method is by applying Vhv on RESET# pin. Refer to Figure 13 for timing diagram and Figure 14 for the algorithm for this method. The other method is asserting Vhv on A9 and OE# pins, with A6 and CE# at Vil. The protection operation begins at the falling edge of WE# and terminates at the rising edge. Contact Macronix for details. CHIP UNPROTECT OPERATION MX29LV640B T/B provides two methods for chip unprotect. The chip unprotect operation unprotects all sectors within the device. It is recommended to protect all sectors before activating chip unprotect mode. All sectors groups are unprotected when shipped from the factory. The first method is by applying Vhv on RESET# pin. Refer to Figure 13 for timing diagram and Figure 14 for algorithm of the operation. The other method is asserting Vhv on A9 and OE# pins, with A6 at Vih and CE# at Vil (see Table 2). The unprotect operation begins at the falling edge of WE# and terminates at the rising edge. Contact Macronix for details. TEMPORARY SECTOR GROUP UNPROTECT OPERATION System can apply RESET# pin at Vhv to place the device in temporary unprotect mode. In this mode, previously protected sectors can be programmed or erased just as it is unprotected. The devices returns to normal operation once Vhv is removed from RESET# pin and previously protected sectors are again protected. P/N:PM1076 REV. 1.8, FEB. 26, 2008 16 MX29LV640B T/B WRITE PROTECT (WP#) Another function of the WP#/ACC pin is to provide write protection function on the two outermost 8 Kbyte boot sectors. When ViL is asserted on WP#/ACC pin, the two boot sectors are protected regardless of the previous state of protection implemented by aforementioned Sector Group Protect/Chip Unprotect. For MX29LV640BT, the two outermost sectors are the two boot sectors of the highest addresses. For MX29LV640BB, the two outermost sectors are the two boot sectors of the lowest addresses. Note that the WP#/ACC should be either Vhv, Vih, or Vil, and must not be floated or unconnected; otherwise the device may not function properly. AUTOMATIC SELECT OPERATION When the device is in Read array mode, erase-suspended read array mode or CFI mode, user can issue read silicon ID command to enter read silicon ID mode. After entering read silicon ID mode, user can query several silicon IDs continuously and does not need to issue read silicon ID mode again. When A0 is Low, device will output Macronix Manufacture ID C2H. When A0 is high, device will output Device ID. In read silicon ID mode, issuing reset command will reset device back to read array mode or erase-suspended read array mode. Another way to enter read silicon ID is to apply high voltage on A9 pin with CE#, OE#, A6 and A1 at Vil. While the high voltage of A9 pin is discharged, device will automatically leave read silicon ID mode and go back to read array mode or erase-suspended read array mode. When A0 is Low, device will output Macronix Manufacture ID C2. When A0 is high, device will output Device ID. VERIFY SECTOR GROUP PROTECT STATUS OPERATION MX29LV640B T/B provides hardware sector protection against Program and Erase operation for protected sectors. The sector protect status can be read through Sector Protect Verify command. This method requires Vhv on A9 pin, Vih on WE# and A1 pins, Vil on CE#, OE#, A6 and A0 pins, and sector address on A12 to A21 pins. If the read out data is 01H, the designated sector is protected. Oppositely, if the read out data is 00H, the designated sector is not protected. SECURITY SECTOR FLASH MEMORY REGION The Security Sector region is an extra memory space of 128 words in length. The security sectors can be locked upon shipping from factory, or it can be locked by customer after shipping. Customer can issue Security Sector Factory Protect Verify and/or Security Sector Protect Verify to query the lock status of the device. In factory-locked device, security sector region is protected when shipped from factory and the security silicon sector indicator bit is set to "1". In customer lockable device, security sector region is unprotected when shipped from factory and the security silicon indicator bit is set to "0". Factory Locked: Security Sector Programmed and Protected at the Factory In a factory locked device, the security silicon region is permanently locked after shipping from factory. The device will have a 16-byte (8-word) ESN in the security region. In bottom boot device : 000000h - 000007h (for MX29LV640BB).In Top boot device : 3FFF70h - 3FFF77h (for MX29LV640BT). P/N:PM1076 REV. 1.8, FEB. 26, 2008 17 MX29LV640B T/B Customer Lockable: Security Sector NOT Programmed or Protected at the Factory When the security feature is not required, the security region can act as an extra memory space. The security silicon sector can be read, programmed, or erased just as normal sectors with the same endurance limitations. Security silicon sector can also be protected by two methods. Note that once the security silicon sector is protected, there is no way to unprotect the security silicon sector and the content of it can no longer be altered. The first method is to write a three-cycle command of Enter Security Region, and then follow the sector group protect algorithm as illustrated in Figure 14, except that RESET# pin may at either Vih or Vhv. The other method is to write a three-cycle command of Enter Security Region, and then follow the alternate method of sector protect with A9, OE# at Vhv. After the security silicon is locked and verified, system must write Exit Security Sector Region, go through a power cycle, or issue a hardware reset to return the device to read normal array mode. DATA PROTECTION To avoid accidental erasure or programming of the device, the device is automatically reset to read array mode during power up. Besides, only after successful completion of the specified command sets will the device begin its erase or program operation. Other features to protect the data from accidental alternation are described as followed. LOW VCC WRITE INHIBIT The device refuses to accept any write command when Vcc is less than VLKO. This prevents data from spuriously altered. The device automatically resets itself when Vcc is lower than VLKO and write cycles are ignored until Vcc is greater than VLKO. System must provide proper signals on control pins after Vcc is larger than VLKO to avoid unintentional program or erase operation WRITE PULSE "GLITCH" PROTECTION CE#, WE#, OE# pulses shorter than 5ns are treated as glitches and will not be regarded as an effective write cycle. LOGICAL INHIBIT A valid write cycle requires both CE# and WE# at Vil with OE# at Vih. Write cycle is ignored when either CE# at Vih, WE# a Vih, or OE# at Vil. POWER-UP SEQUENCE Upon power up, MX29LV640B T/B is placed in read array mode. Furthermore, program or erase operation will begin only after successful completion of specified command sequences. P/N:PM1076 REV. 1.8, FEB. 26, 2008 18 MX29LV640B T/B POWER-UP WRITE INHIBIT When WE#, CE# is held at Vil and OE# is held at Vih during power up, the device ignores the first command on the rising edge of WE#. POWER SUPPLY DECOUPLING A 0.1uF capacitor should be connected between the Vcc and GND to reduce the noise effect. P/N:PM1076 REV. 1.8, FEB. 26, 2008 19 MX29LV640B T/B TABLE 3. MX29LV640B T/B COMMAND DEFINITIONS Automatic Select Command Read Mode Reset Mode 1st Bus Cyc Addr Addr XXX Data Data F0 2nd Bus Cyc Addr Silicon ID Device ID Word Byte Word Byte 555 AAA 555 Security Sector Factory Protect Verify AAA Enter Security Sector Region Sector Protect Verify Enable Word Byte Word Byte Word Byte 555 AAA 555 AAA 555 AAA AA AA AA AA AA AA AA AA AA AA 2AA 555 2AA 555 2AA 555 2AA 555 2AA 555 Data 55 55 55 55 55 55 55 55 55 55 Addr 555 AAA 555 AAA 555 AAA 555 AAA 555 AAA Data 90 90 90 90 90 90 90 90 88 88 4th Bus Cyc Addr X00 X00 X01 Data C2H C2H ID X02 ID X03 88/08 X06 88/08 5th Bus Cyc Addr 3rd Bus Cyc (Sector) (Sector) X02 X04 00/01 00/01 Data 6th Bus Cyc Addr Data Exit Security Sector Command Program Chip Erase Word Byte Word Byte Word Byte 1st Bus Cyc Sector Erase Word Byte CFI Read Erase Suspend Word Byte Word/Byte Erase Resume Word/Byte Addr 555 AAA 555 AAA 555 AAA 555 AAA 55 AA XXX XXX Data AA AA AA AA AA AA AA AA 98 98 B0 30 Addr 2AA 555 2AA 555 2AA 555 2AA 555 Data 55 55 55 55 55 55 55 55 3rd Bus Cyc Addr 555 AAA 555 AAA 555 AAA 555 AAA Data 90 90 A0 A0 4th Bus Cyc Addr XXX 00 2nd Bus Cyc 80 80 80 80 555 AAA 555 AAA AA AA AA AA Addr 2AA 555 2AA 555 Data 55 55 55 Addr 555 Data 10 Data 5th Bus Cyc 6th Bus Cyc XXX Addr Addr 00 Data Data AAA Sector 10 30 P/N:PM1076 55 Sector 30 REV. 1.8, FEB. 26, 2008 20 MX29LV640B T/B RESET In the following situations, executing reset command will reset device back to read array mode: • Among erase command sequence (before the full command set is completed) • Sector erase time-out period • Erase fail (while Q5 is high) • Among program command sequence (before the full command set is completed, erase-suspended program included) • Program fail (while Q5 is high, and erase-suspended program fail is included) • Read silicon ID mode • Sector protect verify • CFI mode While device is at the status of program fail or erase fail (Q5 is high), user must issue reset command to reset device back to read array mode. While the device is in read silicon ID mode, sector protect verify or CFI mode, user must issue reset command to reset device back to read array mode. When the device is in the progress of programming (not program fail) or erasing (not erase fail), device will ignore reset command. AUTOMATIC SELECT COMMAND SEQUENCE Automatic Select mode is used to access the manufacturer ID, device ID and to verify whether or not secured silicon is locked and whether or not a sector is protected. The automatic select mode has four command cycles. The first two are unlock cycles, and followed by a specific command. The fourth cycle is a normal read cycle, and user can read at any address any number of times without entering another command sequence. The reset command is necessary to exit the Automatic Select mode and back to read array. The following table shows the identification code with corresponding address. Manufacturer ID Device ID Secured Silicon Sector Protect Verify Address Data (Hex) Representation Word X00 C2 Byte X00 C2 Word X01 22C9/22CB Top/Bottom Boot Sector Byte X02 XXC9/XXCB Top/Bottom Boot Sector Word X03 88/08 Factory locked/unlocked Byte X06 88/08 Factory locked/unlocked Word (Sector address) X 02 00/01 Unprotected/protected Byte (Sector address) X 04 00/01 Unprotected/protected There is an alternative method to that shown in Table 2, which is intended for EPROM programmers and requires Vhv on address bit A9. P/N:PM1076 REV. 1.8, FEB. 26, 2008 21 MX29LV640B T/B AUTOMATIC PROGRAMMING The MX29LV640B T/B can provide the user program function by the form of Byte-Mode or Word-Mode. As long as the users enter the right cycle defined in the Table.3 (including 2 unlock cycles and A0H), any data user inputs will automatically be programmed into the array. Once the program function is executed, the internal write state controller will automatically execute the algorithms and timings necessary for program and verification, which includes generating suitable program pulse, verifying whether the threshold voltage of the programmed cell is high enough and repeating the program pulse if any of the cells does not pass verification. Meanwhile, the internal control will prohibit the programming to cells that pass verification while the other cells fail in verification in order to avoid over-programming. With the internal write state controller, the device requires the user to write the program command and data only. Programming will only change the bit status from "1" to "0". That is to say, it is impossible to convert the bit status from "0" to "1" by programming. Meanwhile, the internal write verification only detects the errors of the "1" that is not successfully programmed to "0". Any command written to the device during programming will be ignored except hardware reset, which will terminate the program operation after a period of time no more than Tready. When the embedded program algorithm is complete or the program operation is terminated by hardware reset, the device will return to the reading array data mode. The typical chip program time at room temperature of the MX29LV640B T/B is less than 45 seconds. When the embedded program operation is on going, user can confirm if the embedded operation is finished or not by the following methods: Status Q7 Q6 Q5 RY/BY#*2 In progress*1 Q7# Toggling 0 0 Finished Q7 Stop toggling 0 1 Exceed time limit Q7# Toggling 1 0 *1: The status "in progress" means both program mode and erase-suspended program mode. *2: RY/BY# is an open drain output pin and should be weakly connected to VDD through a pull-up resistor. *3: When an attempt is made to program a protected sector, Q7 will output its complement data or Q6 continues to toggle for about 1us or less and the device returns to read array state without programing the data in the protected sector. P/N:PM1076 REV. 1.8, FEB. 26, 2008 22 MX29LV640B T/B CHIP ERASE Chip Erase is to erase all the data with "1" and "0" as all "1". It needs 6 cycles to write the action in, and the first two cycles are "unlock" cycles, the third one is a configuration cycle, the fourth and fifth are also "unlock" cycles, and the sixth cycle is the chip erase operation. During chip erasing, all the commands will not be accepted except hardware reset or the working voltage is too low that chip erase will be interrupted. After Chip Erase, the chip will return to the state of Read Array. When the embedded chip erase operation is on going, user can confirm if the embedded operation is finished or not by the following methods: Status Q7 Q6 Q5 Q2 RY/BY# In progress 0 Toggling 0 Toggling 0 Finished 1 Stop toggling 0 1 1 Exceed time limit 0 Toggling 1 Toggling 0 SECTOR ERASE Sector Erase is to erase all the data in a sector with "1" and "0" as all "1". It requires six command cycles to issue. The first two cycles are "unlock cycles", the third one is a configuration cycle, the fourth and fifth are also "unlock cycles" and the sixth cycle is the sector erase command. After the sector erase command sequence is issued, there is a timeout period of 50us counted internally. During the time-out period, additional sector address and sector erase command can be written multiply. Once user enters another sector erase command, the time-out period of 50us is recounted. If user enters any command other than sector erase or erase suspend during time-out period, the erase command would be aborted and the device is reset to read array condition. The number of sectors could be from one sector to all sectors. After time-out period passing by, additional erase command is not accepted and erase embedded operation begins. During sector erasing, all commands will not be accepted except hardware reset and erase suspend and user can check the status as chip erase. When the embedded erase operation is on going, user can confirm if the embedded operation is finished or not by the following methods: Status Q7 Q6 Q5 Q3 Q2 RY/BY#*2 Time-out period 0 Toggling 0 0 Toggling 0 In progress 0 Toggling 0 1 Toggling 0 Finished 1 Stop toggling 0 1 1 1 Exceed time limit 0 Toggling 1 1 Toggling 0 *1: The status Q3 is the time-out period indicator. When Q3=0, the device is in time-out period and is acceptible to another sector address to be erased. When Q3=1, the device is in erase operation and only erase suspend is valid. *2: RY/BY# is open drain output pin and should be weakly connected to VDD through a pull-up resistor. *3: When an attempt is made to erase a protected sector, Q7 will output its complement data or Q6 continues to toggle for 100us or less and the device returned to read array status without erasing the data in the protected sector. P/N:PM1076 REV. 1.8, FEB. 26, 2008 23 MX29LV640B T/B SECTOR ERASE SUSPEND During sector erasure, sector erase suspend is the only valid command. If user issue erase suspend command in the time-out period of sector erasure, device time-out period will be over immediately and the device will go back to erasesuspended read array mode. If user issue erase suspend command during the sector erase is being operated, device will suspend the ongoing erase operation, and after the Tready1 (<=20us) suspend finishes and the device will enter erase-suspended read array mode. User can judge if the device has finished erase suspend through Q6, Q7, and RY/ BY#. After device has entered erase-suspended read array mode, user can read other sectors not at erase suspend by the speed of Taa; while reading the sector in erase-suspend mode, device will output its status. User can use Q6 and Q2 to judge the sector is erasing or the erase is suspended. Status Q7 Q6 Q5 Q3 Q2 RY/BY# 1 No toggle 0 N/A Toggle 1 Erase suspend read in non-erase suspended sector Data Data Data Data Data 1 Erase suspend program in non-erase suspended sector Q7# Toggle 0 N/A N/A 0 Erase suspend read in erase suspended sector When the device has suspended erasing, user can execute the command sets except sector erase and chip erase, such as read silicon ID, sector protect verify, program, CFI query and erase resume. SECTOR ERASE RESUME Sector erase resume command is valid only when the device is in erase suspend state. After erase resume, user can issue another erase suspend command, but there should be a 4mS interval between erase resume and the next erase suspend. If user issue infinite suspend-resume loop, or suspend-resume exceeds 1024 times, the time for erasing will increase. P/N:PM1076 REV. 1.8, FEB. 26, 2008 24 MX29LV640B T/B QUERY COMMAND AND COMMON FLASH INTERFACE (CFI) MODE MX29LV640B T/B features CFI mode. Host system can retrieve the operating characteristics, structure and vendorspecified information such as identifying information, memory size, byte/word configuration, operating voltages and timing information of this device by CFI mode. The device enters the CFI Query mode when the system writes the CFI Query command, 98H, to address 55H/AAH (depending on Word/Byte mode) any time the device is ready to read array data. The system can read CFI information at the addresses given in Table 4. A reset command is required to exit CFI mode and go back to ready array mode or erase suspend mode. The system can write the CFI Query command only when the device is in read mode, erase suspend, standby mode or automatic select mode. Table 4-1. CFI mode: Identification Data Values (All values in these tables are in hexadecimal) Description Query-unique ASCII string "QRY" Primary vendor command set and control interface ID code Address for primary algorithm extended query table Alternate vendor command set and control interface ID code Address for alternate algorithm extended query table Address (h) (Word Mode) 10 11 12 13 14 15 16 17 18 19 1A Address (h) (Byte Mode) 20 22 24 26 28 2A 2C 2E 30 32 34 Data (h) Address (h) (Word Mode) 1B 1C 1D 1E 1F 20 21 Address (h) (Byte Mode) 36 38 3A 3C 3E 40 42 Data (h) 22 23 24 25 26 44 46 48 4A 4C 0000 0005 0000 0004 0000 0051 0052 0059 0002 0000 0040 0000 0000 0000 0000 0000 Table 4-2. CFI Mode: System Interface Data Values Description Vcc supply minimum program/erase voltage Vcc supply maximum program/erase voltage VPP supply minimum program/erase voltage VPP supply maximum program/erase voltage Typical timeout per single word/byte write, 2n us Typical timeout for maximum-size buffer write, 2n us Typical timeout per individual block erase, 2n ms Typical timeout for full chip erase, 2n ms Maximum timeout for word/byte write, 2n times typical Maximum timeout for buffer write, 2n times typical Maximum timeout per individual block erase, 2n times typical Maximum timeout for chip erase, 2n times typical P/N:PM1076 0027 0036 0000 0000 0004 0000 000A REV. 1.8, FEB. 26, 2008 25 MX29LV640B T/B Table 4-3. CFI Mode: Device Geometry Data Values Description Address (h) Address (h) (Word Mode) (Byte Mode) Device size = 2 in number of bytes 27 4E 0017 Flash device interface description (02=asynchronous x8/x16) 28 50 0002 29 52 0000 2A 54 0000 2B 56 0000 Number of erase regions within device 2C 58 0002 Index for Erase Bank Area 1 2D 5A 0007 [2E,2D] = # of same-size sectors in region 1-1 2E 5C 0000 [30, 2F] = sector size in multiples of 256-bytes 2F 5E 0020 30 60 0000 31 62 007E 32 64 0000 33 66 0000 34 68 0001 35 6A 0000 36 6C 0000 37 6E 0000 38 70 0000 39 72 0000 3A 74 0000 3B 76 0000 3C 78 0000 n n Maximum number of bytes in buffer write = 2 (not support) Index for Erase Bank Area 2 Index for Erase Bank Area 3 Index for Erase Bank Area 4 P/N:PM1076 Data (h) REV. 1.8, FEB. 26, 2008 26 MX29LV640B T/B Table 4-4. CFI Mode: Primary Vendor-Specific Extended Query Data Values Description Address (h) Address (h) (Word Mode) (Byte Mode) 40 80 0050 41 82 0052 42 84 0049 Major version number, ASCII 43 86 0031 Minor version number, ASCII 44 88 0031 Unlock recognizes address (0= recognize, 1= don't recognize) 45 8A 0000 Erase suspend (2= to both read and program) 46 8C 0002 Sector protect (N= # of sectors/group) 47 8E 0004 Temporary sector unprotect (1=supported) 48 90 0001 Sector protect/Chip unprotect scheme 49 92 0004 Simultaneous R/W operation (0=not supported) 4A 94 0000 Burst mode (0=not supported) 4B 96 0000 Page mode (0=not supported) 4C 98 0000 Maximum acceleration supply (0= not supported), [D7:D4] for volt, 4D 9A 00B5 4E 9C 00C5 4F 9E 0002/ Query - Primary extended table, unique ASCII string, PRI Data (h) [D3:D0] for 100mV Minimum acceleration supply (0= not supported), [D7:D4] for volt, [D3:D0] for 100mV Top/Bottom boot block indicator 02h=bottom boot device 03h=top boot device 0003 P/N:PM1076 REV. 1.8, FEB. 26, 2008 27 MX29LV640B T/B ABSOLUTE MAXIMUM STRESS RATINGS Surrounding Temperature with Bias . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65oC to +125oC Storage Temperature . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65oC to +150oC Voltage Range Vcc . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to +4.0 V RESET#, A9 and OE# . .. . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to +12.5 V The other pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.5 V to Vcc +0.5 V Output Short Circuit Current (less than one second) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .200 mA OPERATING TEMPERATURE AND VOLTAGE Commercial (C) Grade Surrounding Temperature (TA ). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C Industrial (I) Grade Surrounding Temperature (TA ). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C VCC Supply Voltages VCC range. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +2.7 V to 3.6 V P/N:PM1076 REV. 1.8, FEB. 26, 2008 28 MX29LV640B T/B DC CHARACTERISTICS Symbol Description Iilk Input Leak Iilk9 A9 Leak Iolk Output Leak Icr1 Read Current(5MHz) Min Typ Max Remark ± 1.0uA 35uA A9=12.5V ± 1.0uA 9mA 16mA CE#=Vil, OE#=Vih Icr2 Read Current(1MHz) 2mA 4mA CE#=Vil, OE#=Vih Icw Write Current 26mA 30mA CE#=Vil, OE#=Vih, WE#=Vil Isb Standby Current 0.2uA 15uA Vcc=Vcc max, other pin disable Isbr Reset Current 0.2uA 15uA Vcc=Vccmax, Reset# enable, other pin disable Isbs Sleep Mode Current 0.2uA 15uA Icp1 Accelerated Pgm Current, 5mA 10mA WP#/Acc pin(Word/Byte) Icp2 CE#=Vil, OE#=Vih, Accelerated Pgm Current, 15mA 30mA Vcc pin,(Word/Byte) CE#=Vil, OE#=Vih, Vil Input Low Voltage -0.5V 0.8V Vih Input High Voltage 0.7xVcc Vcc+0.3V Vhv Very High Voltage for hardware 11.5V 12.5V Protect/Unprotect/Accelerated Program/Auto Select/Temporary Unprotect Vol Output Low Voltage 0.45V Voh1 Ouput High Voltage 0.85xVcc Ioh1=-2mA Voh2 Ouput High Voltage Vcc-0.4V Ioh2=-100uA P/N:PM1076 Iol=4.0mA REV. 1.8, FEB. 26, 2008 29 MX29LV640B T/B SWITCHING TEST CIRCUITS Vcc R2 TESTED DEVICE 0.1uF +3.3V CL R1 DIODES=IN3064 OR EQUIVALENT R1=6.2K ohm R2=2.7K ohm Test Condition Output Load : 1 TTL gate Output Load Capacitance,CL : 30pF Rise/Fall Times : 5ns In/Out reference levels :1.5V SWITCHING TEST WAVEFORMS 3.0V 1.5V 1.5V Test Points 0.0V INPUT OUTPUT P/N:PM1076 REV. 1.8, FEB. 26, 2008 30 MX29LV640B T/B AC CHARACTERISTICS Symbol Description Taa Min Typ Max Unit Valid data output after address 90/120 ns Tce Valid data output after CE# low 90/120 ns Toe Valid data output after OE# low 35/50 ns Tdf Data output floating after OE# high 30/30 ns Toh Output hold time from the earliest rising edge of address, 0 ns CE#, OE# Trc Read period time 90/120 ns Twc Write period time 90/120 ns Tcwc Command write period time 90/120 ns Tas Address setup time 0 ns Tah Address hold time 45/50 ns Tds Data setup time 45/50 ns Tdh Data hold time 0 ns Tvcs Vcc setup time 50 us Tcs Chip enable Setup time 0 ns Tch Chip enable hold time 0 ns Toes Output enable setup time 0 ns Read 0 ns Toggle & 10 ns Toeh Toeh Output enable hold time Data# Polling Tws WE# setup time 0 ns Twh WE# hold time 0 ns Tcep CE# pulse width 45/50 ns Tceph CE# pulse width high 30 ns Twp WE# pulse width 35/50 ns Twph WE# pulse width high 30 ns Tbusy Program/Erase active time by RY/BY# Tghwl Read recover time before write 0 ns Tghel Read recover time before write 0 ns Twhwh1 Program operation Byte 9 us Twhwh1 Program operation Word 11 us Twhwh1 Acc Program operation(Word/Byte) 7 us Twhwh2 Sector Erase Operation 1.6 sec Tbal Sector Add hold time 90 50 P/N:PM1076 ns us REV. 1.8, FEB. 26, 2008 31 MX29LV640B T/B Figure 1. COMMAND WRITE OPERATION Tcwc CE# Vih Vil Tch Tcs WE# Vih Vil Toes OE# Twph Twp Vih Vil Addresses Vih VA Vil Tah Tas Tdh Tds Vih Data Vil DIN VA: Valid Address P/N:PM1076 REV. 1.8, FEB. 26, 2008 32 MX29LV640B T/B READ/RESET OPERATION Figure 2. READ TIMING WAVEFORMS Tce Vih CE# Vil Vih WE# Vil Toeh Tdf Toe Vih OE# Vil Toh Taa Trc Vih ADD Valid Addresses Vil Outputs Voh HIGH Z DATA Valid HIGH Z Vol P/N:PM1076 REV. 1.8, FEB. 26, 2008 33 MX29LV640B T/B AC CHARACTERISTICS Item Description Setup Speed Unit Trp1 RESET# Pulse Width (During Automatic Algorithms) MIN 10 us Trp2 RESET# Pulse Width (NOT During Automatic Algorithms) MIN 500 ns Trh RESET# High Time Before Read MIN 50 ns Trb1 RY/BY# Recovery Time (to CE#, OE# go low) MIN 0 ns Trb2 RY/BY# Recovery Time (to WE# go low) MIN 50 ns Tready1 RESET# PIN Low (During Automatic Algorithms) MAX 20 us MAX 500 ns to Read or Write Tready2 RESET# PIN Low (NOT During Automatic Algorithms) to Read or Write Figure 3. RESET# TIMING WAVEFORM Trb1 CE#, OE# Trb2 WE# Tready1 RY/BY# RESET# Trp1 Reset Timing during Automatic Algorithms CE#, OE# Trh RY/BY# RESET# Trp2 Tready2 Reset Timing NOT during Automatic Algorithms P/N:PM1076 REV. 1.8, FEB. 26, 2008 34 MX29LV640B T/B ERASE/PROGRAM OPERATION Figure 4. AUTOMATIC CHIP ERASE TIMING WAVEFORM CE# Tch Twp WE# Twph Tcs Tghwl OE# Last 2 Erase Command Cycle Twc Address Read Status Tah Tas 2AAh VA SA Tds Tdh 55h VA In Progress Complete 10h Data Tbusy Trb RY/BY# SA: 555h for chip erase P/N:PM1076 REV. 1.8, FEB. 26, 2008 35 MX29LV640B T/B Figure 5. AUTOMATIC CHIP ERASE ALGORITHM FLOWCHART START Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 80H Address 555H Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 10H Address 555H Data# Polling Algorithm or Toggle Bit Algorithm NO Data=FFh ? YES Auto Chip Erase Completed P/N:PM1076 REV. 1.8, FEB. 26, 2008 36 MX29LV640B T/B Figure 6. AUTOMATIC SECTOR ERASE TIMING WAVEFORM Read Status CE# Tch Twhwh2 Twp WE# Twph Tcs Tghwl OE# Tbal Last 2 Erase Command Cycle Twc Address Tas Sector Address 0 2AAh Tds Tdh 55h Sector Address 1 Sector Address n Tah VA VA In Progress Complete 30h 30h 30h Data Tbusy Trb RY/BY# P/N:PM1076 REV. 1.8, FEB. 26, 2008 37 MX29LV640B T/B Figure 7. AUTOMATIC SECTOR ERASE ALGORITHM FLOWCHART START Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 80H Address 555H Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 30H Sector Address Last Sector to Erase NO YES Data# Polling Algorithm or Toggle Bit Algorithm Data=FFh NO YES Auto Sector Erase Completed P/N:PM1076 REV. 1.8, FEB. 26, 2008 38 MX29LV640B T/B Figure 8. ERASE SUSPEND/RESUME FLOWCHART START Write Data B0H NO ERASE SUSPEND Toggle Bit checking Q6 not toggled YES Read Array or Program Reading or Programming End NO YES Write Data 30H ERASE RESUME Continue Erase Another Erase Suspend ? NO YES P/N:PM1076 REV. 1.8, FEB. 26, 2008 39 MX29LV640B T/B Figure 9. AUTOMATIC PROGRAM TIMING WAVEFORMS CE# Tch Twhwh1 Twp WE# Tcs Twph Tghwl OE# Last 2 Program Command Cycle 555h Address Last 2 Read Status Cycle Tah Tas VA PA Tds VA Tdh A0h Status PD DOUT Data Tbusy Trb RY/BY# Figure 10. Accelerated Program Timing Diagram (11.5V ~ 12.5V) Vhv WP#/ACC Vil or Vih Vil or Vih 250nS 250nS P/N:PM1076 REV. 1.8, FEB. 26, 2008 40 MX29LV640B T/B Figure 11. CE# CONTROLLED WRITE TIMING WAVEFORM WE# Twhwh1 or Twhwh2 Tcep CE# Tceph Tghwl OE# Tah Tas Address 555h VA PA Tds VA Tdh A0h Status PD DOUT Data Tbusy RY/BY# P/N:PM1076 REV. 1.8, FEB. 26, 2008 41 MX29LV640B T/B Figure 12. AUTOMATIC PROGRAMMING ALGORITHM FLOWCHART START Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data A0H Address 555H Write Program Data/Address Data# Polling Algorithm or Toggle Bit Algorithm next address Read Again Data: Program Data? No YES No Last Word to be Programed YES Auto Program Completed P/N:PM1076 REV. 1.8, FEB. 26, 2008 42 MX29LV640B T/B SECTOR GROUP PROTECT/CHIP UNPROTECT Figure 13. SECTOR GROUP PROTECT/CHIP UNPROTECT WAVEFORM (RESET# Control) 150uS: Sector Protect 15mS: Chip Unprotect 1us CE# WE# OE# Verification Data 60h SA, A6 A1, A0 60h 40h VA VA Status VA Vhv Vih RESET# VA: valid address P/N:PM1076 REV. 1.8, FEB. 26, 2008 43 MX29LV640B T/B Figure 14-1. IN-SYSTEM SECTOR GROUP PROTECT WITH RESET#=Vhv START Retry count=0 RESET#=Vhv Wait 1us Temporary Unprotect Mode No First CMD=60h? Yes Write Sector Address with [A6,A1,A0]:[0,1,0] data: 60h Wait 150us Reset PLSCNT=1 Write Sector Address with [A6,A1,A0]:[0,1,0] data: 40h Retry Count +1 Read at Sector Address with [A6,A1,A0]:[0,1,0] No No Retry Count=25? Data=01h? Yes Yes Device fail Protect another Yes sector? No Temporary Unprotect Mode RESET#=Vih Write RESET CMD Sector Protect Done P/N:PM1076 REV. 1.8, FEB. 26, 2008 44 MX29LV640B T/B Figure 14-2. CHIP UNPROTECT ALGORITHMS WITH RESET#=Vhv START Retry count=0 RESET#=Vhv Wait 1us Temporary Unprotect No First CMD=60h? Yes All sectors protected? No Protect All Sectors Yes Write [A6,A1,A0]:[1,1,0] data: 60h Wait 15ms Write [A6,A1,A0]:[1,1,0] data: 40h Retry Count +1 Read [A6,A1,A0]:[1,1,0] No No Retry Count=1000? Data=00h? Yes Device fail Yes Temporary Unprotect Write reset CMD Chip Unprotect Done P/N:PM1076 REV. 1.8, FEB. 26, 2008 45 MX29LV640B T/B Table 5. TEMPORARY SECTOR GROUP UNPROTECT Parameter Alt Description Condition Speed Unit Trpvhh Tvidr RESET# Rise Time to Vhv and Vhv Fall Time to RESET# MIN 500 ns Tvhhwl Trsp RESET# Vhv to WE# Low MIN 4 us Figure 15. TEMPORARY SECTOR GROUP UNPROTECT WAVEFORMS Program or Erase Command Sequence CE# WE# Tvhhwl RY/BY# Vhv 12V RESET# 0 or Vih Vil or Vih Trpvhh Trpvhh P/N:PM1076 REV. 1.8, FEB. 26, 2008 46 MX29LV640B T/B Figure 16. TEMPORARY SECTOR GROUP UNPROTECT FLOWCHART Start Apply Reset# pin Vhv Volt Enter Program or Erase Mode Mode Operation Completed (1) Remove Vhv Volt from Reset# (2) RESET# = Vih Completed Temporary Sector Unprotected Mode Notes: 1. Temporary unprotect all protected sectors Vhv=11.5~12.5V. 2. After leaving temporary unprotect mode, the previously protected sectors are again protected. P/N:PM1076 REV. 1.8, FEB. 26, 2008 47 MX29LV640B T/B Figure 17. SILICON ID READ TIMING WAVEFORM Vih CE# Vil Tce Vih WE# Vil Toe Vih OE# Tdf Vil Toh Toh Vhv Vih A9 Vil Vih A0 Vil Taa A1 Taa Vih Vil Vih ADD Vil DATA Q0-Q7 Vih DATA OUT DATA OUT Vil 00C2H 22C9H (TOP boot) 22CBH (Bottom boot) P/N:PM1076 REV. 1.8, FEB. 26, 2008 48 MX29LV640B T/B WRITE OPERATION STATUS Figure 18. DATA# POLLING TIMING WAVEFORMS (DURING AUTOMATIC ALGORITHMS) Tce CE# Tch WE# Toe OE# Toeh Tdf Trc Address VA VA Taa Toh Q7 Status Data Complement True Valid Data Q0-Q6 Status Data Status Data True Valid Data High Z High Z Tbusy RY/BY# P/N:PM1076 REV. 1.8, FEB. 26, 2008 49 MX29LV640B T/B Figure 19. DATA# POLLING ALGORITHM Start Read Q7~Q0 at valid address (Note 1) No Q7 = Data# ? Yes No Q5 = 1 ? Yes Read Q7~Q0 at valid address Q7 = Data# ? (Note 2) No Yes FAIL Pass Notes: 1. For programming, valid address means program address. For erasing, valid address means erase sectors address. 2. Q7 should be rechecked even Q5="1" because Q7 may change simultaneously with Q5. P/N:PM1076 REV. 1.8, FEB. 26, 2008 50 MX29LV640B T/B Figure 20. TOGGLE BIT TIMING WAVEFORMS (DURING AUTOMATIC ALGORITHMS) Tce CE# Tch WE# Toe OE# Toeh Tdf Trc Address VA VA VA VA Taa Toh Q6/Q2 Valid Status (first read) Valid Status Valid Data (second read) (stops toggling) Valid Data Tbusy RY/BY# VA : Valid Address P/N:PM1076 REV. 1.8, FEB. 26, 2008 51 MX29LV640B T/B Figure 21. TOGGLE BIT ALGORITHM Start Read Q7-Q0 Twice (Note 1) NO Q6 Toggle ? YES NO Q5 = 1? YES Read Q7~Q0 Twice NO Q6 Toggle ? YES PGM/ERS fail Write Reset CMD PGM/ERS Complete Notes: 1. Read toggle bit twice to determine whether or not it is toggling. 2. Recheck toggle bit because it may stop toggling as Q5 changes to "1". P/N:PM1076 REV. 1.8, FEB. 26, 2008 52 MX29LV640B T/B AC CHARACTERISTICS WORD/BYTE CONFIGURATION (BYTE#) Parameter Description Speed Unit -90 Telfl/Telfh CE# to BYTE# from L/H MAX 5 ns Tflqz BYTE# from L to Output Hiz MAX 30 ns Tfhqv BYTE# from H to Output Active MIN 90 ns Figure 22. BYTE# TIMING WAVEFORM FOR READ OPERATIONS (BYTE# switching from byte mode to word mode) CE# OE# Telfh BYTE# Q0~Q14 DOUT (Q0-Q7) Q15/A-1 VA DOUT (Q0-Q14) DOUT (Q15) Tfhqv P/N:PM1076 REV. 1.8, FEB. 26, 2008 53 MX29LV640B T/B RECOMMENDED OPERATING CONDITIONS At Device Power-Up AC timing illustrated in Figure A is recommended for the supply voltages and the control signals at device power-up. If the timing in the figure is ignored, the device may not operate correctly. Vcc(min) Vcc GND Tvr Tvcs Tf Tce Tr Vih CE# Vil Vih WE# Vil Tf Toe Tr Vih OE# Vil Tr or Tf Vih ADDRESS Tr or Tf Valid Address Vil Voh DATA Taa High Z Valid Ouput Vol Vih WP#/ACC Vil Figure A. AC Timing at Device Power-Up Symbol Parameter Min. Max. Unit Tvr Vcc Rise Time 20 500000 us/V Tr Input Signal Rise Time 20 us/V Tf Input Signal Fall Time 20 us/V P/N:PM1076 REV. 1.8, FEB. 26, 2008 54 MX29LV640B T/B ERASE AND PROGRAMMING PERFORMANCE LIMITS PARAMETER MIN. TYP. Chip Erase Time 45 Sector Erase Time 0.9 Erase/Program Cycles MAX. UNITS sec 15 sec 100,000 Chip Programming Time Cycles Byte Mode 50 160 sec Word Mode 45 140 sec Accelerated Byte/Word Program Time 7 210 us Word Program Time 11 360 us Byte Programming Time 9 300 us LATCH-UP CHARACTERISTICS MIN. MAX. Input Voltage voltage difference with GND on all pins except I/O pins -1.0V 12.5V Input Voltage voltage difference with GND on all I/O pins -1.0V Vcc + 1.0V -100mA +100mA Vcc Current All pins included except Vcc. Test conditions: Vcc = 3.0V, one pin per testing TSOP PIN CAPACITANCE Parameter Symbol Parameter Description Test Set TYP MAX UNIT CIN2 Control Pin Capacitance VIN=0 7.5 9 pF COUT Output Capacitance VOUT=0 8.5 12 pF CIN Input Capacitance VIN=0 6 7.5 pF P/N:PM1076 REV. 1.8, FEB. 26, 2008 55 MX29LV640B T/B ORDERING INFORMATION PART NO. ACCESS TIME Ball Pitch/ (ns) Ball size PACKAGE Remark MX29LV640BTMC-90G 90 44 Pin SOP Pb-free MX29LV640BBMC-90G 90 44 Pin SOP Pb-free MX29LV640BTTC-90G 90 48 Pin TSOP(Normal Type) Pb-free MX29LV640BBTC-90G 90 48 Pin TSOP(Normal Type) Pb-free MX29LV640BTXEC-90G 90 0.8mm/0.4mm 48 Ball CSP Pb-free MX29LV640BBXEC-90G 90 0.8mm/0.4mm 48 Ball CSP Pb-free Note 1: The part no. is not recommended for new design in. P/N:PM1076 REV. 1.8, FEB. 26, 2008 56 MX29LV640B T/B PART NAME DESCRIPTION MX 29 LV 640 B T T C 90 G OPTION: G: Lead-free package SPEED: 90: 90ns TEMPERATURE RANGE: C: Commercial (0˚CC to 70˚ C PACKAGE: M:SOP T: TSOP X: FBGA (CSP) XE - 0.4mm Ball BOOT BLOCK TYPE: T: Top Boot B: Bottom Boot REVISION: B DENSITY & MODE: 640: 64M x8/x16 Boot Block TYPE: LV: 3V DEVICE: 29:Flash P/N:PM1076 REV. 1.8, FEB. 26, 2008 57 MX29LV640B T/B PACKAGE INFORMATION P/N:PM1076 REV. 1.8, FEB. 26, 2008 58 MX29LV640B T/B P/N:PM1076 REV. 1.8, FEB. 26, 2008 59 MX29LV640B T/B REVISION HISTORY Revision No. 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 Description 1. Removed "Preliminary" 1. Added "BYTE#" in Pin Description & Logic Symbol 1. Modified "RESET# TIMING WAVEFORM" 1. Datasheet format changed 1. Data modification 1. Chip Erase Time modification 1. Added statement 1. Added recommedation for non RoHS compliant devices 2. Modified sector erase resume: 400uS --> 4mS 1. Modified Figure 11. CE# Controlled Write Timing Waveform P/N:PM1076 Page P1 P4 P38 All All P55 P61 P1,56 P24 P41 Date MAR/08/2005 MAR/22/2005 SEP/07/2005 AUG/15/2006 AUG/17/2006 OCT/30/2006 NOV/06/2006 JAN/24/2007 FEB/26/2008 REV. 1.8, FEB. 26, 2008 60 MX29LV640B T/B Macronix's products are not designed, manufactured, or intended for use for any high risk applications in which the failure of a single component could cause death, personal injury, severe physical damage, or other substantial harm to persons or property, such as life-support systems, high temperature automotive, medical, aircraft and military application. Macronix and its suppliers will not be liable to you and/or any third party for any claims, injuries or damages that may be incurred due to use of Macronix's products in the prohibited applications. MACRONIX INTERNATIONAL CO., LTD. Headquarters Macronix, Int'l Co., Ltd. Taipei Office Macronix, Int'l Co., Ltd. 16, Li-Hsin Road, Science Park, Hsinchu, Taiwan, R.O.C. Tel: +886-3-5786688 Fax: +886-3-5632888 19F, 4, Min-Chuan E. Road, Sec. 3, Taipei, Taiwan, R.O.C. Tel: +886-2-2509-3300 Fax: +886-2-2509-2200 Macronix America, Inc. Macronix Europe N.V. 680 North McCarthy Blvd. Milpitas, CA 95035, U.S.A. Tel: +1-408-262-8887 Fax: +1-408-262-8810 Email: [email protected] Koningin Astridlaan 59, Bus 1 1780 Wemmel Belgium Tel: +32-2-456-8020 Fax: +32-2-456-8021 Macronix Japan Cayman Islands Ltd. Singapore Office Macronix Pte. Ltd. NKF Bldg. 5F, 1-2 Higashida-cho, Kawasaki-ku Kawasaki-shi, Kanagawa Pref. 210-0005, Japan Tel: +81-44-246-9100 Fax: +81-44-246-9105 1 Marine Parade Central #11-03 Parkway Centre Singapore 449408 Tel: +65-6346-5505 Fax: +65-6348-8096 Macronix (Hong Kong) Co., Limited. 702-703, 7/F, Building 9, Hong Kong Science Park, 5 Science Park West Avenue, Sha Tin, N.T. Tel: +86-852-2607-4289 Fax: +86-852-2607-4229 http : //www.macronix.com MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice. 61