LESHAN RADIO COMPANY, LTD. LESD5L3.3T1G Transient Voltage Suppressors LESD5L3.3T1G ESD Protection Diodes with Ultra−Low Capacitance 1 The ESD5L is designed to protect voltage sensitive components that require ultra−low capacitance from ESD and transient voltage events. Excellent clamping capability, low capacitance, low leakage, and fast response time, make these parts ideal for ESD protection on designs where board space is at a premium. Because of its low capacitance, it is suited for use in high frequency designs such as USB 2.0 high speed and antenna line applications. 2 SOD– 523 Specification Features: • Ultra Low Capacitance 0.5 pF • Low Clamping Voltage • Small Body Outline Dimensions: • • • • • • 1 0.047″ x 0.032″ (1.20 mm x 0.80 mm) Low Body Height: 0.024″ (0.6 mm) Stand−off Voltage: 5 V Low Leakage Response Time is Typically < 1.0 ns IEC61000−4−2 Level 4 ESD Protection This is a Pb−Free Device 2 PIN 1. CATHODE 2. ANODE Ordering information Mechanical Characteristics: CASE: Void-free, transfer-molded, thermosetting plastic Device Marking Shipping LESD5L5.0T1G 3L 3000/Tape&Reel Epoxy Meets UL 94 V−0 LEAD FINISH: 100% Matte Sn (Tin) QUALIFIED MAX REFLOW TEMPERATURE: 260°C Device Meets MSL 1 Requirements MAXIMUM RATINGS Rating IEC 61000−4−2 (ESD) Symbol Contact Air Value Unit ±10 ±15 kV Total Power Dissipation on FR−5 Board (Note 1) @ TA = 25°C °PD° 200 mW Storage Temperature Range Tstg −55 to +150 °C Junction Temperature Range TJ −55 to +125 °C Lead Solder Temperature − Maximum (10 Second Duration) TL 260 °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. FR−5 = 1.0 x 0.75 x 0.62 in. 1/4 LESHAN RADIO COMPANY, LTD. LESD5L3.3T1G ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) Symbol I Parameter IF IPP Maximum Reverse Peak Pulse Current VC Clamping Voltage @ IPP VRWM IR Working Peak Reverse Voltage VBR Breakdown Voltage @ IT IT Test Current IF Forward Current VF Forward Voltage @ IF Ppk Peak Power Dissipation C VC VBR VRWM Maximum Reverse Leakage Current @ VRWM V IR VF IT IPP Uni−Directional TVS Capacitance @ VR = 0 and f = 1.0 MHz *See Application Note AND8308/D for detailed explanations of datasheet parameters. ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted, VF = 1.0 V Max. @ IF = 10 mA for all types) VRWM (V) IR (mA) @ VRWM VBR (V) @ IT (Note 2) IT C (pF) VC (V) @ IPP = 1 A (Note 3) VC Per IEC61000−4−2 (Note 4) Device Device Marking Max Max Min mA Typ Max Max LESD5L3.3T1G 3L 3.3 1.0 5.0 1.0 0.5 0.9 9.5 Figures 1 and 2 See Below 2. VBR is measured with a pulse test current IT at an ambient temperature of 25°C. 3. Surge current waveform per Figure 5. 4. For test procedure see Figures 3 and 4 and Application Note AND8307/D. Figure 1. ESD Clamping Voltage Screenshot Positive 8 kV Contact per IEC61000−4−2 Figure 2. ESD Clamping Voltage Screenshot Negative 8 kV Contact per IEC61000−4−2 2/4 LESHAN RADIO COMPANY, LTD. LESD5L3.3T1G IEC61000−4−2 Waveform IEC 61000−4−2 Spec. Ipeak Level Test Voltage (kV) First Peak Current (A) Current at 30 ns (A) Current at 60 ns (A) 1 2 7.5 4 2 2 4 15 8 4 3 6 22.5 12 6 4 8 30 16 8 100% 90% I @ 30 ns I @ 60 ns 10% tP = 0.7 ns to 1 ns Figure 3. IEC61000−4−2 Spec ESD Gun Oscilloscope TVS 50 W Cable 50 W Figure 4. Diagram of ESD Test Setup The following is taken from Application Note AND8308/D − Interpretation of Datasheet Parameters for ESD Devices. ESD Voltage Clamping For sensitive circuit elements it is important to limit the voltage that an IC will be exposed to during an ESD event to as low a voltage as possible. The ESD clamping voltage is the voltage drop across the ESD protection diode during an ESD event per the IEC61000−4−2 waveform. Since the IEC61000−4−2 was written as a pass/fail spec for larger % OF PEAK PULSE CURRENT 100 PEAK VALUE IRSM @ 8 ms tr 90 systems such as cell phones or laptop computers it is not clearly defined in the spec how to specify a clamping voltage at the device level. ON Semiconductor has developed a way to examine the entire voltage waveform across the ESD protection diode over the time domain of an ESD pulse in the form of an oscilloscope screenshot, which can be found on the datasheets for all ESD protection diodes. For more information on how ON Semiconductor creates these screenshots and how to interpret them please refer to AND8307/D. PULSE WIDTH (tP) IS DEFINED AS THAT POINT WHERE THE PEAK CURRENT DECAY = 8 ms 80 70 60 HALF VALUE IRSM/2 @ 20 ms 50 40 30 tP 20 10 0 0 20 40 t, TIME (ms) 60 80 Figure 5. 8 X 20 ms Pulse Waveform 3/4 LESHAN RADIO COMPANY, LTD. LESD5L3.3T1G SOD−523 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. −X− A −Y− B 1 2 DIM A B C D J K S D 2 PL 0.08 (0.003) M T X Y MILLIMETERS MIN NOM MAX 1.10 1.20 1.30 0.70 0.80 0.90 0.50 0.60 0.70 0.25 0.30 0.35 0.07 0.14 0.20 0.15 0.20 0.25 1.50 1.60 1.70 MIN 0.043 0.028 0.020 0.010 0.0028 0.006 0.059 INCHES NOM MAX 0.047 0.051 0.032 0.035 0.024 0.028 0.012 0.014 0.0055 0.0079 0.008 0.010 0.063 0.067 C K J S −T− SEATING PLANE SOLDERING FOOTPRINT* 1.40 0.0547 0.40 0.0157 0.40 0.0157 SCALE 10:1 mm Ǔ ǒinches 4/4