Application Note 1816 ISL9113ERAZ-EVZ, ISL9113ER7Z-EVZ Evaluation Board User Guide Evaluation Board Features 100 • Input voltage rating from 0.8V to 4.7V • Output Current: Up to 500mA (VBAT = 3.0V, VOUT = 5.0V) • Up to 95% efficiency at typical operating conditions • 1.8MHz switching frequency VBAT = 3.6V 90 EFFICIENCY (%) • ISL9113 is a low input voltage, high efficiency boost regulator with fixed 5.0V and adjustable output voltage options VBAT = 4.2V VBAT = 3.0V 80 VBAT = 2.3V VBAT = 1.2V 70 60 • Jumper selectable EN (enabled/disabled) • Jumper selectable for LED indication during FAULT conditions 50 0.0001 0.001 • Connectors, test points and jumpers for easy evaluation 0.01 0.1 1 LOAD CURRENT - ILOAD (A) FIGURE 1. ISL9113ERAZ EFFICIENCY (VOUT = 5.0V) Required Equipment VBAT = 3.0V, VOUT = 5.0V, ILOAD = 50mA • Power supply capable of delivering up to 5.5V and 2A • Electronic load EN (5V/DIV) • Multimeter to measure voltages and currents • Oscilloscope • Test points, connectors and jumpers VOUT (2V/DIV) Quick Setup Guide 1. Connect power supply to J1, with voltage setting between 0.8V and 4.7V. 2. Connect electronic load to J3. INDUCTOR CURRENT (500mA/DIV) 3. Place scope probes on VOUT test point (TP2), and other test points of interest. SW(5V/DIV) 4. Turn on the power supply. TIME 40ms/DIV FIGURE 2. START-UP AFTER ENABLE (ILOAD = 50mA) 5. At J2, assert EN pin HIGH to enable the device. 6. Monitor the output voltage start-up sequence on the scope. The waveforms will look similar to Figure 2. 7. Turn on the electronic load. 8. Measure the output voltage with the voltmeter. The voltage should regulate within data sheet specification limits (FN8313). TABLE 1. DESCRIPTION OF CONNECTORS CONNECTOR DESCRIPTION J1 Input supply J2 Enable/Disable device J3 Output voltage TABLE 2. DESCRIPTION OF TEST POINTS TEST POINT DESCRIPTION TP1, TP6, TP8 GND January 9, 2013 AN1816.0 1 TP2 VOUT TP4 VFAULT TP5 EN TP9 SW CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2013. All Rights Reserved Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners. Application Note 1816 Output Voltage Programming (ADJ Version) Output Voltage Setting Resistor Selection The voltage divider resistors, R1 and R2, as shown in the evaluation board schematic for the ADJ version, set the desired output voltage values. The output voltage can be calculated using Equation 1: R1 V OUT = V FB • ⎛ 1 + -------⎞ ⎝ R2⎠ (EQ. 1) where VFB is the internal feedback reference voltage (0.8V typical). The current flowing through the divider resistors is calculated as VO/(R1 + R2). Large resistance is recommended to minimize the current into the divider; thus improving the total efficiency of the converter. Evaluation Board Schematics TP2 VOUT TP7 VBAT J1 2 1 L1 C1 CON2 8 SW VOUT 2.2µH SW 7 VBAT FB C3 4.7µF/10V DNP TP1 J2 1 2 3 3 TP5 EN GND C2 4.7µF/10V U1 TP9 5 NC EN 2 TP8 GND J3 1 2 CON2 R1 787kΩ 4 PGND 1 AGND 6 R2 150kΩ TP6 GND CON3 ISL9113ERAZ FIGURE 3. ISL9113ERAZ-EVZ EVALUATION BOARD SCHEMATIC TP4 /FAULT R4 TP2 VOUT TP7 VBAT J1 2 1 C1 CON2 U1 TP9 2 8 VOUT SW 2.2µH SW 7 4 VBAT /FAULT L1 C3 4.7µF/10V DNP TP1 J2 1 2 3 TP5 EN GND 3 NC PGND 1 5 EN AGND 6 D1 R3 VFAULT 1kΩ 0Ω LED-SMT C2 4.7µF/10V TP8 GND J3 1 2 CON2 TP6 GND CON3 ISL9113ER7Z FIGURE 4. ISL9113ER7Z-EVZ EVALUATION BOARD SCHEMATIC 2 AN1816.0 January 9, 2013 Application Note 1816 TABLE 3. ISL9113ERAZ-EVZ EVALUATION BOARD BILL OF MATERIALS ITEM# QTY DESIGNATORS VALUE PART NUMBER FOOTPRINT DESCRIPTION VENDORS 1 1 U1 - ISL9113ERAZ 8-Ld DFN Boost Regulator Intersil 2 1 L1 2.2µH LQH32PN2R2NN0 1210 Inductor, 1600mA, ±30% Murata 3 2 C1, C2 4.7µF C1608X5R1A475K 0603 Capacitor Ceramic, X5R, 10V, ±10% Murata 4 1 C3 Place Holder - 0805 - - 5 1 R1 787kΩ CRCW0402787KFKTD 0402 Resistor, 1/16W, 1% Vishay Dale 6 1 R2 150kΩ RC0402FR-07150KL 0402 Resistor, 1/16W, 1% Yageo 7 6 TP1, TP2, TP5, TP6, TP8, TP9 Power Post - - Connectors Any 8 2 JP1, JP2, JP3 Jumper - HDR-3 - Any TABLE 4. ISL9113ER7Z-EVZ EVALUATION BOARD BILL OF MATERIALS ITEM# QTY DESIGNATORS VALUE PART NUMBER FOOTPRINT DESCRIPTION VENDORS 1 1 U1 - ISL9113ER7Z 8-Ld DFN Boost Regulator Intersil 2 1 L1 2.2µH LQH32PN2R2NN0 1210 Inductor, 1600mA, ±30% Murata 3 2 C1, C2 4.7µF C1608X5R1A475K 0603 Capacitor Ceramic, X5R, 10V, ±10% Murata 4 1 C3 Place Holder - 0805 - - 5 2 R3 1kΩ CR0603-16W-1001FT 0603 Resistor, Generic Venkel 6 1 R4 0Ω ERJ-2GE0R00X 0603 Resistor, Generic Panasonic 7 1 D1 LED 160-1181-1-ND 0603 LED, RED, SMD Lite-On 8 6 TP1, TP2, TP4, TP5, TP6, TP8, TP9 Power Post - - Connectors Any 9 2 JP1, JP2, JP3 Jumper - HDR-3 - Any 3 AN1816.0 January 9, 2013 Application Note 1816 Evaluation Board Layout FIGURE 5. SILKSCREEN TOP FIGURE 6. TOP COPPER 4 AN1816.0 January 9, 2013 Application Note 1816 Evaluation Board Layout (Continued) FIGURE 7. BOTTOM COPPER Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that the Application Note or Technical Brief is current before proceeding. For information regarding Intersil Corporation and its products, see www.intersil.com 5 AN1816.0 January 9, 2013