SIGNS R NEW DE O F D E D N PART MME ACEMENT NOT RECO L P E R D E ND RECOMME ISL97519A 600kHz/1.2MHz PWM Step-Up Regulator ISL97516 Features The ISL97516 is a high frequency, high efficiency step-up voltage regulator operated at constant frequency PWM mode. With a 2.0A typical switch current limit and 200m MOSFET, it can deliver over 90% efficiency. The selectable 600kHz and 1.2MHz allows smaller inductors and faster transient response. An external compensation pin gives the user greater flexibility in setting frequency compensation allowing for the use of low ESR Ceramic output capacitors. • >90% Efficiency When shut down, it draws <1µA of current and can operate down to 2.3V input supply. These features along with 1.2MHz switching frequency make it an ideal device for portable equipment and TFT-LCD displays. • Internal Thermal Protection • 2.0A, 200m Power MOSFET • 2.3V to 5.5V Input • 1.1*VIN to 25V Output • 600kHz/1.2MHz Switching Frequency Selection • Adjustable Soft-Start • 1.1mm Max Height 8 Ld MSOP Package • Pb-free (RoHS compliant) Applications The ISL97516 is available in an 8 Ld MSOP package with a maximum height of 1.1mm. The device is specified for operation over the full -40°C to +85°C temperature range. • TFT-LCD displays • DSL modems • PCMCIA cards • Digital cameras • GSM/CDMA phones • Portable equipment • Handheld devices EN FSEL REFERENCE GENERATOR VDD OSCILLATOR SS SHUTDOWN AND START-UP CONTROL LX PWM LOGIC CONTROLLER FET DRIVER COMPARATOR CURRENT SENSE GND FB GM AMPLIFIER COMP FIGURE 1. BLOCK DIAGRAM March 28, 2014 FN9261.6 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas Inc. 2006-2010, 2014. All Rights Reserved Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners. ISL97516 Pin Configuration ISL97516 (8 LD MSOP) TOP VIEW COMP 1 8 SS FB 2 7 FSEL EN 3 6 VDD GND 4 5 LX Pin Descriptions PIN NUMBER PIN NAME DESCRIPTION 1 COMP 2 FB Voltage feedback pin. Internal reference is 1.294V nominal. Connect a resistor divider from VOUT. VOUT = 1.294V (1 + R1/R2). See “Typical Application Circuit” on page 2. 3 EN Shutdown control pin. Pull EN low to turn off the device. 4 GND 5 LX 6 VDD Analog power supply input pin. 7 FSEL Frequency select pin. When FSEL is set low, switching frequency is set to 620kHz. When connected to high or VDD, switching frequency is set to 1.25MHz. 8 SS Compensation pin. Output of the internal error amplifier. Capacitor and resistor from COMP pin to ground. Analog and power ground. Power switch pin. Connected to the drain of the internal power MOSFET. Soft-start control pin. Connect a capacitor to control the converter start-up. Typical Application Circuit R3 3.9k C5 4.7nF 1 COMP R1 SS 8 85.2k R2 10k 2 FB FSEL 7 3 EN VDD 6 4 GND LX 5 C3 27nF + C1 0.1µF 22µF 2.3V TO 5.5V C4 S1 10µH D1 + C2 22µF 12V Ordering Information PART NUMBER (Notes 2, 3) PART MARKING PACKAGE (Pb-free) PKG. DWG. # ISL97516IUZ 7516Z 8 Ld MSOP M8.118A ISL97516IUZ-T (Note 1) 7516Z 8 Ld MSOP M8.118A ISL97516IUZ-TK (Note 1) 7516Z 8 Ld MSOP M8.118A NOTES: 1. Please refer to TB347 for details on reel specifications. 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), please see device information page for ISL97516. For more information on MSL please see techbrief TB363. Submit Document Feedback 2 FN9261.6 March 28, 2014 ISL97516 Absolute Maximum Ratings (TA = +25°C) Thermal Information LX to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27V VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6.5V COMP, FB, EN, SS, FSEL to GND . . . . . . . . . . . . . . . . . . -0.3V to (VDD +0.3V) Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C Operating Ambient Temperature . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . .+135°C Power Dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA Electrical Specifications temperature range, -40°C to +85°C. PARAMETER VIN = 3.3V, VOUT = 12V, IOUT = 0mA, FSEL = GND, TA = -40°C to +85°C. Boldface limits apply over the operating DESCRIPTION CONDITIONS MIN (Note 4) TYP MAX (Note 4) UNIT 1 5 µA IQ1 Quiescent Current - Shutdown EN = 0V IQ2 Quiescent Current - Not Switching EN = VDD, FB = 1.3V 0.7 IQ3 Quiescent Current - Switching EN = VDD, FB = 1.0V 3 4 mA VFB Feedback Voltage 1.294 1.309 V IB-FB Feedback Input Bias Current 0.5 µA VDD Input Voltage Range 5.5 V 1.272 0.01 2.3 DMAX - 600kHz Maximum Duty Cycle FSEL = 0V DMAX - 1.2MHz Maximum Duty Cycle FSEL = VDD 85 mA 92 % 85 90 % 1.7 2.0 A ILIM Current Limit - Max Peak Input Current IEN Shutdown Input Bias Current EN = 0V rDS(ON) Switch ON-Resistance VDD = 2.7V, ILX = 1A 0.2 ILX-LEAK Switch Leakage Current VSW = 27V 0.01 VOUT/VIN Line Regulation 3V < VIN < 5.5V, VOUT = 12V 0.2 VOUT/IOUT 0.01 0.5 µA 3 µA % Load Regulation VIN = 3.3V, VOUT = 12V, IO = 30mA to 200mA fOSC1 Switching Frequency Accuracy FSEL = 0V 500 620 740 kHz fOSC2 Switching Frequency Accuracy FSEL = VDD 1000 1250 1500 kHz VIL EN, FSEL Input Low Level VIH EN, FSEL Input High Level GM Error Amp Tranconductance VDD-ON VDD UVLO On Threshold HYS VDD UVLO Hysteresis ISS Soft-Start Charge Current OTP Over-Temperature Protection 0.3 % 0.5 1.5 I = 5µA 70 2.1 130 150 2.2 2.3 100 4 V V 6 150 1µ/ V mV 8 µA °C NOTE: 4. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested. Submit Document Feedback 3 FN9261.6 March 28, 2014 ISL97516 Typical Performance Curves 95 92 90 90 VIN = 3.3V, VO = 9V, fs = 620kHz EFFICIENCY (%) EFFICIENCY (%) 88 85 VIN = 5V, VO = 12V, fs = 1.25MHz 80 VIN = 5V, VO = 12V, fs = 620kHz 75 VIN = 5V, VO = 9V, fs = 620kHz 70 86 84 82 VIN = 3.3V, VO = 12V, fs = 620kHz VIN = 3.3V, VO = 12V, 80 78 65 VIN = 5V, VO = 9V, fs = 1.25MHz fs = 1.25MHz VIN = 3.3V, VO = 9V, fs = 1.25MHz 76 74 60 0 200 400 600 800 0 1000 100 FIGURE 2. BOOST EFFICIENCY vs IOUT 300 0.7 VIN = 5V, VO = 12V, 0.8 VIN = 5V, VO = 9V, fs = 1.25MHz fs = 1.25MHz 0.6 LOAD REGULATION (%) 0.7 0.6 VIN = 5V, VO = 9V, fs = 620kHz 0.5 0.4 0.3 0.2 VIN = 5V, VO = 12V, fs = 620kHz 0.1 400 500 FIGURE 3. BOOST EFFICIENCY vs IOUT 0.9 LOAD REGULATION (%) 200 IOUT (mA) IOUT (mA) VIN = 3.3V, VO = 12V, VIN = 3.3V, VO = 9V, fs = 1.25MHz fs = 1.25MHz 0.5 VIN = 3.3, VO = 9V, fs = 1.25kHz 0.4 0.3 0.2 0.1 VIN = 3.3, VO = 12V, fs = 620kHz 0 0 0 200 400 600 800 1000 0 100 IOUT (mA) 200 300 400 500 IOUT (mA) FIGURE 4. LOAD REGULATION vs IOUT FIGURE 5. LOAD REGULATION vs IOUT 0.6 VO = 12V IO = 50mA TO 300mA LINE REGULATION (%) 0.5 0.4 VO = 9V, IO = 100mA fs = 620kHz 0.3 VIN = 3.3V fs = 600kHz VO = 12V, IO = 80mA fs = 1.25MHz 0.2 0.1 VO = 9V, IO = 80mA 0 VO = 12V, IO = 80mA fs = 1.25MHz fs = 620kHz -0.1 2 3 4 5 FIGURE 6. LINE REGULATION vs VIN Submit Document Feedback 4 6 FIGURE 7. TRANSIENT RESPONSE FN9261.6 March 28, 2014 ISL97516 Typical Performance Curves (Continued) JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD IO = 50mA TO 300mA 1.0 VO = 12V VIN = 3.3V POWER DISSIPATION (W) 0.9 fs = 1.2MHz 870mW 0.8 0.7 JA = 0.6 0.5 0.4 M SO +1 P8 15 °C /W 0.3 0.2 0.1 0 0 25 50 75 85 100 125 AMBIENT TEMPERATURE (°C) FIGURE 8. TRANSIENT RESPONSE FIGURE 9. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE JEDEC JESD51-3 LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD POWER DISSIPATION (W) 0.6 0.5 486mW 0.4 JA = 0.3 M SO +2 P 8 06 °C /W 0.2 0.1 0.0 0 25 50 75 85 100 125 AMBIENT TEMPERATURE (°C) FIGURE 10. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE Applications Information The ISL97516 is a high frequency, high efficiency boost regulator operated at constant frequency PWM mode. The boost converter stores energy from an input voltage source and deliver it to a higher output voltage. The input voltage range is 2.3V to 5.5V and output voltage range is 5V to 25V. The switching frequency is selectable between 600kHz and 1.2MHz allowing smaller inductors and faster transient response. An external compensation pin gives the user greater flexibility in setting output transient response and tighter load regulation. The converter soft-start characteristic can also be controlled by external CSS capacitor. The EN pin allows the user to completely shutdown the device. Boost Converter Operations Figure 11 shows a boost converter with all the key components. In steady state operating and continuous conduction mode where the inductor current is continuous, the boost converter operates in two cycles. During the first cycle, Submit Document Feedback 5 as shown in Figure 12, the internal power FET turns on and the Schottky diode is reverse biased and cuts off the current flow to the output. The output current is supplied from the output capacitor. The voltage across the inductor is VIN and the inductor current ramps up in a rate of VIN/L, L is the inductance. The inductance is magnetized and energy is stored in the inductor. The change in inductor current is shown in Equation 1: V IN I L1 = t1 --------L D t1 = ---------f SW D = Duty Cycle I OUT V O = ---------------- t 1 C OUT (EQ. 1) FN9261.6 March 28, 2014 ISL97516 During the second cycle, the power FET turns off and the Schottky diode is forward biased, (Figure 13). The energy stored in the inductor is pumped to the output supplying output current and charging the output capacitor. The Schottky diode side of the inductor is clamp to a Schottky diode above the output voltage. So the voltage drop across the inductor is VIN - VOUT. The change in inductor current during the second cycle is: L D VOUT VIN COUT CIN ISL97516 IL IL2 V IN – V OUT I L = t2 -------------------------------L T2 VO 1–D t2 = ------------f SW (EQ. 2) For stable operation, the same amount of energy stored in the inductor must be taken out. The change in inductor current during the two cycles must be the same. I1 + I2 = 0 V IN 1 – D V IN – V OUT D ---------- --------+ ------------- -------------------------------- = 0 L f SW L f SW V OUT 1 ---------------- = ------------1–D V IN (EQ. 3) L FIGURE 13. BOOST CONVERTER - CYCLE 2, POWER SWITCH OPEN Output Voltage An external feedback resistor divider is required to divide the output voltage down to the nominal 1.294V reference voltage. The current drawn by the resistor network should be limited to maintain the overall converter efficiency. The maximum value of the resistor network is limited by the feedback input bias current and the potential for noise being coupled into the feedback pin. A resistor network less than 100k is recommended. The boost converter output voltage is determined by the relationship in Equation 4: R 1 V OUT = V FB 1 + ------- R 2 D VOUT VIN CIN COUT (EQ. 4) The nominal VFB voltage is 1.294V. Inductor Selection ISL97516 FIGURE 11. BOOST CONVERTER L VOUT VIN COUT CIN The inductor selection determines the output ripple voltage, transient response, output current capability, and efficiency. Its selection depends on the input voltage, output voltage, switching frequency, and maximum output current. For most applications, the inductance should be in the range of 2µH to 33µH. The inductor maximum DC current specification must be greater than the peak inductor current required by the regulator. The peak inductor current can be calculated using Equation 5: I OUT V OUT V IN V OUT – V IN I L PEAK = ------------------------------------ + 1 2 ----------------------------------------------------V IN L V OUT FREQ (EQ. 5) ISL97516 Output Capacitor IL IL1 t1 VO FIGURE 12. BOOST CONVERTER - CYCLE 1, POWER SWITCH CLOSED Low ESR capacitors should be used to minimize the output voltage ripple. Multilayer ceramic capacitors (X5R and X7R) are preferred for the output capacitors because of their lower ESR and small packages. Tantalum capacitors with higher ESR can also be used. The output ripple can be calculated in Equation 6: I OUT D V O = ------------------------- + I OUT ESR f SW C O (EQ. 6) For noise sensitive applications, a 0.1µF placed in parallel with the larger output capacitor is recommended to reduce the switching noise coupled from the LX switching node. Submit Document Feedback 6 FN9261.6 March 28, 2014 ISL97516 Schottky Diode Maximum Output Current In selecting the Schottky diode, the reverse break down voltage, forward current and forward voltage drop must be considered for optimum converter performance. The diode must be rated to handle 2.0A, the current limit of the ISL97516. The breakdown voltage must exceed the maximum output voltage. Low forward voltage drop, low leakage current, and fast reverse recovery will help the converter to achieve the maximum efficiency. The MOSFET current limit is nominally 2.0A and guaranteed 1.7A. This restricts the maximum output current, IOMAX, based on Equation 7: Input Capacitor The value of the input capacitor depends upon the input and output voltages, the maximum output current, the inductor value and the noise allowed to put back on the input line. For most applications, a minimum 10µF is required. For applications that run close to the maximum output current limit, input capacitor in the range of 22µF to 47µF is recommended. The ISL97516 is powered from the VIN. A High frequency 0.1µF bypass capacitor is recommended to be close to the VIN pin to reduce supply line noise and ensure stable operation. Loop Compensation I L = I L-AVG + 1 2 I L (EQ. 7) where: IL = MOSFET current limit IL-AVG = average inductor current IL = inductor ripple current V IN V O + V DIODE – V IN I L = -----------------------------------------------------------------------------L V O + V DIODE f S (EQ. 8) VDIODE = Schottky diode forward voltage, typically, 0.6V fS = switching frequency, 600kHz or 1.2MHz I OUT I L-AVG = ------------1–D (EQ. 9) D = MOSFET turn-on ratio: The ISL97516 incorporates a transconductance amplifier in its feedback path to allow the user some adjustment on the transient response and better regulation. The ISL97516 uses current mode control architecture, which has a fast current sense loop and a slow voltage feedback loop. The fast current feedback loop does not require any compensation. The slow voltage loop must be compensated for stable operation. The compensation network is a series RC network from COMP pin to ground. The resistor sets the high frequency integrator gain for fast transient response and the capacitor sets the integrator zero to ensure loop stability. For most applications, the compensation resistor in the range of 2k to 7.5k and the compensation capacitor in the range of 3nF to 10nF. Soft-Start The soft-start is provided by an internal 6µA current source which charges the external CSS; the peak MOSFET current is limited by the voltage on the capacitor. This in turn controls the rising rate of the output voltage. The regulator goes through the start-up sequence as well after the EN pin is pulled to HI. For most applications, the external CSS of 27nF is recommended. V IN D = 1 – -------------------------------------------V OUT + V DIODE (EQ. 10) Table 1 gives typical maximum IOUT values for 1.2MHz switching frequency and 10µH inductor. TABLE 1. VIN (V) VOUT (V) IOMAX (mA) 2.5 5 870 2.5 9 500 2.5 12 380 3.3 5 1150 3.3 9 655 3.3 12 500 5 9 990 5 12 750 Frequency Selection Cascaded MOSFET Application The ISL97516 switching frequency can be user selected to operate at either constant 620kHz or 1.25MHz. Connecting FSEL pin to ground sets the PWM switching frequency to 620kHz. When connecting FSEL high or VDD, the switching frequency is set to 1.25MHz. An 25V N-Channel MOSFET is integrated in the boost regulator. For the applications where the output voltage is greater than 25V, an external cascaded MOSFET is needed as shown in Figure 13. The voltage rating of the external MOSFET should be greater than AVDD. Shutdown Control When the EN pin is pulled down, the ISL97516 is shutdown reducing the supply current to <1µA. Submit Document Feedback 7 FN9261.6 March 28, 2014 ISL97516 AVDD VIN LX FB INTERSIL ISL97516 DC PATH BLOCK APPLICATION Note that there is a DC path in the boost converter from the input to the output through the inductor and diode, hence the input voltage will be seen at output with a forward voltage drop of diode before the part is enabled. If this voltage is not desired, the following circuit can be inserted between input and inductor to disconnect the DC path when the part is disabled. TO INDUCTOR INPUT EN FIGURE 14. CASCADED MOSFET TOPOLOGY FOR HIGH OUTPUT VOLTAGE APPLICATIONS FIGURE 15. CIRCUIT TO DISCONNECT THE DC PATH OF BOOST CONVERTER For additional products, see www.intersil.com/en/products.html Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted in the quality certifications found at www.intersil.com/en/support/qualandreliability.html Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com Submit Document Feedback 8 FN9261.6 March 28, 2014 ISL97516 Package Outline Drawing M8.118A 8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE (MSOP) Rev 0, 9/09 A 3.0±0.1 8 0.25 CAB 3.0±0.1 4.9±0.15 DETAIL "X" 1.10 Max PIN# 1 ID B SIDE VIEW 2 1 0.18 ± 0.05 2 0.65 BSC TOP VIEW 0.95 BSC 0.86±0.09 GAUGE PLANE H C 0.25 SEATING PLANE 0.33 +0.07/ -0.08 0.08 C A B 0.10 ± 0.05 3°±3° 0.10 C 0.55 ± 0.15 DETAIL "X" SIDE VIEW 1 5.80 NOTES: 4.40 3.00 1. Dimensions are in millimeters. 2. Dimensioning and tolerancing conform to JEDEC MO-187-AA and AMSE Y14.5m-1994. 3. Plastic or metal protrusions of 0.15mm max per side are not included. 4. Plastic interlead protrusions of 0.25mm max per side are not included. 5. Dimensions “D” and “E1” are measured at Datum Plane “H”. 6. This replaces existing drawing # MDP0043 MSOP 8L. 0.65 0.40 1.40 TYPICAL RECOMMENDED LAND PATTERN Submit Document Feedback 9 FN9261.6 March 28, 2014