RENESAS HD74LS283P

HD74LS283
4-bit Binary Full Adder
REJ03D0476–0300
Rev.3.00
Jul.15.2005
The HD74LS283 adder is electrically and functionally identical to the HD74LS83A, respectively; only the arrangement
of the terminals has been changed.
This improved full adder performs the addition of two 4-bit binary words.
The sum (Σ) outputs are provided for each bit and the resultant carry (C4) is obtained from the fourth bits generating the
carry term in then nanoseconds.
The adder logic, including the carry, is implemented in its true form.
End around carry can be accomplished without the need for logic or level inversion.
Features
• Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
Package
Abbreviation
Taping Abbreviation
(Quantity)
HD74LS283P
DILP-16 pin
PRDP0016AE-B
(DP-16FV)
P
—
PRSP0016DH-B
FP
(FP-16DAV)
Note: Please consult the sales office for the above package availability.
HD74LS283FPEL
SOP-16 pin (JEITA)
EL (2,000 pcs/reel)
Pin Arrangement
Σ2
1
B2
2
B2
A2
3
Σ1
16
VCC
B3
15
B3
A2
A3
14
A3
4
Σ1
Σ3
13
Σ3
A1
5
A1
A4
12
A4
B1
6
B1
B4
11
B4
C0
7
C0
Σ4
10
Σ4
GND
8
9
C4
Σ2
C4
(Top view)
Rev.3.00, Jul.15.2005, page 1 of 7
HD74LS283
Function Table
Inputs
A1
B1
When C0 = L
A2
A3
Σ1
B2
B3
A4
Σ2
Σ3
B4
L
H
L
H
L
H
L
H
L
H
L
H
L
L
H
H
L
L
H
H
L
L
H
H
L
L
L
L
H
H
H
H
L
L
L
L
L
L
L
L
L
L
L
L
H
H
H
H
L
H
H
L
L
H
H
L
L
H
H
L
L
L
L
H
H
H
H
L
H
H
H
L
L
H
L
L
H
H
H
H
L
H
L
L
Outputs
When C0 = H
When C2 = L
C2
Σ1
Σ2
Σ4
C4
Σ3
L
H
L
L
L
L
L
H
L
H
L
L
L
L
H
H
L
H
L
L
L
L
H
H
H
H
H
L
L
H
H
H
H
L
L
L
H
L
L
L
L
H
When C2 = H
C2
Σ4
C4
L
L
L
L
L
H
H
H
L
H
H
H
H
H
L
H
H
H
H
L
H
L
H
H
H
H
H
H
L
H
H
H
H
H
H; high level, L; low level
Note: Input conditions at A1, B1, A2, B2, and C0are use to determine outputs Σ1 and Σ2 and the value of the internal carry
C2. The values at C2, A3, B3, A4, and B4 are then used to determine outputs Σ3, Σ4, and C4.
Rev.3.00, Jul.15.2005, page 2 of 7
HD74LS283
Block Diagram
C4
B4
A4
Σ4
B3
A3
Σ3
B2
Σ2
A2
B1
Σ1
A1
C0
Absolute Maximum Ratings
Item
Symbol
Ratings
Unit
Supply voltage
VCC
7
V
Input voltage
VIN
7
V
PT
400
mW
Tstg
–65 to +150
°C
Power dissipation
Storage temperature
Note: Voltage value, unless otherwise noted, are with respect to network ground terminal.
Recommended Operating Conditions
Item
Supply voltage
Output current
Operating temperature
Rev.3.00, Jul.15.2005, page 3 of 7
Symbol
Min
Typ
Max
Unit
VCC
4.75
5.00
5.25
V
IOH
—
—
–400
µA
IOL
—
—
8
mA
Topr
–20
25
75
°C
HD74LS283
Electrical Characteristics
(Ta = –20 to +75 °C)
Item
Input voltage
Symbol
VIH
VIL
min.
2.0
—
typ.*
—
—
max.
—
0.8
Unit
V
V
VOH
2.7
—
—
V
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
0.4
0.5
40
20
–0.8
–0.4
0.2
0.1
Output voltage
VOL
except C0
C0
except C0
C0
except C0
Input
current
IIH
IIL
II
V
Condition
VCC = 4.75 V, VIH = 2 V, VIL = 0.8 V,
IOH = –400 µA
IOL = 4 mA VCC = 4.75 V, VIH = 2 V,
IOL = 8 mA VIL = 0.8 V
µA
VCC = 5.25 V, VI = 2.7 V
mA
VCC = 5.25 V, VI = 0.4 V
mA
VCC = 5.25 V, VI = 7 V
VCC = 5.25 V
All inputs grounded
All B low
other inputs at 4.5V
C0
Short-circuit output current
IOS
–20
—
—
22
–100
39
mA
Supply current
ICC
—
19
34
mA
Input clamp voltage
VIK
—
—
19
—
34
–1.5
V
VCC = 5.25 V
All inputs at 4.5V
VCC = 4.75 V, IIN = –18 mA
Note: * VCC = 5 V, Ta = 25°C
Switching Characteristics
(VCC = 5 V, Ta = 25°C)
Item
Propagation delay
time
Symbol
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
Rev.3.00, Jul.15.2005, page 4 of 7
Inputs
Outputs
C0
Σi
Ai, Bi
Σi
C0
C4
Ai, Bi
C4
min.
—
—
—
—
—
—
—
—
typ.
16
15
15
15
11
11
11
12
max.
24
24
24
24
17
22
17
17
Unit
ns
ns
ns
ns
ns
ns
ns
ns
Condition
CL = 15 pF,
RL = 2 kΩ
HD74LS283
Testing Method
Test Circuit
VCC
Output
4.5V
RL
Load circuit 1
C4
CL
A4
B4
Input
See Testing Table
P.G.
Zout = 50Ω
Output
A3
Σ4
B3
A2
Σ3
B2
Same as Load Circuit 1.
Output
A1
Σ2
B1
Same as Load Circuit 1.
Output
C0
Notes:
Same as Load Circuit 1.
Output
Σ1
Same as Load Circuit 1.
1. CL includes probe and jig capacitance.
2. All diodes are 1S2074(H).
Waveform
tTHL
tTLH
90%
1.3 V
Input
3V
90%
1.3 V
10%
10%
0V
tPHL
tPLH
VOH
In phase output
1.3 V
1.3 V
VOL
tPHL
tPLH
VOH
Out of phase output
1.3 V
1.3 V
VOL
Notes: Input pulse; tTLH ≤ 15 ns, tTHL ≤ 6 ns, PRR = 1 MHz, duty cycle 50%.
Rev.3.00, Jul.15.2005, page 5 of 7
HD74LS283
Testing Table
Ite
m
From input
to output
C0→Σi or C4
tPLH
tPHL
Ai or Bi
→Σi or C4
B4
A4
B3
A3
Inputs
B2
A2
B1
A1
C0
C4
Σ4
GND
GND
GND
GND
GND
GND
GND
GND
IN
—
—
—
—
OUT
GND
4.5V
GND
4.5V
GND
4.5V
GND
4.5V
IN
OUT
OUT
OUT
OUT
OUT
GND
IN
IN
GND
GND
—
—
—
—
OUT
GND
GND
GND
—
—
—
OUT
—
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
IN
IN
GND
GND
IN
IN
GND
GND
GND
GND
GND
GND
GND
GND
4.5V
IN
IN
4.5V
Rev.3.00, Jul.15.2005, page 6 of 7
GND
GND
Outputs
Σ3
Σ2
Σ1
GND
IN
IN
GND
GND
GND
GND
GND
GND
—
—
OUT
—
—
GND
GND
GND
GND
GND
GND
—
OUT
—
—
—
GND
GND
GND
GND
GND
—
—
—
OUT
OUT
GND
GND
4.5V
IN
IN
4.5V
GND
GND
4.5V
IN
IN
4.5V
GND
GND
GND
—
—
OUT
OUT
—
4.5V
IN
IN
4.5V
GND
GND
GND
GND
GND
—
OUT
OUT
—
—
GND
GND
GND
GND
GND
OUT
OUT
—
—
—
HD74LS283
Package Dimensions
JEITA Package Code
P-DIP16-6.3x19.2-2.54
RENESAS Code
PRDP0016AE-B
MASS[Typ.]
1.05g
Previous Code
DP-16FV
D
9
E
16
1
8
b3
0.89
Z
A1
A
Reference
Symbol
L
e
Nom
θ
c
e1
D
19.2
E
6.3
JEITA Package Code
P-SOP16-5.5x10.06-1.27
RENESAS Code
PRSP0016DH-B
*1
Previous Code
FP-16DAV
7.4
A1
0.51
b
p
0.40
b
3
0.48
0.56
1.30
c
0.19
θ
0°
e
2.29
0.25
0.31
2.54
2.79
15°
1.12
L
2.54
MASS[Typ.]
0.24g
NOTE)
1. DIMENSIONS"*1 (Nom)"AND"*2"
DO NOT INCLUDE MOLD FLASH.
2. DIMENSION"*3"DOES NOT
INCLUDE TRIM OFFSET.
D
F
16
20.32
5.06
Z
( Ni/Pd/Au plating )
Max
7.62
1
A
bp
e
Dimension in Millimeters
Min
9
c
HE
*2
E
bp
Index mark
Reference
Symbol
Terminal cross section
( Ni/Pd/Au plating )
1
Z
*3
bp
Nom
D
10.06
E
5.50
Max
10.5
A2
8
e
Dimension in Millimeters
Min
x
A1
M
0.00
0.10
0.20
0.34
0.40
0.46
0.15
0.20
0.25
7.80
8.00
A
L1
2.20
bp
b1
c
A
c
A1
θ
y
L
Detail F
1
θ
0°
HE
7.50
e
1.27
x
0.12
y
0.15
0.80
Z
L
L
Rev.3.00, Jul.15.2005, page 7 of 7
8°
0.50
1
0.70
1.15
0.90
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