MIL-PRF-38534 AND 38535 CERTIFIED FACILITY M.S.KENNEDY CORP. 75 VOLT 6 AMP MOSFET H-BRIDGE PWM MOTOR DRIVER/AMPLIFIER 4223 FEATURES: Low Cost Complete H-Bridge 6 Amp Capability, 75 Volt Maximum Rating Self-contained Smart Lowside/Highside Drive Circuitry Internal PWM Generation, Shoot-through Protection Isolated Case Allows Direct Heatsinking Logic Level Disable Input Logic Level High Side Enable Input for Special Modulation or Function Available With Leads Bent Up, Down or Straight DESCRIPTION: The MSK4223 is a complete H-Bridge circuit to be used for DC brushed motor control or Class D switchmode amplification. All of the drive/control circuitry for the lowside and highside switches are internal to the circuit. The PWM circuitry is internal as well, leaving the user to only provide an analog signal for the motor speed/direction, or audio signal for switchmode audio amplification. The MSK4223 is constructed on a space efficient ceramic substrate that can be directly connected to a heatsink. EQUIVALENT SCHEMATIC PIN-OUT INFORMATION TYPICAL APPLICATIONS 1 2 3 4 5 6 7 8 9 10 1 HEN DISABLE INPUT GROUND VCC OUTPUT A RSENSE A V+ RSENSE B OUTPUT B 8548-140 Rev. J 10/14 3 ABSOLUTE MAXIMUM RATINGS V+ VCC IOUT IPK VOUT θJC High Voltage Supply 4 75V Logic Supply 16V Continuous Output Current 6A Peak Output Current 9A Output Voltage Range GND-2V min. To V+ max. Thermal Resistance 4.6°C/W (Output Switches) ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ TST TLD ○ ○ ○ TC ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ TJ ELECTRICAL SPECIFICATIONS Parameter ○ ○ ○ ○ Storage Temperature Range 5 -65°C to +150°C Lead Temperature Range 200°C (10 Seconds Lead Only) Case Operating Temperature -40°C to +125°C MSK4223 +150°C Junction Temperature ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ All Ratings: Tc= +25°C Unless Otherwise Specified Test Conditions 2 MSK4223 Units Min. Typ. Max. Each MOSFET ID=6A - 0.75 1.5 Each MOSFET IS=6A Intrinsic Diode - 1.1 1.8 V Intrinsic Diode - - 260 nS Each MOSFET V+=70V - 1.0 25 uA 225 250 275 KHz - 46 60 mA 9 12 16 V Output A,B=50% Duty Cycle 5.5 6 6.5 V Analog Input Voltage Output A=100% Duty Cycle High 2.5 3 3.5 V Analog Input Voltage Output B=100% Duty Cycle High 8.5 9 9.5 V Input Voltage LO - - 0.8 V Input Voltage HI 2.7 - - V Input Current (DISABLE=0V) - - -135 uA Input Voltage LO - - 0.8 V Input Voltage HI 2.7 - - V Input Current (HEN=0V) - - -270 uA 56 84 nS OUTPUT CHARACTERISTICS VDS(ON) Voltage 1 Instantaneous Forward Voltage 1 Reverse Recovery Time 1 Leakage Current 1 PWM Frequency VCC V SUPPLY CHARACTERISTICS Quiescent Bias Current Analog Input=6VDC RL=∞ VCC Voltage Range 1 INPUT SIGNAL CHARACTERISTICS Analog Input Voltage LOGIC CONTROL INPUTS 1 Disable Input HEN Input SWITCHING CHARACTERISTICS 1 RL=100Ω Rise-Time V+=75V - Fall-Time V+=75V - 33 50 nS - 100 - nS Dead-Time NOTES: 1 2 3 4 Guaranteed by design but not tested. Typical parameters are representative of actual device performance but are for reference only. VCC=+12V, V+=28V, RL=1K AOUT to BOUT, unless otherwise specified. Continuous operation at or above absolute maximum ratings may adversely effect the device performance and/or life cycle. When applying power to the device, apply the low voltage followed by the high voltage or alternatively, apply both at the same time. Do not apply high voltage without low voltage present. 5 Internal solder reflow temperature is 180°C, do not exceed. 2 8548-140 Rev. J 10/14 APPLICATION NOTES TYPICAL SYSTEM OPERATION MSK4223 PIN DESCRIPTIONS VCC - Is the low voltage supply for powering internal logic and drivers for the lowside and highside MOSFETS. The supplies for the highside drivers are derived from this voltage. V+ - Is the higher voltage H-bridge supply. The MOSFETS obtain the drive current from this supply pin. The voltage on this pin is limited by the drive IC. The MOSFETS are rated at 100 volts. Proper by-passing to GND with sufficient capacitance to suppress any voltage transients, and to ensure removing any drooping during switching, should be done as close to the pins of the module as possible. OUTPUT A - Is the output pin for one half of the bridge. Decreasing the input voltage causes increasing duty cycles at this output. OUTPUT B - Is the output pin for the other half of the bridge. Increasing the input voltage causes increasing duty cycles at this output. RSENSE A - Is the connection for the bottom of the A half bridge. This can have a sense resistor connection to the V+ return ground for current limit sensing, or can be connected directly to ground. The maximum voltage on this pin is ±2 volts with respect to GND. This is a diagram of a typical application of the MSK4223. The design VCC voltage is +12 volts and should have a good low ESR bypass capacitor such as a tantalum electrolytic. The analog input can be an analog speed control voltage from a potentiometer, other analog circuitry or by microprocessor and a D/A converter. This analog input gets pulled by the current control circuitry in the proper direction to reduce the current flow in the bridge if it gets too high. The gain of the current control amplifier will have to be set to obtain the proper amount of current limiting required by the system. IN RSENSE B - Is the connection for the bottom of the B half bridge. This can have a sense resistor connection to the V+ return ground for current limit sensing, or can be connected directly to ground. The maximum voltage on this pin is ±2 volts with respect to GND. Current sensing is done in this case by a 0.1 ohm sense resistor to sense current from both legs of the bridge separately. It is important to make the high current traces as big as possible to keep inductance down. The storage capacitor connected to the V+ and the module should be large enough to provide the high energy pulse without the voltage sagging too far. A low ESR ceramic capacitor or large polypropylene capacitor will be required. Mount the capacitor as close to the module as possible. The connection between GND and the V+ return should not be carrying any motor current. The sense resistor signal is common mode filtered as necessary to feed the limiting circuitry for the microprocessor. This application will allow full four quadrant torque control for a closed loop servo system. GND - Is the return connection for the input logic and VCC INPUT - Is an analog input for controlling the PWM pulse width of the bridge. A voltage lower than VCC/2 will produce greater than 50% duty cycle pulses out of OUTPUT A. A voltage higher than VCC/2 will produce greater than 50% duty cycle pulses out of OUTPUT B. DISABLE - Is the connection for disabling all 4 output switches. DISABLE high overrides all other inputs. When taken low, everything functions normally. An internal pullup to VCC will keep DISABLE high if left unconnected. A snubber network is usually required, due to the inductance in the power loop. It is important to design the snubber network to suppress any positive spikes above 75V and negative spikes below -2V with respect to ground. HEN - Is the connection for enabling the high side output switches. When taken low, HEN overrides other inputs and the high side switches remain off. When HEN is high everything functions normally. An internal pullup to VCC will keep HEN high if left unconnected. 3 8548-140 Rev. J 10/14 TYPICAL PERFORMANCE CURVES 4 8548-140 Rev. J 10/14 MECHANICAL SPECIFICATIONS WEIGHT=7.9 GRAMS TYPICAL TORQUE SPECIFICATION 3-5 IN./LBS. TEFLON SCREWS OR WASHERS ARE RECOMMENDED. ALL DIMENSIONS ARE SPECIFIED IN INCHES ORDERING INFORMATION MSK4223 U LEAD CONFIGURATIONS S= STRAIGHT; U= BENT UP; D= BENT DOWN GENERAL PART NUMBER 5 8548-140 Rev. J 10/14 REVISION HISTORY M.S. Kennedy Corp. Phone (315) 701-6751 FAX (315) 701-6752 www.mskennedy.com The information contained herein is believed to be accurate at the time of printing. MSK reserves the right to make changes to its products or specifications without notice, however, and assumes no liability for the use of its products. Please visit our website for the most recent revision of this datasheet. 6 8548-140 Rev. J 10/14