M.S. KENNEDY CORPORATION 4707 DEY ROAD LIVERPOOL, NY 13088 PHONE: (315) 701-6751 | FAX: (315) 701-6752 MSK Web Site: http://www.mskennedy.com/ Application Note 015 MSK5053RH Eval Board User's Guide By Bob Abel & Paul Musil, MS Kennedy Corp.; Revised 10/16/2013 Introduction The MSK5053RH is a radiation hardened 400KHz to 2 MHz step-down switching regulator. Synchronized, or fixed, high frequency switching coupled with wide input and output voltage ranges, allows the designer to minimize the required board space for supporting components. With no load quiescent currents typically less than 100uA, efficiency remains high at light loads. The shutdown circuitry allows the user to further reduce the input voltage supply current to less than 1uA. The device is packaged in a hermetically sealed 40 pin flatpack, and is available with a straight or gull wing leads. The evaluation board provides a platform from which to evaluate new designs with ample real estate to make changes and evaluate results. Evaluation early in the design phase reduces the likelihood of excess ripple, instability, or other issues, from becoming a problem at the application PCB level. This application note is intended to be used in conjunction with the MSK5053RH data sheet, and Linear Technology’s LT3480 data sheet. Reference those documents for additional application information and specifications. Setup Use the standard turret terminals to connect to your power supply and test equipment. Connect a power supply across the Vin and GND1 terminals (see note 1). Connect the output load between the VOUT and GND2 terminals. Use separate or Kelvin connections to connect input and output monitoring equipment. When measuring output ripple voltage with an oscilloscope probe, the wire from the probe to the ground clip will act as an antenna, picking up excessive noise. For improved results, the test hook should be removed from the tip of the probe. Minimize the ground lead effect by using a twisted pair or a short leaded AN015 1 probe tip, and measure directly across the output capacitor. This reduces the erroneous noise seen on the waveform. Note 1: The input voltage range of the evaluation card is limited by the 20V rating of the input capacitor. For input voltages greater than 20V—up to the maximum input voltage of 36V—the user must change the input capacitor to one with a sufficient voltage rating for the application. Keep in mind that circuit stability may be affected, and should be reevaluated. Output Voltage Programming VOUT = VFB * (1+R2/R1) R2 = R1 * (VOUT/VFB-1) Given: VREF = 0.79V Typ. Factory Configuration: R1 = 10.0K, R2 = 21.5K VOUT = 0.79 * (1+21.5K/10.0K) = 2.49V Switching Frequency Programming The operating frequency is programmed by the value of RT. The value for RT will vary from 187k at 200 kHz to 11.5k at 2.0 MHz based on the application requirements. Reference the MSK5053RH data sheet for the RT selection table. Higher operating frequencies increase switching losses, but reduce output current ripple and core losses. Lower frequencies reduce switching losses, but increase output current ripple. 800kHz to 1MHz works well for most applications. The flexibility of the frequency adjustment also helps avoid issues with noise sensitive frequency bands. The following formula provides the maximum possible frequency for a given application. (The frequency should be set lower than the calculated maximum) FSW(MAX) = VD + VOUT tON(MIN)(VD + VIN – VSW ) Where: FSW(Max) is the maximum switching frequency VD is the catch diode voltage drop (~0.5V) VSW is the internal switch drop (~0.3V at 1A) AN015 2 Efficiency Typical efficiency vs. load current curves for 5.0V, 7.0V, and 12.0V input voltages and 1.5V and 2.5V output voltages are shown in Figure 1. Figure 1 Boost Pin and Boost Drive (BD) The Boost pin provides drive voltage greater than VIN to the base of the power transistor. Using a voltage greater than VIN ensures hard saturation of the power switch significantly improving overall efficiency. A boost pin voltage of at least 2.3V is required throughout the on-time of the switch to guarantee that it remains saturated. For outputs less than 3.0V, install JP2 - BD tied to the input voltage (Default). For outputs greater than or equal to 3.3V, remove JP2 and install JP1 - BD tied to the output. Tying BD to VIN reduces the maximum allowable input voltage to 30V. With BD tied to the output, the circuit becomes slightly more efficient in applications with higher input voltages because the BOOST pin current and BD pin quiescent current comes from a lower voltage source. Loop Stability The compensation for the evaluation board is a 150pF capacitor in parallel with a series RC consisting of a .015µF capacitor and a 18.2kΩ resistor. This compensation was selected for use with the default components on this evaluation board. New values may have to be selected if different components are used. The values for loop compensation components depend on parameters which are not always well controlled. These include inductor value (±30% due to production tolerance, load current and ripple current variations), output capacitance (±20% to ±50% due to production tolerance, temperature, aging and changes at the load), output capacitor ESR (±200% due to production tolerance, temperature and aging), and finally, DC input voltage and output load current. This makes it important to check out the final design to ensure that it is stable and tolerant of all these variations. Phase margin and gain margin are measures of stability in closed loop systems. Phase margin indicates relative stability, the tendency to oscillate during its damped response to a AN015 3 load change such as a step function. Moreover, the phase margin measures how much phase variation is needed at the gain crossover frequency to lose stability. Gain margin is also an indication of relative stability. Gain margin measures how much the gain of the system can increase before the system becomes unstable. Together, these two numbers give an estimate of the safety margin for closed-loop stability. The smaller the stability margins, the more likely the circuit will become unstable. 80 200 60 150 40 100 20 50 0 0 TR2/° TR1/dB One method for measuring the stability of a feedback circuit is a network analyzer. Use an isolation transformer / adapter to isolate the grounded output analyzer from the feedback network. Remove the jumper across R3 and connect the output of the isolation transformer across R3 using TP1 and TP2 terminals. Use 1M-ohm or greater probes to connect the inputs of the analyzer to TP1 and TP2. Use GND3 for the ground reference for the network analyzer inputs. Inject a swept frequency signal into the feedback loop, and plot the loop’s gain and phase response between 1 kHz and 1 MHz. This provides a full picture of the frequency response on both sides of the unity gain frequency (10 kHz in this case). Figure 2 illustrates typical results for the default configuration and 1A of output current. The phase margin is the phase value at the unity gain frequency, or about 86 Deg. The gain margin is the gain at the 0° phase shift frequency, or approximately 29dB. -20 -50 -40 -100 -60 -150 -80 102 103 104 105 106 -200 107 f/Hz TR1: Mag(Gain) TR2: Phase(Gain) Figure 2 An alternate method to look at phase margin is to step the output load and monitor the response of the system to the transient. Filtering may be required to remove switching frequency components of the signal to make the small transients more visible. Any filter used for this measurement must be carefully designed such that it will not alter the signal of interest. A well behaved loop will settle back quickly and smoothly (Figure 3-C) and is termed critically damped. A loop with low phase margin will ring as it settles (Figure 3-B) under damped. A loop with high phase margin will take longer to achieve the setpoint (Figure 3-A) over damped. The number of rings indicates the degree of stability, and the frequency of the ringing shows the approximate unity-gain frequency of the loop. The amplitude of the signal is not particularly important, as long as the amplitude is not so high that the loop behaves nonlinearly. This method is easy to implement in labs not equipped AN015 4 with network analyzers, but it does not indicate gain margin or evidence of conditional stability. In these situations, a small shift in gain or phase caused by production tolerances or temperature could cause instability even though the circuit functioned properly in development. Figure 3-A Figure 3-B Figure 3-C Figure 4 illustrates the typical results for a critically damped step load response between 500ma and 1.0A. Figure 4 (Typical Step Response) For applications with larger output voltages, feedforward capacitor C7 may be required to move the unity gain crossover frequency further out to speed up loop response. AN015 5 Current Sharing and Synchronization There are several advantages to using a multiple switcher approach compared to a single larger switcher. Synchronizing three converters 120° out of phase with each other triples the output current capacity and reduces input and output ripple currents. This reduces the ripple rating, size and cost of filter capacitors. If the SYNC pin is not used in the application, tie it to ground. R5 performs this function for the eval card, but it can be easily driven with a clock signal or pulled high if your application requires synchronization or pulse skip mode. To synchronize switching to an external clock, apply a logic-level signal to the SYNC pin. The recommended clock source is a square-wave with 20% to 80% duty cycle. The clock source rise and fall times must be faster than 1uS. The Synchronization range is from 250KHz to 2MHz. The RT pin resistor must be set to a frequency which is 20% below the lowest synchronized frequency. Reference the PGOOD pin description. It is important to note that slope compensation is set by the RT value: When the sync frequency is much higher than the one set by RT, the slope compensation will be significantly reduced which may require a larger inductor value to prevent subharmonic oscillation. PGOOD Pin The PGOOD pin is an open collector output driven by a comparator with a 0.7V reference and the FB pin as its input. PGOOD is a low until the FB pin is 86% of its final voltage. For PGOOD to be valid VIN must be greater than 3.6V and the RUN/SS pin must be high. A high level on the PGOOD pin also indicates the regulator is ready for switching frequency synchronization at the SYNC pin. RUN/SS The RUN/SS pin provides a method for shutting the regulator down and for soft-start control. Less than 0.2V on the RUN/SS pin shuts down the regulator. If the RUN/SS pin is greater than 2.5V, the regulator runs in normal mode. Soft-start control is achieved by adding a RC network on the RUN/SS pin. The voltage ramp on the RUN/SS pin limits the current during startup to minimize startup surge current and output overshoot. Tie RUN/SS to VIN if shutdown and soft-start are not required. Input/Output Capacitors The input capacitor C2A is a AVX TAZ series 47µF tantalum capacitor and it was chosen due to its low ESR, and effective low frequency filtering; see BOM for specific part number. The input ripple current for a buck converter is high, typically IOUT/2. Tantalum capacitors become resistive at higher frequencies, requiring careful ripple-rating selection to prevent excessive heating. Measure the capacitor case rise above ambient in the worst case thermal environment of the application, if it exceeds 10°C, select a capacitor with a lower ESR or a higher power handling capability. Ceramic capacitors’ ESL (Effective Series Inductance (L)) tends to dominate their ESR, making them less susceptible to ripple-induced heating. Ceramic capacitors filter high frequencies well, and C1A and B were chosen for that purpose. Ceramic input capacitors must be located close to the VIN and power ground pins. AN015 6 The output capacitors C5A and B are AVX TAZ series 47uF tantalum capacitors; see BOM for specific part number. AVX TAZ series capacitors were chosen to provide a design starting point using high reliability MIL-PFR-55365/4 qualified capacitors. Ceramic capacitance is not recommended as the main output capacitor, since loop stability relies on a resistive characteristic at higher frequencies to form a zero. At switching frequencies, ripple voltage is more a function of ESR than of absolute capacitance value. If lower output ripple voltage is required, reduce the ESR by choosing a different capacitor or placing more capacitors in parallel. For very low ripple, an additional LC filter in the output may be a more suitable solution. Re-compensation of the loop may be required if the output capacitance is altered. The output of a switching regulator contains very high frequency switching noise. Ceramic capacitors C6A and B filter the switching noise on the demo board. In application, trace impedance and local bypass capacitors will perform this function. Current Limitations Peak current for a buck converter is limited by the maximum switch current rating. This current rating is at least 3.5A for lower duty cycles and decreases linearly to 3.0A at a duty cycle of 80%. Figure 5 Maximum output current is then reduced by one-half peak-to-peak inductor current. IMAX = IP – [(VOUT)(VIN – VOUT)/2(L)(f)(VIN)] Example: with VOUT = 2.5V, VIN = 5V; DC = 2.5/5 = 0.5, L = 8.96µH IP = 3.3A (Figure 5) IMAX = 3.3A – [(2.5V)(5V-2.5V) / 2(8.96µH)(800 kHz)(5V)] = 3.2A AN015 7 Schematic Typical Performance Parameter Conditions Output Voltage Vin = 5.0V, IOUT = 1.0A Switching Frequency Vin = 5.0V, IOUT = 1.0A Output Ripple Voltage Vin = 5.0V, IOUT = 1.0A Line Regulation 3.6V ≤ Vin ≤ 25V, IOUT = 10mA Load Regulation Vin = 5.0V, IOUT = 10mA to 2.0A Efficiency Vin = 5.0V, IOUT = 1.0A Gain Margin Vin = 12.0V, IOUT = 1.0A Phase Margin Vin = 12.0V, IOUT = 1.0A Units V kHz mVp-p % % % dB Deg Typical 2.5V (Factory Default) 800 7.9 -0.06 -0.2 82 29 86 PCB Artwork Top Side AN015 Bottom Side 8 Bill Of Materials Ref Des U1 C1A C1B C2A C2B C2C C3 C4 C5A C5B C5C C5D C5E C5F C6A C6B C7 C8 C9 R1 R2 R3 R4 R5 R6 R7 R8 AN015 Description Switching Regulator 1210 Ceramic cap 1.0uF 8050 Ceramic cap 0.1uF N/A N/A 47 uF Low ESR tantalum 8050 Ceramic Cap 150pF 8050 Ceramic Cap 0.015uF 47 uF Low ESR tantalum 47 uF Low ESR tantalum N/A N/A N/A N/A 1210 Ceramic cap 1.0uF 8050 Ceramic cap 0.1uF N/A 8050 Ceramic Cap 2000pF N/A Resistor 10.0K, 1/8W Resistor 21.5K, 1/8W Resistor 20Ω, 1/8W Resistor 18.2KΩ, 1/8W Resistor 49.9K, 1/8W Resistor 40.2K, 1/8W Resistor 49.9K, 1/8W Resistor 49.9K, 1/8W Manufacturer MS Kennedy Corp. AVX AVX Part Number MSK5053RH 12101C105KAT 08051C104KAT AVX AVX AVX AVX AVX TAZH476K020L (CWR29JC476K) 08055A151KAT 08055C153KAT TAZF476K010L (CWR29FC476K) TAZF476K010L (CWR29FC476K) AVX AVX 12101C105KAT 08051C104KAT AVX 08055C202KAT 9