M.S. KENNEDY CORPORATION 4707 DEY ROAD LIVERPOOL, NY 13088 PHONE: (315) 701-6751 | FAX: (315) 701-6752 http://www.mskennedy.com/ MSK Web Site: Application Note 016 MSK5052RH Evaluation Board User's Guide By Bob Abel & Paul Musil, MS Kennedy Corp.; Revised 9/19/2013 Introduction The MSK5052RH is a radiation hardened 500 kHz switching regulator capable of delivering up to 4.5A of current to the load. The 4.5A integrated switch, catch diode, and inductor leave only a few application specific components to be selected by the designer. The MSK5052RH simplifies design of high efficiency radiation hardened switching regulators using a minimum amount of board space. The device is packaged in a hermetically sealed 40 pin flatpack and is available with straight or gull wing leads. The evaluation board provides a platform from which to evaluate new designs with ample real estate to make changes and evaluate results. Evaluation early in the design phase reduces the likelihood of excess ripple, instability, or other issues, from becoming a problem at the application PCB level. This application note is intended to be used in conjunction with the MSK5052RH data sheet and the LT1959 data sheet. Reference those documents for additional application information and specifications. Setup Use the standard turret terminals to connect to your power supply and test equipment. Connect a power supply across the Vin and GND1 terminals (see note 1). Connect the output load between the VOUT and GND2 terminals. Use separate or Kelvin connections to connect input and output monitoring equipment. When measuring output ripple voltage with an oscilloscope probe, the wire from the probe to the ground clip will act as an antenna, picking up excessive noise. For improved results, the test hook should be removed from the AN016 1 tip of the probe. The tip should be touched against the output turret, with the bare ground shield pressed against the ground turret. This reduces the noise seen on the waveform. Note 1: The MSK5052RH has a typical minimum on time requirement of 300nS corresponding to a minimum duty cycle of 15% at 500kHz switching frequency. Forcing the device to operate at less than the minimum on time may result in irregular switching waveforms and present the appearance of instability. The default configuration for this evaluation card is 1.8V out and it may present irregular switching waveforms at input voltages greater than 12V. When configured for an output voltage of 2.5V or greater the MSK5052RH will function normally with input voltages up to the maximum rating of 15V. If operating the MSK5052RH at less than the minimum on time is required greater than typical compensation can reduce the irregular switching. Output Voltage Programming VOUT = VFB * (1+R1/R2) R1 = R2 * (VOUT/VFB-1) Given: VREF = 1.21V Typ. Factory Configuration: R1 = 1.21K, R2 = 2.49K VOUT = 1.21 * (1+1.21/2.49) = 1.8V Efficiency Typical efficiency curves for 1.8V and 3.3V output voltages with 5VIN are shown in Figure 1. Figure 1 AN016 2 Boost The internal boost circuitry provides drive voltage greater than VIN to the base of the power transistor. Using a voltage greater than VIN ensures hard saturation of the power switch significantly improving overall efficiency. The boost diode and capacitor are integrated, so the designer simply must decide to connect the boost circuitry to the input or the output based on the application. A boost voltage of at least 2.8V is required throughout the on-time of the switch to guarantee that it remains saturated. The internal circuit generates a voltage across the boost capacitor nearly identical to the input. In applications having output voltages greater than 2.8V and significantly higher input voltages, the anode may be connected to the output voltage to further improve efficiency by installing J2 and removing J1. The default configuration is with the anode on the input. Loop Stability The compensation for MSK5052RH evaluation board is an 820pF capacitor in parallel with a series RC consisting of a 33,000pF capacitor and a 10kΩ resistor. This compensation was selected for use with the default components on this evaluation board. New values may have to be selected if different components are used. The values for loop compensation components depend on parameters which are not always well controlled. These include inductor value (±30% due to production tolerance, load current and ripple current variations), output capacitance (±20% to ±50% due to production tolerance, temperature, aging and changes at the load), output capacitor ESR (±200% due to production tolerance, temperature and aging), and finally, DC input voltage and output load current. This makes it important to check out the final design to ensure that it is stable and tolerant of all these variations. Phase margin and gain margin are measures of stability in closed loop systems. Phase margin indicates relative stability, the tendency to oscillate during its damped response to an input change such as a step function. Moreover, the phase margin measures how much phase variation is needed at the gain crossover frequency to lose stability. Gain margin is also an indication of relative stability. Gain margin measures how much the gain of the system can increase before the system becomes unstable. Together, these two numbers give an estimate of the safety margin for closed-loop stability. The smaller the stability margins, the more likely the circuit will become unstable. One method for measuring the stability of a feedback circuit is a network analyzer. Use an isolation transformer / adapter to isolate the grounded output analyzer from the feedback network. Remove the jumper across R3 and connect the output of the isolation transformer across R3 using TP1 and TP2 terminals. Use 1M-ohm or greater probes to connect the inputs of the analyzer to TP1 and TP2. Use GND3 for the ground reference for the network analyzer inputs. Inject a swept frequency signal into the feedback loop, and plot the loop’s gain and phase response between 1 kHz and 1 MHz. This provides a full picture of the frequency response on both sides of the unity gain frequency (22 kHz in this case). Figure 2 illustrates typical results for the default configuration at 2A IOUT. The phase margin is the AN016 3 phase value at the unity gain frequency, or about 74 Deg. The gain margin is the gain at the 0° phase frequency, or approximately 24dB. 80 200 60 150 Phase Margin 100 50 20 0 0 Gain Margin -20 TR2/° TR1/dB 40 -50 -40 -100 -60 -150 -80 104 103 102 105 -200 106 f/Hz TR1: Mag(Gain) TR2: Phase(Gain) Figure 2 An alternate method to look at phase margin is to step the output load and monitor the response of the system to the transient. Filtering may be required to remove switching frequency components of the signal to make the small transients more visible. Any filter used for this measurement must be carefully designed such that it will not alter the signal of interest. A well behaved loop will settle back quickly and smoothly (Figure 3-C) and is termed critically damped, whereas a loop with less phase or gain margin will ring as it settles (Figure 3-B) under damped, and aloop with more phase margin will take longer to return to the setpoint (Figure 3-A) over damped. The number of rings indicates the degree of stability, and the frequency of the ringing shows the approximate unity-gain frequency of the loop. The amplitude of the signal is not particularly important, as long as the amplitude is not so high that the loop behaves nonlinearly. This method is easy to implement in labs not equipped with network analyzers, but it does not indicate gain margin or evidence of conditional stability. In these situations, a small shift in gain or phase caused by production tolerances or temperature could cause instability even though the circuit functioned properly in development. Figure 3-A Figure 3-B Figure 3-C Figure 4 illustrates typical results for a step load response between 500ma and 1.5A. AN016 4 Figure 4 Current Sharing and Synchronization There are several advantages to using a multiple switcher approach compared to a single larger switcher. Synchronizing three converters 120° out of phase with each other reduces input and output ripple currents. This reduces the ripple rating, size and cost of filter capacitors. If the SYNC pin is not used in the application, tie it to ground. To synchronize switching to an external clock, apply a logic-level signal to the SYNC pin. The amplitude must be from a logic low to greater than 2.2V, with a duty cycle between 10% and 90%. The synchronization frequency must be greater than the free-running oscillator frequency and less than 1 MHz. This means that minimum practical sync frequency is equal to the worst-case high self-oscillating frequency (560 kHz), not the typical operating frequency of 500 kHz. Caution should be used when synchronizing above 700 kHz because at higher sync frequencies the amplitude of the internal slope compensation used to prevent subharmonic switching is reduced. Additional circuitry may be required to prevent subharmonic oscillation Shutdown For normal operation, the SHDN pin should be left floating or tied high. SHDN has two output-disable modes: lockout and shutdown. When the pin is taken below the lockout threshold, switching is disabled. This is typically used for input undervoltage lockout. Grounding the SHDN pin places the MSK5052RH in shutdown mode. This reduces the total device supply current to 20µA. Input/Output Capacitors The input capacitors C2A and B are AVX TAZ Series 47µF tantalum capacitors and were chosen due to their low ESR, and effective low frequency filtering. See BOM for specific part number. The input ripple current for a buck converter is high, typically IOUT/2. Tantalum capacitors become resistive at higher frequencies, requiring careful ripple-rating selection to prevent excessive heating. Measure the capacitor case rise above ambient in the worst case thermal environment of the application, and if it exceeds 10°C, increase the AN016 5 voltage rating or lower the ESR rating. Ceramic capacitors’ ESL (effective series inductance) tends to dominate their ESR, making them less susceptible to ripple-induced heating. Ceramic capacitors filter high frequencies well, and C1A and B were chosen for that purpose. The output capacitors C5A, B and C are AVX TAZ series 220uF tantalum capacitors. See BOM for specific part number. AVX TAZ series capacitors were chosen to provide a design starting point using high reliability MIL-PFR-55365/4 qualified capacitors. Ceramic capacitance is not recommended as the main output capacitor, since loop stability relies on a resistive characteristic at higher frequencies to form a zero. At switching frequencies, ripple voltage is more a function of ESR than of absolute capacitance value. If lower output ripple voltage is required, reduce the ESR by choosing a different capacitor or placing more capacitors in parallel. For very low ripple, an additional LC filter in the output may be a more suitable solution. Re-compensation of the loop may be required if the output capacitance is altered. The output contains very narrow voltage spikes caused by the parasitic inductance of C5. Ceramic capacitors C6A and B remove these spikes on the demo board. In application, trace impedance and local bypass capacitors will perform this function. Current Limitations To calculate the peak current, use the minimum switch peak current limit specification. This minimum peak current limit is 4.5A up to 50% duty cycle (DC), decreasing to 3.7A at 80% duty cycle for the MSK5052RH. IP = 4.5A for DC < 50% IP = 3.21 + 5.95(DC) – 6.75(DC)2 for 50% < DC < 90% DC = Duty cycle = VOUT/VIN AN016 6 Maximum output current is the peak current minus one-half of the peak-to-peak inductor current. IMAX = IP – (VOUT)(VIN – VOUT)/2(L)(f)(VIN) Example: with VOUT = 5V, VIN = 8V; DC = 5/8 = 0.625, L = 8.96µH (Internal) IP = 3.21 + 5.95(0.625) – 6.75(0.625)2 = 4.3A IMAX = 4.3 – (5)(8-5)/2(8.96µH)(500kHz)(8) = 4.09A Current rating decreases with duty cycle because the RH1959 has internal slope compensation to prevent current mode subharmonic switching. The RH1959 has nonlinear slope compensation, which gives better compensation with less reduction in current limit. MSK5052RH Evaluation Board Schematic Typical Performance Parameter Output Voltage Switching Frequency Output Ripple Voltage Line Regulation Load Regulation Efficiency Current Limit Gain Margin Phase Margin AN016 Conditions Vin = 5.0V, IOUT = 2.0A Vin = 5.0V, IOUT = 2.0A Vin = 5.0V, IOUT = 2.0A 4.3V ≤ Vin ≤ 15V, IOUT = 2.0A Vin = 5.0V, IOUT = 50mA to 2.0A Vin = 5.0V, IOUT = 2.0A Vin = 5.0V Vin = 5.0V, IOUT = 2.0A Vin = 5.0V, IOUT = 2.0A Units V kHz mVp-p % % % A dB Deg Typical 1.8V (Factory Default) 500 7.1 .095 -.46 75.7 5.5 24 74 7 PCB Artwork Top Side Bottom Side Bill Of Materials Ref Des U1 C1A C1B C2A C2B C2C C3 C4 C5A C5B C5C C5D C5E C5F C6A C6B C7 C8 R1 R2 R3 R4 R5 AN016 Description Switching Regulator 1210 Ceramic cap 0.1uF 1210 Ceramic cap 1.0uF 47 uF Low ESR tantalum 47 uF Low ESR tantalum N/A 8050 Ceramic Cap 33000pF 8050 Ceramic Cap 820pF 220 uF Low ESR tantalum 220 uF Low ESR tantalum 220 uF Low ESR tantalum N/A N/A N/A 1210 Ceramic cap 1.0uF 8050 Ceramic cap 0.1uF N/A 8050 Ceramic cap 0.1uF Resistor 1.21K, 1/8W Resistor 2.49K, 1/8W Resistor 20Ω, 1/8W Resistor 10K, 1/8W Resistor 49.9K, 1/8W Manufacturer MS Kennedy Corp. AVX AVX AVX AVX Part Number MSK5052RHG 12103C105K 12103C105K TAZH476K020L (CWR29JC476K) TAZH476K020L (CWR29JC476K) AVX AVX AVX AVX AVX 08053A333K 08053A821K TAZH227K010L (CWR29FC227K) TAZH227K010L (CWR29FC227K) TAZH227K010L (CWR29FC227K) AVX AVX 12103C105K 08053C104K AVX 08053C104K 8