MP6914 - Monolithic Power Systems

MP6914
Ideal Diode for Solar Panel Bypass
The Future of Analog IC Technology
DESCRIPTION
FEATURES
The MP6914 is an ideal diode that integrates a
30V, 5.3mΩ power MOSFET to replace bypass
diodes in photovoltaic panel. The power loss
can be significantly reduced with the MP6914
due to its low voltage drop and reverse leakage
current. The part is available with SOIC8-EP
package.




Integrated 5.3mΩ 30V Power Switch
Very low reverse leakage current
Rugged design for long lifetime
Available in SOIC8-EP package
APPLICATIONS

Bypass diode in photovoltaic panels
All MPS parts are lead-free and adhere to the RoHS directive. For MPS green
status, please visit MPS website under Quality Assurance. “MPS” and “The
Future of Analog IC Technology” are Registered Trademarks of Monolithic
Power Systems, Inc.
TYPICAL APPLICATION
VD
K
K
VD
VDD
A
MP6914 Rev. 1.0
10/29/2012
K
VD
VDD
VDD
A
A
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© 2012 MPS. All Rights Reserved.
1
MP6914 –IDEAL DIODE FOR SOLAR PANEL BYPASS
ORDERING INFORMATION
Part Number*
MP6914DN
Package
SOIC8E
Top Marking
MP6914
* For Tape & Reel, add suffix –Z (e.g. MP6914DN–Z);
For RoHS, compliant packaging, add suffix –LF (e.g. MP6914DN–LF–Z).
PACKAGE REFERENCE
ABSOLUTE MAXIMUM RATINGS (1)
Cathode to Anode .........................-0.8V to +30V
Continuous Power Dissipation (TA = +25°C) (2)
................................................................... 2.5W
Junction Temperature ...............................150C
Lead Temperature (Solder).......................260C
Storage Temperature ............... -55°C to +150C
Recommended Operation Conditions
(3)
VDD to Anode ....................................... 6V to 24V
Operating Junction Temp. (TJ). -40°C to +125°C
MP6914 Rev. 1.0
10/29/2012
Thermal Resistance
(4)
θJA
θJC
SOIC8E ................................... 50 ...... 10 ... C/W
Notes:
1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ(MAX), the junction-toambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any
ambient
temperature
is
calculated
by
Exceeding
the
maximum
D(MAX)=(TJ(MAX)-TA)/θJA.
allowable power dissipation will cause excessive die
temperature, and the regulator will go into thermal shutdown.
Internal thermal shutdown circuitry protects the device from
permanent damage.
3) The device is not guaranteed to function outside of its
operating conditions.
4) Measured on JESD51-7, 4-layer PCB.
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© 2012 MPS. All Rights Reserved.
2
MP6914 –IDEAL DIODE FOR SOLAR PANEL BYPASS
ELECTRICAL CHARACTERISTICS
TA= +25C, unless otherwise noted.
Parameter
VDD Voltage Range
VDD UVLO Rising
VDD UVLO Hysteresis
Operating Current
Quiescent Current
A-K Forward Voltage
Symbol
VDD
VDD_rs
VDD_hs
Iop
Iq
Vfwd
A-K Forward Voltage
Vfwd
Turn-off Total Delay
POWER SWITCH SECTION
Drain-Source Breakdown
Voltage(5)
TDoff
Conditions
VDD=12V, VAK=0.5V
VDD=12V, VAK=0V
IAK=1A
IAK=10A, Tj=25oC
IAK=10A, Tj=75oC
V(BR)DSS
VGS=0V, IKA=250µA
Gate-Threshold Voltage
VGS_th
VDS=VGS, IkA=250µA
AK Turn-on Threshold
Gate-Body Leakage
Leakage Current
VAK_ON
IGSS
ILK
VDD=12V
VDS=0V, VGS=±12V
From K to A, VDD=0V
ID=10A,
VGS=10V,,
Tj=25oC
VGS=10V,,
ID=10A,
Tj=75oC
Drain-Source
Resistance
On-State
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Body Diode Characteristics
Diode Forward Voltage
RDS(ON)
Min
6
3.4
0
Typ
Max
24
4.2
1
2
120
40
Units
V
V
V
mA
µA
mV
mV
mV
μs
2
3.8
0.6
1
90
30
53
61
4
30
32
V
1.9
V
60
20
125
±100
6
250
1
mV
nA
µA
5.3
mΩ
6.1
mΩ
pF
pF
pF
Ciss
Coss
Crss
VDS=30V, f=1MHz
2800
450
300
VAK
VDD=2.5V, IAK=1A
0.7
0.8
V
Note:
5) D is K, S is A, refer to “BLOCK DIAGRAM”
MP6914 Rev. 1.0
10/29/2012
www.MonolithicPower.com
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© 2012 MPS. All Rights Reserved.
3
MP6914 –IDEAL DIODE FOR SOLAR PANEL BYPASS
PIN FUNCTIONS
Pin #
Name
Description
1,4
2
3
5-8
EP
NC
VD
VDD
A
K
No Connection
Drain voltage sense, need to connect K pin.
Supply Voltage, reference to anode.
FET Source, also used as diode anode
FET Drain, also used as diode cathode
MP6914 Rev. 1.0
10/29/2012
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2012 MPS. All Rights Reserved.
4
MP6914 –IDEAL DIODE FOR SOLAR PANEL BYPASS
TYPICAL PERFORMANCE CHARACTERISTICS
VDD=12V, TA=+25C, tested on two-layered FR4 PCB with 70um Cu, otherwise noted
VDD Supply Current vs.
VDD Voltage
200
Forward Volatge vs.
Forward Current
o
VK=VA
90
160
Reverse Current
VDD=0V
VDD=12V, TJ=75 C
40
80
35
70
30
60
120
20
40
80
15
30
40
0
6
12
VDD (V)
18
24
70
20
10
10
5
0
0
60
600
45
400
40
200
35
30
0
10
20
30
40
0
0
2
4
6
8
10
12
FORWARD CURRENT (A)
MAX. FORWARD CURRENT (A)
30
VKA (V)
40
50
1000
800
50
20
1200
1000
55
10
1400
1200
65
0
0
2
4
6
8 10 12 14
FORWARD CURRENT (A)
FORWARD POWER (mW)
0
25
50
14
800
600
400
200
0
0
2
4
6
8
10
12
14
FORWARD CURRENT (A)
16
14
12
10
8
6
4
2
0
0
25
MP6914 Rev. 1.0
10/29/2012
50
75
100
125
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© 2012 MPS. All Rights Reserved.
5
MP6914 –IDEAL DIODE FOR SOLAR PANEL BYPASS
BLOCK DIAGRAM
Figure 1—Function Block Diagram
MP6914 Rev. 1.0
10/29/2012
www.MonolithicPower.com
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© 2012 MPS. All Rights Reserved.
6
MP6914 –IDEAL DIODE FOR SOLAR PANEL BYPASS
OPERATION
Photovoltaic cells can not generate power in
some conditions, such as clouds or fog. Due to
the mismatch currents betweens the series
connected cells, the shaded cells will work like a
load while the good cells still produce power.
They dissipate power instead of generating
power and cause hot spot. To protect the PV
from the damage due to hot spot, bypass diodes
in PV junction box are commonly used to allow
the current pass around the shaded PV cells.
MP6914 is comprised of an internal power
MOSFET and control circuits. It need an external
power for VDD and behaves like a diode.
Compared with a bypass diode, MP6914 has
significantly low forward voltage drop and a very
low reverse leakage current.
Turn-on Phase
When current goes through the internal body
diode, the body diode voltage drop from A to K
(>500mV) is much larger than the turn-on
threshold (125mV) of internal control circuitry,
which leads to the turn on of the internal
MOSFET. The control circuitry will regulate the
VAK at about 30mV by controlling the gate driver
voltage of the internal MOSFET.
Turn-off Phase
When the shaded PV cells start to generate
power (this means the voltage which drops
across A-K is smaller than 30mV), the control
circuitry stops working and the internal MOSFET
is turned off.
1.0 MP6914 Rev. 0.83
www.MonolithicPower.com
10/29/2012
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© 2012 MPS. All Rights Reserved.
7
MP6914 –IDEAL DIODE FOR SOLAR PANEL BYPASS
APPLICATION INFORMATION
Loss Calculation
The MP6914 provide solutions for photovoltaic
applications, designed to increase system
efficiency by implementing a bypass function
through a 5.3mΩpower MOSFET transistor
instead of a conventional Schottky diode.
MP6914 should be connected in parallel to the
cell string which is intended to be protected. In
normal work this string produce enery with a
voltage VKA . In normal work MP6914 comsumes
a power determined by:
PLOSS (W )  VKA (V) * IKA (A) * 106
Component Selection
A small capacitor is needed to keep a clean
voltage for VDD pin, 0.1μF is enough. A resistor of
1kΩ is needed between VD and K pins in order to
prevent noise from PV cells line. This resistor
doesn’t consume power.
PCB Layout Guide
As usually the current flowing into A pin through
K pin Is big, the copper plane connected to these
pins is recommended as big as possible, as
shown in the figures below:
Top Layer
Where IKA Is the reverse current (see Figure 3),
typically <3μA, so PLOSS is very small.
When this cell string is shaded to act as a load of
other cells, MP6914 will turn on the internal
MOSFET to prevent hot-spot issue. Now IKA is
the negative forward current I F (typically 0~10A),
equal to current in the real load of PV cells. VKA
is the negative forward voltage VF .if I F is below
5A, VF is clamped to about 30mV, otherwise can
be found in Figure “Forward Voltage vs. Forward
Current”. Then substituting
VF and I F into
previous equation can calculate out the loss in
this case.
PLOSS (W), JA (45-65oC/W), ambient temperature
(oC) and maximum allowed junction
temperature (150oC) decide the maximum IF (A).
In common case, this relation can be expressed:
Ta
Bottom Layer
IF  (150  Ta ) /(JA * VF * 0.001)
Where VF in mV, and can be found in the
anterior Figure “Forward Voltage vs. Forward
Current”, and the maximum IF is sketched in
Figure “Maximum Forward Current vs. Ambient
Temperature”.
1.0 MP6914 Rev. 0.83
www.MonolithicPower.com
10/29/2012
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2012 MPS. All Rights Reserved.
8
MP6914 –IDEAL DIODE FOR SOLAR PANEL BYPASS
The VDD decoupling capacitor should be closed to
VDD and A pins (C1 in the upper figure). The VD
resistor (R2 in the upper figure) connects a joint
close to K pin and keeps the VD trace short.
MP6914DN-00A is a good example.
Design Example
Below is a design example following the
application guidelines for the specifications:
Table 1: Design Example
VDD (V)
Vb (V)
Ib (IAK: A)
And many vias from top layer through bottom
layer needed for current conducting and thermal
radiating.
6-24
-0.8-30
0-10
The detailed application schematic is shown in
figure 2. The typical performance and circuit
waveforms have been shown in the Typical
Performance Characteristics section. For more
device applications, please refer to the related
Evaluation Board Datasheets.
TYPICAL APPLICATION CIRCUITS
U1
2
3
0
4
C1
2
1
NS
A
VD
A
VDD
A
NC
A
R2
EP
P1
NC
K
VDD
1
R1
1k
MP6914
8
7
this socket to solar panel
6
Vb+
5
C2
J2
NS
GND
GND
J1
GND
GND
GND
Vb-
Figure 2—24V/10A Application Circuit
1.0 MP6914 Rev. 0.83
www.MonolithicPower.com
10/29/2012
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2012 MPS. All Rights Reserved.
9
MP6914 –IDEAL DIODE FOR SOLAR PANEL BYPASS
PACKAGE INFORMATION
SOIC8E
0.189(4.80)
0.197(5.00)
8
0.124(3.15)
0.136(3.45)
5
0.150(3.80)
0.157(4.00)
PIN 1 ID
1
0.228(5.80)
0.244(6.20)
0.089(2.26)
0.101(2.56)
4
TOP VIEW
BOTTOM VIEW
SEE DETAIL "A"
0.013(0.33)
0.020(0.51)
0.051(1.30)
0.067(1.70)
SEATING PLANE
0.000(0.00)
0.006(0.15)
0.0075(0.19)
0.0098(0.25)
SIDE VIEW
0.050(1.27)
BSC
FRONT VIEW
0.010(0.25)
x 45o
0.020(0.50)
GAUGE PLANE
0.010(0.25) BSC
0.050(1.27)
0.024(0.61)
0o-8o
0.016(0.41)
0.050(1.27)
0.063(1.60)
DETAIL "A"
0.103(2.62)
0.213(5.40)
NOTE:
0.138(3.51)
RECOMMENDED LAND PATTERN
1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN
BRACKET IS IN MILLIMETERS.
2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS.
3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH
OR PROTRUSIONS.
4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING)
SHALL BE 0.004" INCHES MAX.
5) DRAWING CONFORMS TO JEDEC MS-012, VARIATION BA.
6) DRAWING IS NOT TO SCALE.
NOTICE: The information in this document is subject to change without notice. Please contact MPS for current specifications.
Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS
products into any application. MPS will not assume any legal responsibility for any said applications.
MP6914 Rev. 1.0
10/29/2012
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2012 MPS. All Rights Reserved.
10