Preliminary LP6218 26V/2.1A Current Boost IN SOT23-6 Package General Description Features Up to 94% efficiency Shut-down current:<1uA Output voltage Up to 24V 1MHz fixed frequency switching High switch on current:2.1A,24V@200mΩ Adjustable OCP: 0.5A-2A Available in SOT23-6 Package Applications Battery products Host Products Motor Power Devices Typical Application Circuit Vin Vout 4.7uH Ordering Information 5 LP6218 - 4 C3 22pF □ Vin FB EN NC 6 F: Pb-Free Package Type B6: SOT23-6h Pin Configurations 6 5 4 Marking Information LP6218B6F Please see website. 1 2 3 (SOT23-6) LP6218 –00 Version 1.0 Datasheet Sep.-2010 www.lowpowersemi.com R1 45K 3 2 □ □ 1 LP6218 C2 22uF LX C1 22uF GND The LP6218 is high efficiency Boost DC/DC Converter, fixed frequency, current-mode step-up converter with output to input disconnect. A PWM step-up DC/DC converters optimized to provide a high efficiency solution to medium power system. Its PWM circuitry with built-in 2.1A@200mΩ power mosfet makes this converter highly power efficiently. Selectable high switching frequency allows faster loop response and easy filtering with a low noise output. The non-inverting input its error amplifier is connected to an internal 0.6V precision reference voltage. Soft-start time can be programmed with an external capacitor, which sets the input current ramp rate. Current mode control and external compensation network make it easy and flexible to stabilize the system. the devices regulates the output voltage up to 12V from either a 2cell NiMH/NiCd or a single-cell Li-ion Battery with a 1MHz fixed frequency switching. These features minimize overall solution footprint by allowing the use of tiny, low profile inductors and ceramic capacitors. Page 1 of 5 R2 10K Preliminary LP6218 Functional Pin Description PIN PIN Name Description 1 LX 2 3 GND FB 4 EN 5 6 Vin NC Output switching node. SW is the drain of the internal N-Channel MOSFET and RDS-ON is 100mΩ. Connect the inductor to SW to Complete the step-up converter. Ground. Regulation Feedback Input. Connect to an external resistive voltage divider from the output to FB to set the output voltage.Vfb=0.6V. Regulator On/off Control Input. A logic high input(VEN>1.4V) turns on the regulator. A logic low input(VEN<0.4V) puts the LP6218 into low current shutdown mode. IC Power Supply. No Connector. Function Block Diagram LP6218 –00 Version 1.0 Datasheet Sep.-2010 www.lowpowersemi.com Page 2 of 5 Preliminary LP6218 Absolute Maximum Ratings Supply Input Voltage---------------------------------------------------------------------------------------------------------------6V Package Thermal Resistance SOT23-6, θJA ---------------------------------------------------------------------------------------------------------------68°C/W Lead Temperature (Soldering, 10 sec.) ----------------------------------------------------------------------------------260°C Storage Temperature Range --------------------------------------------------------------------------------- −65°C to 150°C Recommended Operating Conditions Supply Input Voltage------------------------------------------------------------------------------------------------- 2.2V to 6V SW Pin Voltage----------------------------------------------------------------------------------------------------------------- 26V EN Input Voltage -------------------------------------------------------------------------------------------------------0V to 5.5V Electrical Characteristics Parameter Conditions LP6218 Supply Voltage Min 2.2 Output Voltage Range 2.5 Supply Current(Shutdown) Supply Current Disable Supply Current Feedback Voltage Feedback Input Current Switching Frequency VEN=VOUT=0V,VSW=5V VFB=1.3V EN=GND 0.588 VFB=1.2V Maximum Duty Cycle EN Input Low Voltage EN Input High Voltage Mosfet On Resistance Mosfet Voltage(VDS) NMOS Current Limit OCP Adjustable Range Soft-start Reset Switch Resistance Soft-start Input Source Current LP6218 –00 Version 1.0 Datasheet 80 Typ. 0.05 0.2 0.1 0.6 50 1 Units Max 5 V 24 V 1 uA mA uA V nA MHz 0.612 85 90 % 0.6 V V mΩ V A A Ω uA 1.4 200 26 2.1 0.5 R3=10k-100kΩ VSS=1.2V Sep.-2010 2.5 100 4.0 www.lowpowersemi.com Page 3 of 5 Preliminary LP6218 Operation Information Output Voltage The error amplifier compares a sample of the dc-dc converter output voltage with the 0.6V (VREF) reference and generates an error signal for the PWM comparator. Output voltage of dc-dc converter is setting with the resistor divider by the following equation: Vout=(R1/R2+1) X 0.6V Oscillator The switching frequency of LP6218 up to operate at either 1MHz. Soft Start The soft start is functional after power on. The interval of soft start time is determined by a capacitor connected to SS pin. When EN pin is taken high, the soft start capacitor (CSS) is charged by a constant current of 4μA (typ). During this interval, the SS voltage directly controls the peak inductor current. The maximum load current is available after the soft-start interval is completed. Once the EN pin is taken low, the soft-start capacitor is discharged to ground to prepare for next start-up. The load must wait for the soft-start interval to finish before drawing a significant amount of load current. The duration after which the load can begin to draw maximum load current is: EN The LP6218 can be turn off to reduce the supply current to 0.1μA when EN is low. In this mode, the internal reference, error amplifier, comparators, and biasing circuitry turn off while the N-channel MOSFET is turned off. The boost converter’s output is connected to VCC by the external inductor and catch diode. Output Current Capability The output current capability of the LP6218 is a function of current limit, input voltage, operation frequency, and inductor value. Because of the slope compensation used to stabilize the feedback loop, LP6218 –00 Version 1.0 Datasheet Sep.-2010 the duty cycle affects the current limit. The output current capability is governed by the following equation: Current Limitation The internal power-MOS switch current is monitored cycle-by-cycle and is limited to the value not exceed 2A (Typ.). When the switch current reaches the limited value, the internal power-MOS is turned off immediately until the next cycle. A resistor between OCP and GND pin programs peak switch current. The resistor value should be between 10k and 100k. The current limit will be set from 2.5A to 0.5A. Keep traces at this pin as short as possible. Do not put capacitance at this pin. Layout considerations Typical for all switching power supplies, the layout is an important step in the design; especially at high peak currents and switching frequencies. If the layout is not carefully done, the regulator might show noise problem sand duty cycle jitter. The input capacitor should be placed as close as possible to the input pin for good input voltage viltering. The inductor and diode should be placed as close as possible to the switch pin to minimize the noise coupling into other circuits. Since the feedback pin and network is a high impedance circuit the feedback network should be routed away from the inductor. The feedback pin and feedback network should be shielded with a ground plane or trace to minimize noise coupling into this circuit. www.lowpowersemi.com Page 4 of 5 Preliminary LP6218 Packaging Information LP6218 –00 Version 1.0 Datasheet Sep.-2010 www.lowpowersemi.com Page 5 of 5