SP6200 SP6201 Micropower, 100mA and 200mA CMOS LDO

SP6200/6201
Micropower, 100mA and 200mA CMOS LDO Regulators
FEATURES
NC 1
■ Low Dropout Voltage: 160mV @ 100mA
■ High Output Voltage Accuracy: 2%
■ Ultra Low Shutdown Current: 1µA Max
■ Ultra Low GND Current:
• 200µA @ 200mA Load
• 28µA @ 100µA Load
■ Extremely Tight Load and Line Regulation
■ Current and Thermal Limiting
■ RESET Output (VOUT good)
■ Logic-Controlled Electronic Enable
■ Unconditionally Stable with 1µF Ceramic
■ Fixed Outputs:
• 1.5V, 1.8V, 2.5V, 2.7V, 2.85V, 3.0V, 3.3V, 3.5V, 5V
■ Adjustable Output Available
■ Tiny DFN Package (2mmX3mm) or SOT23-5
Now Available in Lead Free Packaging
8 EN
VIN 2
SP6201
VOUT 3
8 Pin DFN
NC 4
7 GND
6 NC
5
RESET/ADJ
APPLICATIONS
■ Cellular Telephones
■ Laptop, Notebooks and Palmtop Computers
■ Battery-Powered Equipment
■ Consumer/ Personal Electronics
■ SMPS Post-Regulator
■ DC-to-DC Modules
■ Medical Devices
■ Data Cable
■ Pagers
DESCRIPTION
The SP6200 and SP6201 are CMOS Low Dropout (LDO) regulators designed to meet a broad range of applications that
require accuracy, speed and ease of use. These LDOs offer extremely low quiescent current which only increases
slightly under load, thus providing advantages in ground current performance over bipolar LDOs. The LDOs handle an
extremely wide load range and guarantee stability with a 1µF ceramic output capacitor. They have excellent low
frequency Power Supply Rejection Ratio (PSRR), not found in other CMOS LDOs and thus offer exceptional Line
Regulation. High frequency PSRR is better than 40dB up to 400kHz. Load Regulation is excellent and temperature
stability is comparable to bipolar LDOs. An enable feature is provided on all versions.
The SP6200/6201 is available in fixed and adjustable output voltage versions in tiny DFN and small SOT-23-5
packages. A VOUT good indicator is provided on all fixed output versions.
TYPICAL APPLICATION CIRCUIT
Fixed Output Voltage
470kΩ
VIN
1
CIN = 1µF
2
Enable
Shutdown
VOUT
5
COUT = 1µF
SP6200
SP6201
3
4
EN
RSN (VOUT good)
EN (pin 3) may be connected
directly to IN (pin 1).
Date: 5/5/06 Rev A
SP6200/6201 100/200mA CMOS LDO Regulator
1
© Copyright 2006 Sipex Corporation
ABSOLUTE MAXIMUM RATINGS, NOTE 1
OPERATING RATINGS, NOTE 2
These are stress ratings only and functional operation of
the device at these ratings or any other above those
indicated in the operation sections of the specifications
below is not implied. Exposure to absolute maximum
rating conditions for extended periods of time may affect
reliability.
Input Voltage (VIN)..................................+2.5V to +6V
Enable Input Voltage (VEN)..........................0V to +6V
Junction Temperature (TJ)................-40˚C to +125˚C
Thermal Resistance (See Note 3):
SOT-23-5 (θJA).................................................191˚C/W
8 Pin DFN (θJA)............................................ .....59˚C/W
(See Note 3)
Supply Input Voltage (VIN) ............................. -2V to 7V
Output Voltage (VOUT) ......................... -0.6 to (VIN +1V)
Enable Input Voltage (VEN) ............................ -2V to 7V
Power Dissipation (PD) .......... Internally Limited, Note 3
Lead Temperature (soldering 5s) ....................... 260°C
Storage Temperature ........................ -65˚C to +150˚C
ELECTRICAL CHARACTERISTICS
VIN = VOUT +1V, VO = 5V for ADJ, IL = 100µA, CIN = 1.0µF, COUT = 1.0µF, TJ = 25°C , unless otherwise specified. The ♦ denotes the specifications
which apply over the full operating temperature range, unless otherwise specified.
PARAMETER
Output Voltage Accuracy, (VO)
Reference Voltage
MIN
TYP
MAX
UNIT
♦
2
3
%
%
♦
V
♦
-2
-3
1.213
Output Voltage Temperature
Coefficient, Note 4, (∆VO/∆T)
1.250
1.287
60
Minimum Supply Voltage
2.50
2.55
2.70
3.00
CONDITIONS
Variation from specified VOUT
Adjustable version only
ppm/ °C
2.70
2.80
2.95
3.50
V
V
V
V
IL = 100µA
IL = 50mA
IL = 100mA
IC = 200mA
Line Regulation, (∆VO/ VIN)
0.03
0.2
%/ V
♦
VIN = (VOUT + 1V) to 6V
Load Regulation, Note 5, (∆VO / VO)
0.07
0.14
0.25
0.50
%
%
♦
♦
IL = 0.1mA to 100mA, SP6200
IL = 0.1mA to 200mA, SP6201
SP6200-1.5V & 1.8 Load Regulation
SP6201-1.5V & 1.8 Load Regulation
0.3
0.3
1
1
%
%
Dropout Voltage, Note 6, (VIN – VO)
(Not applicable to voltage options below
0.2
4
7
mV
mV
♦
2.7V)
70
120
160
mV
mV
♦
250
300
mV
mV
♦
400
500
mV
mV
♦
0.01
1
µA
♦
28
40
45
µA
µA
♦
200
250
µA
µA
♦
VEN ≥2.0V, IL = 100mA, SP6200
only (for 1.5 & 1.8, VIN = 2.95)
400
500
µA
µA
♦
VEN ≥2.0V, IL = 200mA, SP6201
Only (for 1.5 & 1.8, VIN = 3.5)
160
320
Shutdown Quiescent Current, (IGND)
Ground Pin Current, Note 7, (IGND)
110
200
Power Supply Rejection Ratio,
(PSRR)
Current Limit, (ICL)
Thermal Limit
Date: 5/5/06 Rev A
78
40
100
300
140
420
IL = 0.1mA to 100mA, VIN = 2.95V
IL = 0.1mA to 200mA, VIN = 3.5V
IL = 100µA
IL = 50mA
IL = 100mA
IL = 200mA, SP6201 Only
VEN ≥ 2.0V, IL = 100µA
Frequency =100Hz, IL =10mA
Frequency = 400Hz, IL =10mA
dB
200
600
162
147
mA
mA
♦
♦
°C
°C
SP6200/6201 100/200mA CMOS LDO Regulator
2
VEN ≥ 0.4V
SP6200
SP6201
Turns On
Turns Off
© Copyright 2006 Sipex Corporation
ELECTRICAL CHARACTERISTICS: Continued
VIN = VOUT +1V, VO = 5V for ADJ, IL = 100µA, CIN = 1.0µF, COUT = 1.0µF, TJ = 25°C , unless otherwise specified. The ♦ denotes the
specifications which apply over the full operating temperature range, unless otherwise specified.
PARAMETER
MIN
Thermal Regulation,
Note 8, (∆VO/∆PD)
TYP
MAX
UNITS
0.05
%/W
150
µVrms
♦
Output Noise, (e no)
CONDITIONS
IL = 50mA, CL = 1µF
0.1µF from VOUT to Adj.
10Hz to 100kHz
ENABLE INPUT
Enable Input Logic-Low Voltage,
(VIL)
Enable Input Logic-High Voltage,
(VIH)
0.4
1.6
Enable Input Current, (IIL), (IIH)
Reset Not Output
-2
V
♦
Regulator Shutdown
V
♦
Regulator Enabled
0.01
1
µA
♦
VIL < 0.4V
0.01
1
µA
♦
VIH > 2.0V
-4
-6
%
Threshold
Note 1. Exceeding the absolute maximum rating may damage the device.
Note 2. The device is not guaranteed to function outside its operating rating.
Note 3. The maximum allowable power dissipation at any TA (ambient temperature) is PD (MAX) = (TJ (MAX) – TA) / θϑA.
Exceeding the maximum allowable power dissipation will result in excessive die temperature, and the regulator will
go into thermal shutdown. The θJA of the SP6200/6201 (all versions) is 191°C/W for the SOT-23-5 and 59°C/W for
the DFN package on a standard 4 layer board (see “Thermal Considerations” section for further details).
Note 4. Output voltage temperature coefficient is defined as the worst case voltage change divided by the total
temperature range.
Note 5. Load Regulation is measured at constant junction temperature using low duty cycle pulse testing. Parts are
tested for load regulation in the load range; from 0.1mA to 100mA, SP6200; from 0.1mA to 200mA, SP6201. Changes
in output voltage due to heating effects are covered by the thermal regulation specification. Not applicable to output
voltages less than 2.5V.
Note 6. Dropout Voltage is defined as the input to output differential at which the output voltage drops 2% below
its nominal value measured at 1V differential. Not applicable to output voltages less than 2.7V.
Note 7. Ground pin current is the regulator quiescent current. The total current drawn from the supply is the sum
of the load current plus the ground pin current.
Note 8. Thermal regulation is defined as the change in output voltage at a time ”t” after a change in power dissipation
is applied, excluding load or line regulation effects. Specifications are for a 100mA load pulse at VIN = 6V for t = 10ms.
Date: 5/5/06 Rev A
SP6200/6201 100/200mA CMOS LDO Regulator
3
© Copyright 2006 Sipex Corporation
OUT
VIN
VOUT
C OUT
Enable
-
Current Limit
and Thermal
Shutdown
+
R2
VREF
Bandgap
REF
R PULL
1.25V
R1
RSN
RESET
1.20V
GND
Figure 1. Fixed Voltage Regulator
VIN
IN
OUT
VOUT
C OUT
Enable
EN
-
+
R2
Current Limit
and Thermal
Shutdown
C BYP
(option)
ADJ
VREF
Bandgap
REF
1.25V
R1
RSN
1.20V
VOUT = V REF
R2
+1
R1
GND
Figure 2. Adjustable Voltage Regulator
Date: 5/5/06 Rev A
SP6200/6201 100/200mA CMOS LDO Regulator
4
© Copyright 2006 Sipex Corporation
PIN DESCRIPTION
SOT 23-5
PIN NUMBER
PIN CONFIGURATION
NAME
FUNCTION
1
IN
Supply Input
2
GND
3
EN
4
RSN (Reset Not)
4
ADJ
Adjustable (Input): Adjustable regulator feedback
input. Connect resistor voltage divider.
5
OUT
Regulator Output
8 PIN DFN
Ground
Enable/Shutdown (Input): CMOS or TTL compatible
input. Logic high = enable, logic low = shutdown
Open drain indicating that VOUT is good
PIN CONFIGURATION
PIN NUMBER
NAME
FUNCTION
1
NC
No Connect
2
VIN
Supply Input
3
VOUT
Regulator Input
4
NC
No Connect
5 (Fixed)
RSN
Open drain indicating that VOUT is good
5 (Adj.)
ADJ
Adjustable (Input): Adjustable regulator feedback
input. Connect resistor voltage divider.
6
NC
No Connect
7
GND
8
EN
Date: 5/5/06 Rev A
Ground
Enable/Shutdown (Input): CMOS or TTL compatible
input. Logic high = enable, logic low = shutdown
SP6200/6201 100/200mA CMOS LDO Regulator
5
© Copyright 2006 Sipex Corporation
THEORY OF OPERATION
An accurate 1.250V bandgap reference is
bootstrapped to the output in fixed output versions of 2.7V and higher. This increases both the
low frequency and high frequency PSRR. The
adjustable version also has the bandgap reference bootstrapped to the output, thus the lowest
externally programmable output voltage is 2.7V.
The 2.5V fixed output version has the bandgap
always connected to the Vin pin. Unlike many
LDOs, the bandgap reference is not brought out
for filtering by the user. This tradeoff was maid
to maintain good PSRR at high frequency (PSRR
can be degraded in a system due to switching
noise coupling into this pin). Also, often leakages of the bypass capacitor or other components cause an error on this high impedance
bandgap node. Thus, this tradeoff has been
made with "ease of use" in mind.
General Overview
The SP6200 and SP6201 are CMOS LDOs
designed to meet a broad range of applications
that require accuracy, speed and ease of use.
These LDOs offer extremely low quiescent current which only increases slightly under load,
thus providing advantages in ground current
performance over bipolar LDOs. The LDOs
handle an extremely wide load range and guarantee stability with a 1µF ceramic output capacitor. They have excellent low frequency
PSRR, not found in other CMOS LDOs and thus
offer exceptional Line Regulation. High frequency PSRR is better than 40dB up to 400kHz.
Load Regulation is excellent and temperature
stability is comparable to bipolar LDOs. Thus,
overall system accuracy is maintained under all
DC and AC conditions. Enable feature is provided on all versions. A Vout good indicator
(RSN pin) is provided in all the fixed output
voltage devices. An adjustable output version is
also available. Current Limit and Thermal protection is provided internally and is well controlled.
Protection
Current limit behavior is very well controlled,
providing less than 10% variation in the current
limit threshold over the entire temperature range
for both SP6200 and SP6201. The SP6200 has a
current limit of 140mA, while the SP6201 has a
current limit of 420mA. Thermal shutdown activates at 162°C and deactivates at 147°C. Thermal shutdown is very repeatable with only a 2 to
3 degree variation from device to device. Thermal shutdown changes by only 1 to 2 degrees
with Vin change from 4V to 7V.
Architecture
The SP6200 and SP6201 are only different in
their current limit threshold. The SP6200 has a
current limit of 140mA, while the SP6201 current limit is 420mA. The SP6201 can provide
pulsed load current of 300mA. The LDOs have
a two stage amplifier which handles an extremely wide load range (10µA to 300mA) and
guarantees stability with a 1µF ceramic load
capacitor. The LDO amplifier has excellent gain
and thus touts PSRR performance not found in
other CMOS LDOs. The amplifier guarantees
no overshoot on power up or while enabled
through the EN pin. The amplifier also contains
an active pull down, so that when the load is
removed quickly the output voltage transient is
minimal; thus output deviation due to load transient is small and fairly well matched when
connecting and disconnecting the load.
Date: 5/5/06 Rev A
Enable (Shutdown Not) Input
The LDOs are turned off by pulling the EN pin
low and turned on by pulling it high. If it is not
necessary to shut down the LDO, the EN (pin 3)
should be tied to IN (pin 1) to keep the regulator
output on at all time. The enable threshold is
0.9V and does not change more than 100mV
over the entire temperature and Vin voltage
range. The lot to lot variations in Enable Threshold is also within 100mV. Shutdown current is
guaranteed to be <1uA without requiring the
user to pull enable all the way to 0V. Standard
TTL or CMOS levels will transition the device
from totally on to totally off.
SP6200/6201 100/200mA CMOS LDO Regulator
6
© Copyright 2006 Sipex Corporation
THEORY OF OPERATION: Continued
Input Capacitor
A small capacitor, 1µF or higher, is required
from VIN to GND to create a high frequency
bypass for the LDO amplifier. Any ceramic or
tantalum capacitor may be used at the input.
Capacitor ESR (effective series resistance)
should be smaller than 3Ω.
Reset Not (VOUT good) Output
An accurate Vout good indicator is provided on
all the fixed output version devices, pin 4 (RSN),
Figure 1. This is an open drain, logic output that
can be used to hold a microprocessor or microcontroller in a RESET condition when it's power
supplied by Vout is 4% out of nominal regulation. A 1% hysteresis is included in the Reset
Not function, so that false alarms are not issued
as a result of LDO's output noise. The Reset Not
function reacts in 10 to 50µs.
Output Capacitor
An output capacitor is required between VOUT
and GND to prevent oscillation. A capacitance
as low as 0.22µF can fulfill stability requirements in most applications. A 1µF capacitor
will ensure unconditional stability from no load
to full load over the entire input voltage, output
voltage and temperature range. Larger capacitor
values improve the regulator's transient response.
The output capacitor value may be increased
without limit. The output capacitor should have
an ESR (effective series resistance) below 5Ω
and a resonant frequency above 1MHz.
Adjustable Output Version
The adjustable version can be programmed to
any voltage from 2.7V to 6V for the industrial
temperature range; 2.5V to 6V for the commercial temperature range. The output can not be
programmed below 2.5V due a headroom restriction. Since the bandgap is bootstrapped to
the output, the output voltage must be above the
minimum bandgap supply voltage. The bandgap
requires 2.7V or greater at -40°C and requires
2.5V or greater at 0°C.
The regulator's output can be adjusted to a
specific output voltage by using two external
resistors, Figure 2. The resistor's set the output
voltage based on the following equation:
No Load Stability
The SP6200/6201 will remain stable and in
regulation with no external load (other than the
internal voltage driver) unlike many other voltage regulators. This is especially important in
CMOS RAM keep-alive applications.
VOUT = 1.25 (R2/R1 + 1)
Thermal Considerations
The SP6200 is designed to provide 100mA of
continuous current, while the SP6201 will provide 200mA of continuous current. Maximum
power dissipation can be calculated based on the
output current and the voltage drop across the
part. To determine the maximum power dissipation in the package, use the junction-to-ambient
thermal resistance of the device and the following basic equation:
(T
-T )
PD = J(max) A
θJA
Resistor values are not critical because the ADJ
node has a high input impedance, but for best
results use resistors of 470kΩ or less. A capacitor from ADJ to Vout pin provides improved
noise performance as is shown in the following
plot.
Noise Performance 10Hz to 100kHz
Output Noise (uVrms)
400
Adj, Vin = 4.3V, Vout = 3.3V (Cin = Cout = 1uF)
300
TJ(max) is the maximum junction temperature of
the die and is 125°C. TA is the ambient operating.
θJA is the junction-to-ambient thermal resistance
for the regulator and is layout dependent.
The actual power dissipation of the regulator
circuit can be determined using one simple
200
100
1.0E+02
1.0E+03
1.0E+04
1.0E+05
1.0E+06
1.0E+07
Bypass Cap from Vout to FB (pF)
Date: 5/5/06 Rev A
SP6200/6201 100/200mA CMOS LDO Regulator
7
© Copyright 2006 Sipex Corporation
THEORY OF OPERATION: Continued
equation:
PD = (VIN - VOUT)*IOUT + VIN*IGND
≅ (VIN - VOUT) * IOUT
Substituting PD(max) for PD and solving for the
operating conditions that are critical to the application will give the maximum operating conditions for the regulator circuit. For example, if
we are operating the SP6201- 3.0V at room
temperature, with a SOT-23-5 package on a 4
layer standard board we can determine the maximum input voltage for a set output current.
PD(max) = (125°C -25°C) = 0.52W
(191°C/W)
To prevent the device from entering thermal
shutdown, maximum power dissipation can not
be exceeded. Using the output voltage of 3.0V
and an output current of 200 mA, the maximum
input voltage can be determined. Ground pin
current can be taken from the electrical spec’stable (IGND=200uA at IOUT=200mA). The maximum input voltage is determined as follows:
0.52W = (VIN – 3.0V)*200mA + VIN*0.2mA
Solving for VIN, we get:
VIN =
(0.52W + 0.6W)
200.2mA
After calculations, we find that the maximum
input voltage of a 3.0V application at 200mA of
output current in an SOT-23-5 package is 5.59V.
Dual-Supply Operation
When used in dual supply systems where the
regulator load is returned to a negative supply,
the output voltage must be diode clamped to
ground.
Date: 5/5/06 Rev A
SP6200/6201 100/200mA CMOS LDO Regulator
8
© Copyright 2006 Sipex Corporation
TYPICAL CHARACTERISTICS
27°C, VIN = 5.5V, IO = 0.1mA, CIN = COUT = 1µF unless otherwise specified.
Dropout vs. Temp (SP6201 fixed 3.0V)
Dropout vs. Io (SP6201 fixed 3.0V)
400
350
T=125 deg
350
300
T=27deg
T=-40 deg
300
Dropout (mV)
250
200
150
100
50
0
-50
0
100
150
Io=50mA
150
50
50
Io=100mA
200
100
0
Io=200mA
250
200
-20
10
40
Io (mA)
100
130
Iq vs. Vin (fixed 3.0V, Io=0uA)
Dropout vs. Temp (SP6201 fixed 3.0V)
50
2.5
2.0
35
45
Io=1mA
35
1.5
1.0
30
EN = Vin
EN = 0V
40
Io=0.1mA
Iq (uA)
Dropout (mV)
70
Temp (deg)
25
30
20
25
20
15
15
10
10
0.5
5
5
0.0
0
0
-50
-20
10
40
70
100
130
0
1
2
3
5
6
7
Iq vs. Temp (SP6201 fixed 3.0V, EN=0V, Io=0uA)
Iq vs. Temp (SP6201 fixed 3.0V, EN=Vin, Io=0uA)
250
50
Vin = 7V
Vin =5.5V
45
Vin = 7V
Vin = 5.5V
200
Vin = 4V
Vin = 4V
150
40
Iq (nA)
Iq (uA)
4
Vin (V)
Temp (deg)
35
100
50
30
25
-50
-20
10
40
70
100
0
-50
130
-20
10
40
70
100
130
Temp (deg)
Temp (deg)
Ignd vs. Io (SP6201 fixed 3.0V)
Ignd vs. Vin (SP6201 fixed 3.0V)
220
350
250
200
Ignd (uA)
Io=200mA
Io=150mA
Io=100mA
Io=50mA
Io=0.1mA
300
Ignd (uA)
Iq (nA)
Dropout (mV)
400
150
100
195
Vin = 7V
170
Vin = 5.5V
Vin = 4V
145
120
95
70
50
45
20
0
3
Date: 5/5/06 Rev A
4
5
Vin (V)
6
0
7
50
SP6200/6201 100/200mA CMOS LDO Regulator
9
100
Io (mA)
150
200
© Copyright 2006 Sipex Corporation
TYPICAL CHARACTERISTICS: Continued
27°C, VIN = 5.5V, IO = 0.1mA, CIN = COUT = 1µF unless otherwise specified.
Vout vs. Temp (fixed 3.3V)
Vout vs. Temp (fixed 3.0V)
3.33
3.03
Vin = 7V
3.02
Vin = 7V
3.32
Vin = 4V
Vin = 4V
3.31
Vout (V)
Vout (V)
3.01
3.00
2.99
3.30
3.29
3.28
2.98
2.97
3.27
-50
-20
10
40
Temp (deg)
70
100
130
-50
-20
10
40
70
100
130
Temp (deg)
Vout vs. Temp (adjustable)
Vout vs. Temp (adjustable)
2.90
3.35
2.85
3.25
2.85Vout
Vout (V)
Vout (V)
3.3Vout
2.80
2.7Vout
2.75
3.0Vout
3.15
3.05
2.70
2.95
2.65
-50
-20
10
40
70
100
-50
130
-20
10
40
130
5.05
5.04
2.520
2.515
5.03
2.5Vout
5.0Vout
5.02
Vout (V)
2.510
Vout (V)
100
Vout vs. Temp (adjustable)
Vout vs. Temp (adjustable)
2.525
2.505
2.500
2.495
5.01
5.00
4.99
2.490
4.98
2.485
4.97
4.96
2.480
4.95
2.475
-50
-20
10
40
70
100
-50
130
-20
10
40
70
100
130
Temp (deg)
Temp (deg)
Load Regulation (SP6201 fixed 3.0V)
Line Regulation (SP6201 fixed 3.0V)
3.004
3.006
Io=0.1mA
Io=1mA
Io=50mA
Io=100mA
Io=200mA
3.002
Vin = 7V
Vin = 5.5V
Vin = 4V
3.002
3.000
Vout (V)
3.004
Vout (V)
70
Temp (deg)
Temp (deg)
3.000
2.998
2.998
2.996
2.994
2.996
2.992
2.994
3
4
5
6
0
7
50
Vin (V)
Date: 5/5/06 Rev A
100
150
200
250
300
Io (mA)
SP6200/6201 100/200mA CMOS LDO Regulator
10
© Copyright 2006 Sipex Corporation
TYPICAL CHARACTERISTICS: Continued
27°C, VIN = 5.5V, IO = 0.1mA, CIN = COUT = 1µF unless otherwise specified.
Current Limit vs. Temp (fixed 3.3V, Vin=4V)
Current Limit vs. Temp (fixed 3.3V, Vin=4V)
600
200
SP6201-3.3
SP6200-3.3
Icl (mA)
Icl (mA)
500
400
300
-50
0
50
100
150
100
-50
150
0
Temp (deg)
50
100
Turn on time, Io=1mA, 4Vin
Turn on time, Io=100mA, 4Vin
VOUT
VOUT
3V
SP6201 - 3.0Vout fixed
Ven is toggled, Vin = 4V
Iout = 1mA
Cin = Cout = 1uF Cer. Cap
3V
SP6201 - 3.0Vout fixed
Ven is toggled, Vin = 4V
Iout = 100mA
Cin = Cout = 1uF Cer. Cap
2V
1V
2V
1V
0V
0V
VEN
VEN
4V
4V
2V
2V
0V
0V
Turn on time, Io=100mA, 7Vin
Turn on time, Io=300mA, 4Vin
VOUT
SP6201 - 3.0Vout fixed
Ven is toggled, Vin = 4V
Iout = 300mA
Cin = Cout = 1uF Cer. Cap
VOUT
SP6201 - 3.0Vout fixed
Ven is toggled, Vin = 7V
Iout = 100mA
Cin = Cout = 1uF Cer. Cap
3V
2V
1V
0V
0V
VEN
VEN
4V
0V
0V
Turn off time, Io=1mA, 4Vin
Turn off time, Io=50mA, 4Vin
3V
VOUT
2V
1V
SP6201 - 3.0Vout fixed
Ven is toggled, Vin = 4V
Iout = 50mA
Cin = Cout = 1uF Cer. Cap
3V
2V
1V
0V
0V
VEN
VEN
4V
4V
2V
2V
0V
Date: 5/5/06 Rev A
4V
2V
2V
SP6201 - 3.0Vout fixed
Ven is toggled, Vin = 4V
Iout= 1mA
Cin = Cout = 1uF Cer. Cap
3V
2V
1V
VOUT
150
Temp (deg)
0V
SP6200/6201 100/200mA CMOS LDO Regulator
11
© Copyright 2006 Sipex Corporation
TYPICAL CHARACTERISTICS: Continued
27°C, VIN = 5.5V, IO = 0.1mA, CIN = COUT = 1µF unless otherwise specified.
Turn off time, Io=100mA, 4Vin
SP6201 - 3.0Vout fixed
Ven is toggled, Vin = 4V
Iout = 100mA
Cin = Cout = 1uF Cer. Cap
VOUT
Turn off time, Io=100mA, 7Vin
3V
SP6201 - 3.0Vout fixed
Ven is toggled, Vin = 7V
Iout = 100mA
Cin = Cout = 1uF Cer. Cap
VOUT
2V
1V
0V
VEN
VEN
4V
4V
2V
2V
0V
0V
Inrush Current, Io=100uA
Inrush Current, Io=100mA
750mA
650mA
2V
1V
0V
SP6201 - 3.0Vout fixed, Vin=4V
Ven is toggled, Iout=100mA
Cin = Cout = 1uF Cer. Cap
3V
500mA
SP6201 - 3.0Vout fixed, Vin=4V
Ven is toggled, Iout = 100uA
Cin = Cout = 1uF Cer. Cap
650mA
500mA
II
250mA
250mA
0mA
0mA
VOUT
VOUT
2V
2V
0V
0V
VEN
VEN
4V
4V
2V
2V
0V
0V
Load Transient Response, 100mA step, 7Vin
Load Transient Response, 100mA step, 4Vin
80mV
80mV
60mV
SP6201 - 3.0Vout fixed
Vin = 4V, Iout = 100mA
Cin = Cout = 1uF Cer. Cap
60mV
SP6201 - 3.0Vout fixed
Vin = 7V , Iout = 100mA
Cin = Cout = 1uF Cer. Cap
VOUT
40mV
VOUT
40mV
20mV
20mV
0mV
0mV
-20mV
-20mV
-40mV
-40mV
I OUT
100uA
Tr = Tf = 100ns
I OUT
100uA
100mA
Tr = Tf = 100ns
100mA
0mA
0mA
Load Transient Response, 300mA step, 4Vin
Load Transient Response, 200mA step, 4Vin
200mV
200mV
150mV
SP6201 - 3.0Vout fixed
Vin = 4V , Iout = 200mA
Cin = Cout = 1uF Cer. Cap
VOUT
150mV
SP6201 - 3.0Vout fixed
Vin = 4V, Iout = 300mA
Cin = Cout = 1uF Cer. Cap
100mV
VOUT
100mV
50mV
50mV
0mV
0mV
-50mV
-50mV
I OUT
200mA
100uA
Date: 5/5/06 Rev A
I OUT
Tr = Tf = 100ns
100uA
Tr = Tf = 100ns
100mA
200mA
0mA
0mA
SP6200/6201 100/200mA CMOS LDO Regulator
12
© Copyright 2006 Sipex Corporation
TYPICAL CHARACTERISTICS: Continued
27°C, VIN = 5.5V, IO = 0.1mA, CIN = COUT = 1µF unless otherwise specified.
Power Supply Rejection Ratio
Power Supply Rejection Ratio
REF LEVEL
0.000dB
REF LEVEL
0.000dB
/DIV
10.000dB
/DIV
10.000dB
0
0
-20
(dB)
-20
(dB)
-40
-40
-60
-60
IOUT = 100µA
COUT = 1µF
VIN = 4V
VOUT = 3V
-80
IOUT = 1mA
COUT = 2.2µF
-80
-100
10
-100
10
START
100
1k
10k
100k
10.000Hz
1M
START
10M
100
1k
10M
Power Supply Rejection Ratio
/DIV
10.000dB
REF LEVEL
0.000dB
0
-20
-20
(dB)
0
(dB)
-40
/DIV
10.000dB
-40
-60
-60
-100
10
100
10.000Hz
1k
10k
100k
1M
IOUT = 100mA
COUT = 2.2µF
-80
IOUT = 10mA
COUT = 2.2µF
-80
START
1M
Frequency (HZ)
Power Supply Rejection Ratio
-100
10
100k
STOP 10 000 000.000Hz
Frequency (HZ)
REF LEVEL
0.000dB
10k
10.000Hz
STOP 10 000 000.000Hz
START
10M
100
10.000Hz
STOP 10 000 000.000Hz
10k
100k
1M
10M
STOP 10 000 000.000Hz
Frequency (HZ)
Frequency (HZ)
Date: 5/5/06 Rev A
1k
SP6200/6201 100/200mA CMOS LDO Regulator
13
© Copyright 2006 Sipex Corporation
PACKAGE: 5 PIN SOT-23
D
D/2
e1
SIDE VIEW
5
4
E/2
E1/2
A2
A
E
E1
Seating
Plane
A1
2
1
Pin1 Designator
to be within this
INDEX AREA
(D/2 x E1/2)
3
(L1)
e
b
TOP VIEW
ø1
FRONT VIEW
R1
R
Gauge Plane
L2
ø
L
5 Pin SOT-23
SYMBOL
A
A1
A2
c
D
E
E1
L
L1
L2
R
R1
Ø
ø1
Date: 5/5/06 Rev A
Seating
Plane
ø1
JEDEC MO-178
Dimensions in Millimeters:
Controlling Dimension
MIN
0.00
0.90
0.08
NOM
MAX
1.45
0.15
1.15
1.30
0.22
2.90 BSC
2.80 BSC
1.60 BSC
0.30
0.45
0.60
0.60 REF
0.25 BSC
0.10
0.10
0.25
0º
4º
8º
5º
10º
15º
b
0.30
0.50
e
0.95 BSC
1.90 BSC
e1
SIPEX Pkg Signoff Date/Rev:
c
Variation AA
Dimensions in Inches
Conversion Factor:
1 Inch = 25.40 mm
MIN
0.000
0.036
0.004
NOM
0.045
0.115 BSC
0.111 BSC
0.063 BSC
0.012
0.018
0.024 REF
0.010 BSC
0.004
0.004
0º
4º
5º
10º
0.012
0.038 BSC
0.075 BSC
JL Oct3-05 / Rev A
SP6200/6201 100/200mA CMOS LDO Regulator
14
MAX
0.057
0.006
0.051
0.009
0.024
0.010
8º
15º
0.020
© Copyright 2006 Sipex Corporation
PACKAGE: 8 PIN DFN
D2
D
D/2
D2/2
5
6
7
8
E/2
E2/2
E
E2
K
L
4
Pin1 Designator
to be within this
INDEX AREA
(D/2 x E/2)
3
2
e
TOP VIEW
1
b
INDEX AREA
(D/2 x E/2)
BOTTOM VIEW
ø
A
(A3)
A1
Seating Plane
SIDE VIEW
2x3 8 Pin DFN
SYMBOL
Dimensions in Millimeters:
Controlling Dimension
MIN
0.80
0.00
A
A1
A3
K
ø
b
D
D2
E
E2
e
L
JEDEC MO-229
0.20
0º
0.18
1.50
1.60
0.30
NOM
0.90
0.02
0.20 REF
0.25
2.00 BSC
3.00 BSC
0.50 BSC
0.40
Dimensions in Inches
Conversion Factor:
1 Inch = 25.40 mm
MAX
1.00
0.05
MIN
0.032
0.000
14º
0.30
0.008
0º
0.008
1.75
0.059
1.90
0.063
0.50
0.012
SIPEX Pkg Signoff Date/Rev:
Date: 5/5/06 Rev A
VARIATION VCED-2
NOM
0.036
0.001
0.008 REF
0.010
0.079 BSC
0.118 BSC
0.020 BSC
0.016
MAX
0.039
0.002
14º
0.012
0.069
0.075
0.020
JL Aug18-05 / RevA
SP6200/6201 100/200mA CMOS LDO Regulator
15
© Copyright 2006 Sipex Corporation
ORDERING INFORMATION
Top Mark
Temperature
Range
Voltage
Option
SP6200EM5
SP6200EM5/TR
SP6200EM5-1-5
SP6200EM5-1-5/TR
SP6200EM5-1-8
SP6200EM5-1-8/TR
SP6200EM5-2-5
SP6200EM5-2-5/TR
SP6200EM5-2-7
SP6200EM5-2-7/TR
SP6200EM5-2-85
SP6200EM5-2-85/TR
SP6200EM5-3-0
SP6200EM5-3-0/TR
SP6200EM5-3-3
SP6200EM5-3-3/TR
SP6200EM5-3-5
SP6200EM5-3-5/TR
SP6200EM5-5-0
SP6200EM5-5-0/TR
EADJ
EADJ
E15
E15
E18
E18
E25
E25
E27
E27
E285
E285
E30
E30
E33
E33
E35
E35
E50
E50
-40˚C to +125˚C
-40˚C to +125˚C
-40˚C to +125˚C
-40˚C to +125˚C
-40˚C to +125˚C
-40˚C to +125˚C
-40˚C to +125˚C
-40˚C to +125˚C
-40˚C to +125˚C
-40˚C to +125˚C
-40˚C to +125˚C
-40˚C to +125˚C
-40˚C to +125˚C
-40˚C to +125˚C
-40˚C to +125˚C
-40˚C to +125˚C
-40˚C to +125˚C
-40˚C to +125˚C
-40˚C to +125˚C
-40˚C to +125˚C
ADJ
ADJ
1.5V
1.5V
1.8V
1.8V
2.5V
2.5V
2.7V
2.5V
2.85V
2.85V
3.0V
3.0V
3.3V
3.3V
3.5V
3.5V
5.0V
5.0V
5 Pin SOT-23
5 Pin SOT-23
5 Pin SOT-23
5 Pin SOT-23
5 Pin SOT-23
5 Pin SOT-23
5 Pin SOT-23
5 Pin SOT-23
5 Pin SOT-23
5 Pin SOT-23
5 Pin SOT-23
5 Pin SOT-23
5 Pin SOT-23
5 Pin SOT-23
5 Pin SOT-23
5 Pin SOT-23
5 Pin SOT-23
5 Pin SOT-23
5 Pin SOT-23
5 Pin SOT-23
SP6201EM5
SP6201EM5/TR
SP6201EM5-1-5
SP6201EM5-1-5/TR
SP6201EM5-1-8
SP6201EM5-1-8/TR
SP6201EM5-2-5
SP6201EM5-2-5/TR
SP6201EM5-2-7
SP6201EM5-2-7/TR
SP6201EM5-2-85
SP6201EM5-2-85/TR
SP6201EM5-3-0
SP6201EM5-3-0/TR
SP6201EM5-3-3
SP6201EM5-3-3/TR
SP6201EM5-3-5
SP6201EM5-3-5/TR
SP6201EM5-5-0
SP6201EM5-5-0/TR
FADJ
FADJ
F15
F15
F18
F18
F25
F25
F27
F27
F285
F285
F30
F30
F33
F33
F35
F35
F50
F50
-40˚C to +125˚C
-40˚C to +125˚C
-40˚C to +125˚C
-40˚C to +125˚C
-40˚C to +125˚C
-40˚C to +125˚C
-40˚C to +125˚C
-40˚C to +125˚C
-40˚C to +125˚C
-40˚C to +125˚C
-40˚C to +125˚C
-40˚C to +125˚C
-40˚C to +125˚C
-40˚C to +125˚C
-40˚C to +125˚C
-40˚C to +125˚C
-40˚C to +125˚C
-40˚C to +125˚C
-40˚C to +125˚C
-40˚C to +125˚C
ADJ
ADJ
1.5V
1.5V
1.8V
1.8V
2.5V
2.5V
2.7V
2.5V
2.85V
2.85V
3.0V
3.0V
3.3V
3.3V
3.5V
3.5V
5.0V
5.0V
5 Pin SOT-23
5 Pin SOT-23
5 Pin SOT-23
5 Pin SOT-23
5 Pin SOT-23
5 Pin SOT-23
5 Pin SOT-23
5 Pin SOT-23
5 Pin SOT-23
5 Pin SOT-23
5 Pin SOT-23
5 Pin SOT-23
5 Pin SOT-23
5 Pin SOT-23
5 Pin SOT-23
5 Pin SOT-23
5 Pin SOT-23
5 Pin SOT-23
5 Pin SOT-23
5 Pin SOT-23
Part Number
Package
Type
Available in lead free packaging. To order add "-L" suffix to part number.
Example: SP6200EM5-1-5/TR = standard; SP6200EM5-L-1-5/TR = lead free. Lead
Free SOT-23 packages can be identified by a Bar “|” to the left of the standard Top Marking.
/TR = Tape and Reel.
Pack quantity is 2500 for SOT-23.
Sipex Corporation
Solved By Sipex
TM
Headquarters and
Sales Office
233 South Hillview Drive
Milpitas, CA 95035
TEL: (408) 934-7500
FAX: (408) 935-7600
Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the
application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others.
Date: 5/5/06 Rev A
SP6200/6201 100/200mA CMOS LDO Regulator
16
© Copyright 2006 Sipex Corporation
ORDERING INFORMATION
Part Number
Top Mark
Temperature
Range
Voltage
Option
Package
Type
SP6200ER
SP6200ER/TR
SP6200ER-1-5
SP6200ER-1-5/TR
SP6200ER-1-8
SP6200ER-1-8/TR
SP6200ER-2-5
SP6200ER-2-5/TR
SP6200ER-2-7
SP6200ER-2-7/TR
SP6200ER-2-85
SP6200ER-2-85/TR
SP6200ER-3-0
SP6200ER-3-0/TR
SP6200ER-3-3
SP6200ER-3-3/TR
SP6200ER-3-5
SP6200ER-3-5/TR
SP6200ER-5-0
SP6200ER-5-0/TR
620-0ER
620-0ER
620-015
620-015
620-018
620-018
620-025
620-025
620-027
620-027
620-0285
620-0285
620-030
620-030
620-033
620-033
620-035
620-035
620-050
620-050
-40˚C
-40˚C
-40˚C
-40˚C
-40˚C
-40˚C
-40˚C
-40˚C
-40˚C
-40˚C
-40˚C
-40˚C
-40˚C
-40˚C
-40˚C
-40˚C
-40˚C
-40˚C
-40˚C
-40˚C
to
to
to
to
to
to
to
to
to
to
to
to
to
to
to
to
to
to
to
to
+125˚C
+125˚C
+125˚C
+125˚C
+125˚C
+125˚C
+125˚C
+125˚C
+125˚C
+125˚C
+125˚C
+125˚C
+125˚C
+125˚C
+125˚C
+125˚C
+125˚C
+125˚C
+125˚C
+125˚C
ADJ
ADJ
1.5V
1.5V
1.8V
1.8V
2.5V
2.5V
2.7V
2.5V
2.85V
2.85V
3.0V
3.0V
3.3V
3.3V
3.5V
3.5V
5.0V
5.0V
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
DFN
DFN
DFN
DFN
DFN
DFN
DFN
DFN
DFN
DFN
DFN
DFN
DFN
DFN
DFN
DFN
DFN
DFN
DFN
DFN
SP6201ER
SP6201ER/TR
SP6201ER-1-5
SP6201ER-1-5/TR
SP6201ER-1-8
SP6201ER-1-8/TR
SP6201ER-2-5
SP6201ER-2-5/TR
SP6201ER-2-7
SP6201ER-2-7/TR
SP6201ER-2-85
SP6201ER-2-85/TR
SP6201ER-3-0
SP6201ER-3-0/TR
SP6201ER-3-3
SP6201ER-3-3/TR
SP6201ER-3-5
SP6201ER-3-5/TR
SP6201ER-5-0
SP6201ER-5-0/TR
620-1ER
620-1ER
620-115
620-115
620-118
620-118
620-125
620-125
620-127
620-127
620-1285
620-1285
620-130
620-130
620-133
620-133
620-135
620-135
620-150
620-150
-40˚C
-40˚C
-40˚C
-40˚C
-40˚C
-40˚C
-40˚C
-40˚C
-40˚C
-40˚C
-40˚C
-40˚C
-40˚C
-40˚C
-40˚C
-40˚C
-40˚C
-40˚C
-40˚C
-40˚C
to
to
to
to
to
to
to
to
to
to
to
to
to
to
to
to
to
to
to
to
+125˚C
+125˚C
+125˚C
+125˚C
+125˚C
+125˚C
+125˚C
+125˚C
+125˚C
+125˚C
+125˚C
+125˚C
+125˚C
+125˚C
+125˚C
+125˚C
+125˚C
+125˚C
+125˚C
+125˚C
ADJ
ADJ
1.5V
1.5V
1.8V
1.8V
2.5V
2.5V
2.7V
2.5V
2.85V
2.85V
3.0V
3.0V
3.3V
3.3V
3.5V
3.5V
5.0V
5.0V
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
DFN
DFN
DFN
DFN
DFN
DFN
DFN
DFN
DFN
DFN
DFN
DFN
DFN
DFN
DFN
DFN
DFN
DFN
DFN
DFN
Available in lead free packaging. To order add "-L" suffix to part number.
Example: SP6200ER-1-5/TR = standard; SP6200ER-L-1-5/TR = lead free.
Lead Free DFN packages can be identified by a Bar “__” under the standard Top Marking.
/TR = Tape and Reel. Pack quantity is 3,000 for DFN.
Sipex Corporation
Solved By Sipex
TM
Headquarters and
Sales Office
233 South Hillview Drive
Milpitas, CA 95035
TEL: (408) 934-7500
FAX: (408) 935-7600
Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the
application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others.
Date: 5/5/06 Rev A
SP6200/6201 100/200mA CMOS LDO Regulator
17
© Copyright 2006 Sipex Corporation