SP6336, SP6337,
& SP6338
Triple µPower Supervisory Circuit
with Watchdog and Power Fail
FEATURES
■
■
■
■
■
■
■
■
■
■
Low operating voltage of 1.6V
Low operating current of 20µA typical
Monitors up to 3 supplies simultaneously
Adjustable inputs monitor down to 0.5V
Reset asserted down to 0.9V
2% accuracy over temperature range
Power Fail Input Functionality (PFI)
Power Fail Output function, active low (PFOB)
Open Drain (OD) or CMOS RSTB output
4 Reset Timeout Periods:
50ms, 100ms, 200ms and 400 ms
■ Watch Dog Input Functionality
■ Available in Lead Free, RoHS
Compliant Package: 8 pin TSOT
V1
1
V2
2
8 RSTB
SP6336
8 Pin TSOT
7 WDI
PFI 3
6 GND
V3 4
5
PFOB
Open Drain RESET
SEE PAGE 2 FOR OTHER
AVAILABLE PINOUTS
DESCRIPTION
The SP6336 - SP6337 - SP6338 Triple µPower Supervisory Circuit Family is a family of
microprocessor reset supervisory circuits with multiple reset voltages. The family provides
low voltage monitoring ability for up-to three supplies with two precision factory-set thresholds
and one user defined custom threshold. These circuits perform a single function: if any of
the input supply voltages drops below its associated threshold, reset outputs are asserted.
The products in the family offer power fail and watchdog functionalities. SP6336 , SP6337
& SP6338 are packaged in an 8-pin TSOT package. All devices are fully specified over -40oC
to +85oC temperature range.
TYPICAL APPLICATION CIRCUIT
Jun 4-06 Rev H
SP6336-SP6337-SP6338 Triple µPower Supervisory Circuit
1
© 2007 Sipex Corporation
V1
1
V2
2
8 RSTB
SP6336
8 Pin TSOT
PFI 3
V3 4
V1
1
7 WDI
V2
2
PFI 3
6 GND
PFI 3
6 GND
V3 4
5 PFOB
V3 4
5 PFOB
1
V2
2
6 GND
5
PFOB
OPEN DRAIN RESET
PART
NUMBER
8 RSTB
V1
7 WDI
SP6337
8 Pin TSOT
WatchDog
Input
Reset
7 WDI
CMOS RESET
CMOS RESET
V3
8 RST
SP6338
8 Pin TSOT
Power
Fail
Input
Power Fail
Output
BAR
V1
V2
SP6336
√
√
√
OD Active Low
√
√
√
SP6337
√
√
√
CMOS Active Low
√
√
√
SP6338
√
√
√
CMOS Active High
√
√
√
Feature and Pinout Diagram
ABSOLUTE MAXIMUM RATINGS
These are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections
of the specifications below is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability
and cause permanent damage to the device.
Terminal Voltage (with respect to GND)
V1, V2.................................................... -0.3 to +6V
Operating Temperature
Range...............................................-40°C to +85°C
Open-Drain RSTB, PFOB........................-0.3 to +6V
Storage Temperature
Range...............................................-65°C to 150°C
CMOS RST, RSTB........................ -0.3 to (V1+0.3V)
Thermal Resistance θJA .............................134°C/W
Input Current/Output
Current..................................,,........................20mA
V3, V4, PFI, WDI...........................-0.3 to (V1+0.3V)
Jun 4-06 Rev H
SP6336-SP6337-SP6338 Triple µPower Supervisory Circuit
2
© 2007 Sipex Corporation
ELECTRICAL CHARACTERISTICS
PARAMETER
MIN
TYP
MAX
UNITS
CONDITIONS
V1 =1.6V to 5.5V; TA = -40ºC to +85ºC; unless otherwise noted. Typical values are at TA =+25ºC
Operating Voltage Range
0.9
5.5
V
20
30
uA
15
25
4.718
4.463
3.137
2.984
2.678
2.367
2.234
1.704
1.612
2.360
2.232
1.698
1.607
1.416
1.340
1.133
1.071
0.850
0.804
Threshold 1 Tempco
Threshold 2 Tempco
Threshold 1 Hysteresis
Threshold 2 Hysteresis
4.625
4.375
3.075
2.925
2.625
2.320
2.190
1.670
1.580
2.313
2.188
1.665
1.575
1.388
1.313
1.110
1.050
0.833
0.788
0.06
0.04
0.65
0.5
V1 to RST/RSTB Delay
50
us
V2 to RST/RSTB Delay
50
us
Reset Timeout Period (T1)
37
Reset Timeout Period (T2)
74
Reset Timeout Period (T3)
148
Reset Timeout Period (T4)
296
V3 RESET COMPARATOR INPUT
V3 Input Threshold
490
V3 Input Current
-50
V3 Threshold Hysteresis
50
100
200
400
63
126
252
504
ms
ms
ms
ms
500
510
50
mV
nA
mV
Supply Current
4.532
4.287
3.013
2.866
2.572
2.273
2.146
1.636
1.548
2.266
2.144
1.631
1.543
1.360
1.286
1.087
1.029
0.816
0.772
V1 Reset Threshold
V2 Reset Threshold
Jun 4-06 Rev H
V
V
mV/ºC
mV/ºC
%
%
1.5
SP6336-SP6337-SP6338 Triple µPower Supervisory Circuit
3
TA = -40ºC to +85ºC
V1 < 5.5V, V2 < 3.60V, all
I/O pins open
V1 < 3.6V, V2 < 2.75V, all
I/O pins open
Z (valid for V1 falling)
Y (valid for V1 falling)
X (valid for V1 falling)
W (valid for V1 falling)
V (valid for V1 falling)
U (valid for V1 falling)
T (valid for V1 falling)
S (valid for V1 falling)
R (valid for V1 falling)
J (valid for V2 falling)
I (valid for V2 falling)
H (valid for V2 falling)
G (valid for V2 falling)
F (valid for V2 falling)
E (valid for V2 falling)
D (valid for V2 falling)
C (valid for V2 falling)
B (valid for V2 falling)
A (valid for V2 falling)
reference to Vth1 typical
reference to Vth2 typical
V1 = Vth1 to (Vth1-0.1V),
Vth1 = 3.075
V2 = Vth2 to (Vth2-0.1V),
Vth2 = 1.575
TOPT-1
TOPT-2
TOPT-3
TOPT-4
TA = +25ºC
© 2007 Sipex Corporation
ELECTRICAL CHARACTERISTICS
(Continued)
PARAMETER
MIN
MAX UNITS
TYP
CONDITIONS
V1 =1.6V to 5.5V; TA = -40ºC to +85ºC; unless otherwise noted. Typical values are at TA =+25ºC
WDI – WATCHDOG INPUT
Watchdog Timeout Period
WDI Pulse Width
WDI Input Threshold
1.2
0.1
2
0.4
sec
µs
V
0.8*V1
µA
WDI Input Current
-500
+500
RESET & POWER FAIL OUTPUTS
RST / RSTB / WDOB / PFOB
RSTB
(CMOS or
0.4
V
OD)
PFOB
RSTB
(CMOS)
0.8*V1
V
RST
(CMOS)
0.8*V1
V
RST
(CMOS)
RSTB / WDOB / PFOB
Output Open-Drain Leakage
Current
PFI - POWER FAIL INPUT
PFI Input Threshold
PFI Input Current
PFI Hysteresis
PFI to PFOB Delay
Jun 4-06 Rev H
2
490
-50
500
510
50
2.5
4
SP6336-SP6337-SP6338 Triple µPower Supervisory Circuit
4
V1 = Vth1 - 0.1V, Isink =
1mA, output asserted
V_PFI=0.4, V1= , Isink =
1mA, PFOB output asserted
0.4
0.4
WDI = 0.0V or V1
V1 = Vth1+0.1V, Isource =
1mA, output not asserted
V1 = Vth1-0.1V, Isource =
1mA, output asserted
V
V1 = Vth1+0.1V, V2 > Vth2,
V3 > 0.5 , V4 > 0.5 Isource
= 1mA, output not asserted
nA
Output asserted
mV
nA
mV
µs
© 2007 Sipex Corporation
PIN DESCRIPTION
Pin #
Name
Description
1
V1
First supply voltage input. Also powers internal circuitry. Trip threshold
voltage is internally set.
2
V2
Second supply voltage input. Trip threshold voltage internally set.
3
PFI
Power Fail Input pin. Trip threshold is 0.5V. When the input voltage at
the PFI pin is <0.5V, PFOB is low. Connect to GND or V1 if not used.
4
V3
Input for the third supply voltage. Trip threshold is 0.5V.
5
PFOB
Power Fail Output pin. Active low open drain output. When the input
voltage at the PFI pin is <0.5V, PFOB is low.
6
GND
Common ground reference pin.
7
8
Jun 4-06 Rev H
WDI
RST/RSTB
Watch-Dog Input pin. When no transition is detected at the WDI pin for
the duration of WDI timeout period, reset is asserted. Leave open if not
used. RST/RSTB output is used to signal watchdog timeout overflow,
and its output pulses high/low (depending on the active reset polarity)
for the reset timeout period after each watchdog timeout overflow. The
watchdog timer clears whenever the reset is asserted or manual reset
is asserted or a transition is observed at WDI pin. Watchdog timer
functionality can be disabled by leaving this input floating.
Reset output. Open-Drain or CMOS, active high or low. Reset is
asserted when any of the three supply inputs is below its trip threshold.
It stays asserted for 200 ms (typical / default) after the last supply input
traverses its trip threshold. Reset is guaranteed to be in the correct
state for V1>0.9V. RST/RSTB asserts when V1 or V2 or V3 drop below
their corresponding reset thresholds, or the watchdog timer triggers a
reset. RST/RSTB remains asserted for the reset timeout period after
V1 and V2 and V3 exceed their corresponding reset thresholds. Opendrain outputs require an external pull-up resistor. CMOS outputs are
referenced to V1.
SP6336-SP6337-SP6338 Triple µPower Supervisory Circuit
5
© 2007 Sipex Corporation
THEORY OF OPERATION
V1
V2
PFI
V3
WDI
WDI
LOGIC
Band
Gap
Ref
1.25V
OSC
RSTB (RST)
CONTROL
LOGIC
0.5V
PFOB
GND
Block Diagram
The SP6336/ 6337 / 6338 family includes a
low-voltage precision bandgap reference,
three precision comparators, an oscillator,
a digital counter chain, a logic control block,
trimmed resistor divider chains and
additional supporting circuitry. The family is
designed to supervise up to 3 independent
supply voltages. V1 and V2 supply inputs
have their resistor dividers on the chip.
Their trip thresholds are factory trimmed.
V3 input allows users to customize an
Jun 4-06 Rev H
additional supply threshold to be monitored
by means of external resistor dividers. Each
part is furnished with power fail indication
and watchdog functionalities.
The watchdog timer is serviced internally
during the watchdog timeout period when
WDI is left unconnected. Thus, watchdog
functionality can be disabled via leaving the
WDI input floating.
SP6336-SP6337-SP6338 Triple µPower Supervisory Circuit
6
© 2007 Sipex Corporation
THEORY OF OPERATION
Vth1
V1
Vth2
V2
Vth3=0.5V
V3
T<Twd
T<Twd
T<Twd
T<Twd
T<Twd
T<Twd
WDI
Trp
Trp
*
RSTB
Twd
Vth_PFI=0.5V
PFI
PFOB
Timing Diagram for SP6336, SP6337, SP6338
* Reverse Polarity for the SP6338
Jun 4-06 Rev H
SP6336-SP6337-SP6338 Triple µPower Supervisory Circuit
7
© 2007 Sipex Corporation
APPLICATION INFORMATION
RESETB Timeout Period (400mS)
WDI = GND, V1=V2=V=5V,
MRIB = open.
Watchdog Timeout Period = 1.52S
V1
RSTB
SP6336 Watchdog Timeout Period
Jun 4-06 Rev H
SP6336-SP6337-SP6338 Triple µPower Supervisory Circuit
8
© 2007 Sipex Corporation
APPLICATION INFORMATION
V1 and V2 Glitch Rejection
Duration (uS)
250
200
150
100
50
0
0
50
100
150
Overdrive (mV)
V1 and V2 Glitch Rejection
Duration (uS)
V3 Glitch Rejection
120
100
80
60
40
20
0
0
50
100
Overdrive (mV)
150
V3Glitch Rejection
Jun 4-06 Rev H
SP6336-SP6337-SP6338 Triple µPower Supervisory Circuit
9
© 2007 Sipex Corporation
APPLICATION INFORMATION
RSTB (Vdc)
RSTB vs. V1 (V2 = GND)
5
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
V1 (Vdc)
Reset Good
Reset TO (400mS) vs Temperature
Timeout (mS)
500
400
300
200
100
0
85 80 70 60 50 40 30 20 10 0 -10 -20 -30 -40
Deg C
Reset Timeout vs. Temperature
Jun 4-06 Rev H
SP6336-SP6337-SP6338 Triple µPower Supervisory Circuit
10
© 2007 Sipex Corporation
Part Naming Nomenclature
SP63NN - Th1 - Th2 - TOPT
{
Example:
GZJD means:
SP6336 in TSOT-6 lead package
V1 Threshold is 4.625V
V2 Threshold is 2.313V
Reset Timeout is 400ms
GZJD
Pin 1
T1
A
T2
B
C
T3
D
T4
{
{
A 30 -- Quad Sp, MR, WDI, OD RSTB
B 31 -- Quad Sp, OD RSTB
C 32 -- Quad Sp, MR, WDI, CMOS RSTB
D 33 -- Quad Sp, CMOS RSTB
E 34 -- Quad Sp, MR, WDI, CMOS RST
F 35 -- Quad Sp, CMOS RST
G 36 -- Triple Sp, WDI, PF, OD RSTB
H 37 -- Triple Sp, WDI, PF, CMOS RSTB
I 38 -- Triple Sp, WDI, PF, CMOS RST
J 39 -- Triple Sp, MR, WDI, OD RSTB - WDOB
K 40 -- Dual Sp, WDI, OD RSTB - WDOB
L 41 -- Triple Sp, WDI, PF, CMOS RSTB - WDOB
M 42 -- Dual Sp, WDI, CMOS RSTB - WDOB
Jun 4-06 Rev H
SP6336-SP6337-SP6338 Triple µPower Supervisory Circuit
11
-----
50 ms
100 ms
200 ms
400 ms
A -- 0.788 V
B -- 0.833 V
C -- 1.050 V
D -- 1.110 V
E -- 1.313 V
F -- 1.388 V
G -- 1.575 V
H -- 1.665 V
I -- 2.188 V
J -- 2.313 V
Z -- 4.625 V
Y -- 4.375 V
X -- 3.075 V
W -- 2.925 V
V -- 2.625 V
U -- 2.320 V
T -- 2.190 V
S -- 1.670 V
R -- 1.580 V
© 2007 Sipex Corporation
PACKAGE: 8 PIN TSOT
Jun 4-06 Rev H
SP6336-SP6337-SP6338 Triple µPower Supervisory Circuit
12
© 2007 Sipex Corporation
ORDERING INFORMATION
Model
Temperature Range
Package Type
SP6336EK1-L-X-X-X...........................................-40°C to +85°C.................................Lead Free 8-Pin TSOT
SP6336EK1-L-X-X-X/TR......................................-40°C to +85°C.................................Lead Free 8-Pin TSOT
SP6337EK1-L-X-X-X............................................-40°C to +85°C.................................Lead Free 8-Pin TSOT
SP6337EK1-L-X-X-X/TR......................................-40°C to +85°C.................................Lead Free 8-Pin TSOT
SP6338EK1-L-X-X-X............................................-40°C to +85°C.................................Lead Free 8-Pin TSOT
SP6338EK1-L-X-X-X/TR......................................-40°C to +85°C.................................Lead Free 8-Pin TSOT
Available in lead free packaging only. /TR = Tape and Reel.
Pack quantity 2,500 forTSOT-8
Contact Factory for availability of particular voltage threshold and reset timeout options. Note that the
Ordering Information denoting those options corresponds to the Part Naming Nomenclature shown on the
previous page.
Ordering example: SP6336EK1-L-W-G-C/TR == W -- 2.925V for Voltage Threshold 1; G -- 1.575V for
Voltage Threshold 2; and C -- 200ms reset timeout.
Sipex Corporation
Headquarters and
Sales Office
233 South Hillview Drive
Milpitas, CA 95035
TEL: (408) 934-7500
FAX: (408) 935-7600
Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the
application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others.
Jun 4-06 Rev H
SP6336-SP6337-SP6338 Triple µPower Supervisory Circuit
13
© 2007 Sipex Corporation