NJU7708/09 VOLTAGE DETECTOR with Delay Function GENERAL DESCRIPTION The NJU7708/09 is a low quiescent current voltage detector with delay function featuring high precision detection voltage. The detection voltage is internally fixed with an accuracy of 1.0%. The NJU7708/09 are useful for preventing malfunction of microcomputer or DSP etc. through detect a drop in voltage of battery or power supply. The delay function achieves set wait time when supply voltage is unstable. Moreover, the delay function can make a sequence that other devices in application work and stabilize before microcomputer or DSP works. Delay time can be set by logical combination from 4-delay time. NJU7708 is Nch. Open Drain and NJU7709 is a C-MOS output type. Small packaging makes NJU7708 and NJU7709 suitable for space conscious applications. FEATURES High Precision detection Voltage Low Quiescent Current Detection Voltage Range Delay Time (Built-in Fixed Type) Output Configuration CMOS Technology Package Outline PACKAGE OUTLINE NJU7708/09F ±1.0% 1.3µA 1.3 ∼ 6.0V(0.1V step) 0ms/50ms/100ms/200ms: Logical selectable 4-delay time NJU7708: Nch. Open Drain Type NJU7709: C-MOS Output Type SOT-23-5 PIN CONFIGURATION 5 4 PIN FUNCTION 1. D1 2. VSS 3. D2 4. VOUT 5. VDD 1 2 3 NJU7708/09F EQUIVALENT CIRCUIT VDD Delay Circuit Vref V OUT V OUT Delay Circuit Vref V SS D1 NJU7708 Ver.2006-02-23 D2 D1 D2 NJU7709 -1- NJU7708/09 DETECTION VOLTAGERANK LIST Device Name VDET NJU7708/09F15 1.5V NJU7708/09F27 2.7V NJU7708/09F42 4.2V NJU7708/09F06 6.0V LOGICAL TABLE OF DELAY TIME D1 D2 DELAY H H 0ms H L 50ms L H 100ms L L 200ms NJU7708 ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL Input Voltage VDD Output Voltage VOUT Output Current IOUT (Ta=25°C) UNIT V V mA RATINGS +10 VSS-0.3 ∼ +10 50 350(*1) Power Dissipation PD SOT-23-5 mW 200(*2) Operating Temperature Topr -40 ∼ +85 °C Storage Temperature Tstg -40 ∼ +125 °C (*1) : Mounted on glass epoxy board based on EIA/JEDEC. (114.3x76.2x1.6mm: 2Layers) (*2) : Device itself ELECTRICAL CHARACTERISTICS PARAMETER SYMBOL Detection Voltage VDET Hysterisis Voltage VHYS TEST CONDITION Quiescent Current ISS VDD=VDET+1V Output Current IOUT Nch,VDS=0.5V Output Leak Current Detection Voltage Temperature Coefficient ILEAK VDD=VOUT=9V MIN. -1.0% 70 − − 0.75 4.5 − ∆VDET/∆Ta Ta=0 ∼ +85°C − VDET=1.5V ∼ 2.5V Version VDET=2.6V ∼ 6.0V Version VDD=1.2V VDD=2.4V (≥2.7V Version) TYP. ±100 − 90 1.0 1.3 2.0 7.0 − (Ta=25°C) MAX. UNIT +1.0% V 130 V 1.7 µA 2.2 µA mA − mA − 0.1 µA − ppm/°C 100 300 µs 50 57.5 ms Delay Time td VDD=VDET+1V 100 115 ms 200 230 ms VD1_H/ VD2_H VDD V − Delay Time Change Terminal Input Voltage VD1_L/ VD2_L 0.3 V − 9 V Operating Voltage(*3) VDD RL=100kΩ − (*3): The minimum operating voltage(VOPL) indicates the same value of the input voltage(VDD) on condition that VOUT becomes 10% or less of the input voltage(VDD). D1=H, D2=H D1=H, D2=L D1=L, D2=H D1=L, D2=L -2- 25 42.5 85 170 1.5 0 0.7 Ver.2006-02-23 NJU7708/09 TEST CIRCUIT Quiescent Current TEST CIRCUIT Detection Voltage /Minimum Operating Voltage TEST CIRCUIT ISS A V DD V OUT V DD NJM7708 V DD D2 V SS V OUT V NJM7708 D1 RL V DET / V OPL D1 Leak Current/Output Current TEST CIRCUIT V OUT V D2 V SS Delay Time=0mS TEST CIRCUIT Oscilloscope RL IOUT / ILEAK V DD V OUT V DD A V DD NJM7708 V DD D1 V OUT / V DS D2 V SS V OUT V SS D2 Delay Time=100mS TEST CIRCUIT Oscilloscope Oscilloscope RL V DD V DD V OUT NJM7708 D1 Ver.2006-02-23 V SS D2 ch2 NJM7708 D1 Delay Time=50mS TEST CIRCUIT ch1 ch1 RL ch2 V DD V DD ch1 V OUT NJM7708 D1 V SS D2 -3- ch2 NJU7708/09 TEST CIRCUIT Delay Time=200mS TEST CIRCUIT Oscilloscope RL V DD V DD ch1 ch2 V OUT NJM7708 D1 D2 V SS TYPICAL APPLICATION 1 Power Supply Voltage Supervisory Circuit V DD RL V DD V OUT Reset Signal INPUT NJM7708 Micro-Processor etc D1 V SS D2 2 Power Supply Voltage Supervisory Circuit (Another Power Supply to Micro-Processor) V DD1 V DD2 V DD V OUT NJM7708 RL Reset Signal INPUT Micro-Processor etc D1 -4- V SS D2 Ver.2006-02-23 NJU7708/09 NJU7709 ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL Input Voltage VDD Output Voltage VOUT Output Current IOUT (Ta=25°C) RATINGS UNIT +10 V V VSS-0.3 ∼ VDD+0.3 50 mA 350(*4) Power Dissipation PD SOT-23-5 mW 200(*5) Operating Temperature Topr -40 ∼ +85 °C Storage Temperature Tstg -40 ∼ +125 °C (*4) : Mounted on glass epoxy board based on EIA/JEDEC. (114.3x76.2x1.6mm: 2Layers) (*5) : Device itself ELECTRICAL CHARACTERISTICS PARAMETER SYMBOL Detection Voltage VDET Hysterisis Voltage VHYS TYP. Ta=0 ∼ +85°C − ±100 − ppm/°C VD1_H/ VD2_H 25 42.5 85 170 1.5 100 50 100 200 − 300 57.5 115 230 VDD µs ms ms ms V VD1_L/ VD2_L 0 − 0.3 V ISS Output Current IOUT Detection Voltage Temperature Coefficient Delay Time Delay Time Change Terminal Input Voltage (Ta=25°C) MAX. UNIT +1.0% V 130 V 1.7 µA 2.2 µA mA − mA − mA − mA − mA − MIN. -1.0% 70 VDET=1.5V ∼ 1.9V Version − VDD=VDET+1V VDET=2.0V ∼ 6.0V Version − VDD=1.2V 0.75 Nch, VDS=0.5V 4.5 VDD=2.4V(≥2.7V Version) 2.0 VDD=4.8V(≤3.9V Version) Pch, VDS=0.5V VDD=6.0V(4.0V∼5.6V Version) 2.5 3.0 VDD=8.4V (≥5.7V Version) Quiescent Current ∆VDET/∆Ta td TEST CONDITION VDD=VDET+1V, D1=H, D2=H D1=H, D2=L D1=L, D2=H D1=L, D2=L − 90 1.0 1.3 2.0 7.0 3.5 4.0 5.0 0.8 9 V RL=100kΩ − (*6): The minimum Operating Voltage(VOPL) indicates the same value of the output voltage(VOUT) on condition that VOUT becomes 10% or less of the input voltage(VDD). Operating Voltage (*6) Ver.2006-02-23 VDD -5- NJU7708/09 TEST CIRCUIT Quiescent Current TEST CIRCUIT Detection Voltage TEST CIRCUIT ISS A V DD V DET / V OPL V OUT NJM7709 D1 V SS V DD V OUT V NJM7709 V DD D2 D1 Nch Output Current TEST CIRCUIT V V OUT D2 V SS Pch Output Current TEST CIRCUIT V DS IOUT V DD V OUT V DD A NJM7709 V DD D1 V SS NJM7709 V DD D2 V DS D1 Delay Time=0mS TEST CIRCUIT V OUT V SS IOUT D2 Delay Time=50mS TEST CIRCUIT Oscilloscope ch1 V DD V DD D1 -6- V SS Oscilloscope ch2 ch1 V DD V OUT V DD NJM7709 D2 A ch2 V OUT NJM7709 D1 V SS D2 Ver.2006-02-23 NJU7708/09 TEST CIRCUIT Delay Time=100mS TEST CIRCUIT Delay Time=200mS TEST CIRCUIT Oscilloscope ch1 V DD V DD ch2 ch1 V DD V OUT V DD NJM7709 D1 Oscilloscope D2 V SS ch2 V OUT NJM7709 D1 V SS D2 Minimum Operating Voltage TEST CIRCUIT RL V OPL V DD V OUT V NJM7709 V DD D1 V V OUT D2 V SS TYPICAL APPLICATION 1Power Supply Voltage Supervisory Circuit V DD V DD V OUT NJM7709 Reset Signal INPUT Micro-Processor etc D1 Ver.2006-02-23 V SS D2 -7- NJU7708/09 FUNCTIONAL DESCRIPTION (1) Basic Operation Supply voltage (VDD) Detection voltage (VDET) Hysteresis voltage (VHYS) Release voltage (VDET + VHYS) Minimum operation voltage (VOPL) VSS Output voltage (VOUT) (1) When supply voltage(VDD) drops below detection voltage(VDET), Output voltage(VOUT) changes "H" to "L" to alert reset state. (2) The reset state is kept while VDD is lower than release voltage. The release voltage is a sum of VDET and Hysterisis voltage (VHYS). Please refer to the (*7) below. (3) When VDD becomes higher than the release voltage and reset release delay time fixed by logical select is past, then VOUT changes from "L" to "H" to resume normal state. (*7) VHYS is to avoid unstable VOUT state caused by rapid voltage change at nearby VDET. VSS Delay time (*8): C-MOS output product (NJU7709) : When VDD less than VOPL, VOUT is free of the shaded region. (2) Description of Delay Time Delay time can be set by logical combination of D1 and D2 (see " LOGICAL TABLE OF DELAY TIME " on page2). [CAUTION] The specifications on this databook are only given for information , without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights. -8- Ver.2006-02-23