PO74G126A - Potato Semiconductor

PO74G126A
www.potatosemi.com
QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS
74 Series Noise Cancellation GHz Logic
FEATURES:
DESCRIPTION:
. Patented technology
. Operating frequency up to 1.125GHz with 2pf load
. Operating frequency up to 700MHz with 5pf load
. Operating frequency up to 400MHz with 15pf load
. VCC Operates from 1.65V to 3.6V
. Propagation delay < 1.5ns max with 15pf load
. Low input capacitance: 4pf typical
. Available in 14pin 150mil wide SOIC package
Potato Semiconductor’s PO74G126A is designed for
world top performance using submicron CMOS
technology to achieve 1.125GHz TTL /CMOS output
frequency with less than 1.5ns propagation delay.
This quadruple bus buffer gate is designed for 1.65-V
to 3.6-V VCC operation.
The PO74G126A featuresindependent
linedriverswith3-stateoutputs. Eachoutput isdisabledwhenthe associatedoutput-enable(OE)input islow.
Inputs can be driven from either 3.3V or 5V devices.
This feature allows the use of these devices as
translators in a mixed 3.3V/5V system environment.
Pin Configuration
Logic Block Diagram
1OE
1
14
VCC
1A
2
13
4OE
1Y
3
12
4A
4
11
4Y
2A
5
10
3OE
2Y
6
9
3A
GND
7
8
3Y
2OE
1OE
1A
2OE
2A
3OE
3A
Pin Description
INPUTS
OE
A
OUTPUT
Y
H
H
H
H
L
L
L
Potato Semiconductor Corporation
X
4OE
4A
1
2
3
1Y
4
5
6
2Y
10
9
8
3Y
13
12
11
4Y
Z
1
01/01/10
PO74G126A
www.potatosemi.com
QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS
74 Series Noise Cancellation GHz Logic
Maximum Ratings
Description
Max
Unit
Storage Temperature
-65 to 150
°C
Operation Temperature
-40 to 125
°C
Operation Voltage
-0.5 to +4.6
V
Input Voltage
-0.5 to +5.5
V
Output Voltage
-0.5 to Vcc+0.5
V
Note:
stresses greater than listed under
Maximum
Ratings
may
cause
permanent damage to the device. This
is a stress rating only and functional
operation of the device at these or any
other conditions above those indicated
in the operational sections of this
specification is not implied. Exposure
to absolute maximum rating conditions
for extended periods may affect
reliability specification is not implied.
DC Electrical Characteristics
Symbol
Description
VOH
Output High voltage
VOL
Test Conditions
Min
Typ
Max
Unit
Vcc=3V Vin=VIH or VIL, IOH= -12mA
2.4
3
-
V
Output Low voltage
Vcc=3V Vin=VIH or VIL, IOH=12mA
-
0.3
0.5
V
VIH
Input High voltage
Guaranteed Logic HIGH Level (Input Pin)
2
-
5.5
V
VIL
Input Low voltage
Guaranteed Logic LOW Level (Input Pin)
-0.5
-
0.8
V
IIH
Input High current
Vcc = 3.6V and Vin = 5.5V
-
-
1
uA
IIL
Input Low current
Vcc = 3.6V and Vin = 0V
-
-
-1
uA
VIK
Clamp diode voltage
Vcc = Min. And IIN = -18mA
-
-0.7
-1.2
V
Notes:
1.
2.
3.
4.
5.
For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
Typical values are at Vcc = 3.3V, 25 °C ambient.
This parameter is guaranteed but not tested.
Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
VoH = Vcc – 0.6V at rated current
Potato Semiconductor Corporation
2
01/01/10
PO74G126A
www.potatosemi.com
QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS
74 Series Noise Cancellation GHz Logic
Power Supply Characteristics
Symbol
IccQ
Icc
Description
Test Conditions (1)
Min
Typ
Max
Unit
Quiescent Power Supply Current
Vcc=Max, Vin=Vcc or GND
-
0.1
30
uA
Power Supply Current per Input High
Vcc=Max, Vin= Vcc-0.6V
-
50
300
uA
Notes:
1.
2.
3.
4.
5.
For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
Typical values are at Vcc = 3.3V, 25°C ambient.
This parameter is guaranteed but not tested.
Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
VoH = Vcc – 0.6V at rated current
Capacitance
Parameters (1)
Cin
Cout
Description
Test Conditions
Typ
Unit
Input Capacitance
Vin = 0V
pF
Output Capacitance
Vout = 0V
4
6
Test Conditions (1)
M ax
Unit
pF
Notes:
1 This parameter is determined by device characterization but not production tested.
Switching Characteristics
Symbol
Description
tPLH
Propagation Delay A to Y
CL = 15pF
1.5
ns
tPHL
Propagation Delay A to Y
CL = 15pF
1.5
ns
tPZH or tPZL
Output Enable Time
CL = 15pF
2.5
ns
tPHZ or tPLZ
Output Disable Time
CL = 15pF
2.5
ns
0.8V – 2.0V
0.8
ns
tr/tf
Rise/Fall Time
fmax
Input Frequency
CL =15pF
400
MHz
fmax
fmax
Input Frequency
CL = 5pF
750
MHz
Input Frequency
CL = 2pF
1125
MHz
Notes:
1. See test circuits and waveforms.
2. tpLH, tpHL, tsk(p), and tsk(o) are production tested. All other parameters guaranteed but not production tested.
3. Airflow of 1m/s is recommended for frequencies above 133MHz
Potato Semiconductor Corporation
3
01/01/10
PO74G126A
www.potatosemi.com
QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS
74 Series Noise Cancellation GHz Logic
Test Waveforms
Test Circuit
500Ohm
50Ohm
Potato Semiconductor Corporation
15pF
to
2pF
50ohm
4
500Ohm
01/01/10
PO74G126A
www.potatosemi.com
QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS
74 Series Noise Cancellation GHz Logic
Packaging Mechanical Drawing: 14 pin 150mil SOIC
0.244 6.20
0.228 5.80
0.010
0.007
0.050 1.27
0.016 0.40
0.25
0.17
X.XX Denotes dimensions in inches
X.XX
X.XX
Denotes dimensions in millimenters
X.XX
IC Ordering Information
Ordering Code
Package
Top-Marking
TA
PO74G126ASU for Tube
14pin 150mil SOIC
Pb-free & Green
POTATO74G126AS
-40 C to 125 C
PO74G126ASR for Tape & Reel
14pin 150mil SOIC
Pb-free & Green
POTATO74G126AS
-40 C to 125 C
IC Package Information
PACKAGE
CODE
S
PACKAGE
TYPE
SOIC 14
Potato Semiconductor Corporation
TAPE
WIDTH
(mm)
16
TAPE
PITCH
(mm)
8
PIN 1 LOCATION
TAPE TRAILER
LENGTH
QTY
PER REEL
TAPE LEADER
LENGTH
QTY
PER
TUBE
Top Left Corner
39 (12”)
3000
64 (20”)
55
5
01/01/10