Ordering number : ENA2145 LV56351HA Bi-CMOS IC 1ch DC/DC boost converter http://onsemi.com Overview LV56351HA integrates 1ch DC/DC boost converter and 1ch LDO. It is suitable as the power supply for BS/CS antennas of LCD/PDP TV and BD recorders that require automatic recovery without IC destruction and malfunction when the output is short-circuited. Functions [DC/DC boost converter] • Soft-start time: 2.8ms • Frequency 425kHz operation • Pulse by pulse over current limiter • Short circuit protector (SCP) [LDO] • Over current limiter (Fold back) [All] • Under voltage lockout • Thermal shutdown protector • Power good Specifications Maximum Ratings at Ta = 25°C Parameter Symbol Conditions Ratings Unit VCC maximum supply voltage VCC max -0.3 to 25 V LDOIN maximum input voltage VLDOIN max -0.3 to 30 V SW maximum voltage VSW max Allowable power dissipation Pd max Operating temperature Operating junction temperature Storage temperature Allowable pin voltage -0.3 to 30 V 1.45 W Topr -30 to +85 °C Tjopr -30 to +125 °C Tstg -40 to +150 °C VCC, EN 25 V SW, LDOIN, LDOOUT 30 V 6 V IN1, IN2, FB, SCP, PGOOD, DDCTL *1 *1 Mounted on a specified board : 32mm × 38mm × 1.6mm, glass epoxy, double side board. Caution 1) Absolute maximum ratings represent the value which cannot be exceeded for any length of time. Caution 2) Even when the device is used within the range of absolute maximum ratings, as a result of continuous usage under high temperature, high current, high voltage, or drastic temperature change, the reliability of the IC may be degraded. Please contact us for the further details. Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Semiconductor Components Industries, LLC, 2013 August, 2013 O3112NKPC 20121009-S00001 No.A2145-1/9 LV56351HA Recommended Operating Conditions at Ta = 25°C Parameter Symbol Conditions Ratings Unit VCC supply voltage VCC 8 to 23 V LDOIN input voltage VLDOIN 8 to 28 V SW voltage VSW -0.3 to 28 V EN voltage VEN 0 to 23 V Electrical Characteristics at Ta = 25°C, VCC = 12V, VEN=2V, LDOIN=16V, LDOOUT=15V Parameter Symbol Conditions Ratings min typ Unit max All Supply current1 ICC Switching is turned off Supply current2 IOFF EN = 0V Reference voltage VREF Enable voltage VEN Disable voltage VDIS 1.8 1.2348 1.26 3.5 mA 10 μA 1.2852 V 2.0 EN input current IEN VEN = 2.0V PGOOD threshold VPG IN1 ≥ VREF×85% and IN2 ≥ VREF×85% PGOOD sink current IPG VPGOOD = 0.5V PGOOD leak current IPGLK VPGOOD = 2V UVLO on voltage VUVLO Thermal shutdown temperature TTSD *2 TSD hysteresis THYS *2 FB output voltage ”Low” FBLow IN1 = 2.0V, IFB = -20μA (Sink) FB output voltage “High” FBHigh IN1 = 0.2V, IFB = 20μA (Source) Soft-start time TSS Oscillator frequency FOSC Max on duty DMAX V 0.4 V 10 μA VREF×0.85 V 1.0 mA 10 7.0 μA V °C 130 °C 30 DC/DC boost converter SW on resistance RON SW peak current IPK SCP source current ISCP 0.2 1.8 V V 2.8 ms 425 kHz 78 85 92 % 1.5 1.8 A 4.8 μA VREF V Ω 0.7 SCP threshold VSCP DDCTL on voltage VDDCTLON DC/DC Off DDCTL off voltage VDDCTLOFF DC/DC On 0.4 V DDCTL input current IDDCTL VDDCTL = 2V 20 μA 670 mA 2.0 V LDO Maximum output current IOMAX 350 520 Line regulation RLN 16V < LDOIN < 21V 20 mV Load regulation RLD 10mA < IO < 300mA 20 mV Dropout voltage VDROP IO = 300mA 0.4 V Short current ISHORT LDOOUT = GND 100 mA 0.25 *2: Design guarantee value. No.A2145-2/9 LV56351HA Package Dimensions unit : mm (typ) 3313A Allowable power dissipation, Pd max -- W 2.0 6.5 0.5 6.4 4.4 14 1 2 0.15 0.22 1.3 0.65 1.5 MAX (2.28) Pd max -- Ta Mounted on the specified board: 32×38×1.6mm3 glass epoxy, double side board. 1.5 1.45 1.0 0.58 0.5 0 --30 0 0.1 (1.3) 1.5 30 60 90 120 Ambient temperature, Ta -- °C SANYO : HSSOP14(225mil) Specified board (32mm × 38mm × 1.6mm, glass epoxy, double side board) SCP PGOOD V1 R1 R3 R7 L1 C4 DDCTL C6 R6 R2 R4 C5 R5 C7 LDOIN EN C1 C2 C3 D1 VCC LDOOUT GND 〈〈front〉〉 〈〈back〉〉 Pin assignment Fin 1 PGND LDOOUT PGND Fin SW 14 NC 13 12 IN2 VCC EN IN1 DDCTL 10 2 LDOIN 3 NC 4 5 6 FB 7 SGND 11 SCP 9 PGOOD 8 Top view No.A2145-3/9 LV56351HA Pin function Pin No. Pin name Function 1 LDOOUT LDO output 2 LDOIN LDO input 7 SGND Signal ground (*3) Equivalent circuit 2 LDOIN 1 LDOOUT 7 SGND 4 IN2 LDO feedback input 10kΩ IN2 4 SGND 7 5 IN1 DC/DC error amplifier input 10kΩ IN1 5 SGND 7 6 FB DC/DC error amplifier output 1kΩ FB 6 SGND 7 8 PGOOD Power good output 8 PGOOD 500Ω 7 SGND 9 SCP DC/DC SCP capacitor connect pin for timer setting 300Ω 2kΩ 9 SCP 7 SGND SGND 7 EN Enable 12 VCC Power supply VCC 12 EN 11 SGND 7 210kΩ 11 VREG DDCTL 10 110kΩ DC/DC on and off control 210kΩ DDCTL 410kΩ 10 *3: When you use this IC, Please short-circuit all the pins of SGND and PGND on the IC mounting side. Continued on next page. No.A2145-4/9 LV56351HA Continued from preceding page. Pin No. Pin name Function 14 SW DC/DC open drain output Fin PGND Power ground (*3) Equivalent circuit VREG 14 SW Fin PGND *3: When you use this IC, Please short-circuit all the pins of SGND and PGND on the IC mounting side. Function overview (1) UVLO (Under Voltage Lockout) UVLO stops outputs of both DC/DC and LDO to prevent malfunction when VCC decreases. UVLO operates when VCC falls below the UVLO voltage. This function is a non-latch-type, and recovers these outputs automatically when VCC exceeds the UVLO voltage. (2) Power good Power good notifies that the output voltages of DC/DC and LDO are within the range of the setting voltage. The two output voltages are monitored through the voltage of IN1 and IN2. The output is judged to be “power good” when both outputs are 85% or higher compared to the setting voltages. If either IN1 or IN2 voltage falls below VREF×85%, PGOOD output becomes L → H (No Good). When IN1 and IN2 voltages become (VREF×85%) + 30mV or higher, PGOOD output becomes H → L (Good). During soft start, the output is H (No Good). 〈〈Power good circuit diagram〉〉 Power supply (6V or less) P. Good Comp. IN1 IN2 PGOOD _Pin 10kΩ (Example) Good ⇒ L output No Good ⇒ H output + + - VREF × 85% (Hysteresis=30mV) (3) Pulse-by-Pulse over current protection (P by P) The P by P stops switch-on operation of a certain cycle by force when the current of power MOSFET reaches the maximum output peak current. 〈〈P by P circuit diagram〉〉 Error Amp. PWM Comp. Logic Triangular wave P by P Comp. SW_pin Power The current of power_Tr is constantly monitored. If the peak current > 1.8A, switching_on operation during the cycle stops compulsorily No.A2145-5/9 LV56351HA (4) Short Circuit Protector (SCP) When output voltage of DC/DC decreases due to short-circuit; for example, SCP latches off the outputs of DC/DC and LDO by timer. When output voltage of DC/DC decreases and FB turns to H, which is the error amplifier output, charge at 4.8μA constant current starts to SCP capacitor for timer setting. When SCP voltage exceeds the threshold voltage (=VREF), latch-off occurs. If the output voltage recovers until the time the SCP voltage reaches to the threshold voltage, SCP capacitor is discharged and timer is reset. To restart the output after latch-off, you need to input EN signal again. If you do not use the SCP function, make sure to short SCP and GND. To define timer, you need to calculate a value of SCP capacitor using the following formula because timer (tSCP) depends on capacitance. CSCP = (ISCP × tSCP)/VREF 〈〈SCP circuit diagram〉〉 〈〈Waveform of SCP_Pin〉〉 ISCP=4.8μA SCP_Pin DC/DC OFF (≈VCC) DC/DC Output SCP Comp. Logic CSCP for timer setting VREF tSCP Threshhold voltage (VREF) SCP Voltage Time Discharge Tr Reset Latch-OFF (5) DC/DC on and off control This function controls on and off of DC/DC during the operation of IC. 〈〈Turning on DC/DC〉〉 Where DDCTL = Low or open, DC/DC and LDO operate at the same time. 〈〈Turning off DC/DC〉〉 Where DDCTL = High, DC/DC is compulsorily stopped and only LDO operates. When DDCTL is switched from H to L (or open), LDO stops temporarily and DC/DC starts with soft start and then LDO restart. If you switch DDCTL during IC operation, make sure that the output waveforms of DC/DC and LDO are normal. No.A2145-6/9 LV56351HA Output voltage setting Output voltages are given by the following formulas. DCDCOUT = (1+R2/R1 ) × VREF [V] LDOOUT = (1+R4/R3 ) × VREF [V] 〈〈Resistance for output setting〉〉 DC/DC OUT LDOOUT R2 IN1 R4 IN2 R1 R3 Start and stop Start: Make sure to input EN signal (L ⇒ H) after supplying VCC = 12V. Stop: Reverse-operation of start. 〈〈Output waveform during start and stop〉〉 Softstart 2.8ms DC/DC boost output LDO output 16V 15V 12V (=VCC) 5ms 0V Delay 500μs Time EN No.A2145-7/9 LV56351HA Block diagram and Application circuit 1 (for BS antenna) Condition: VCC = 12V, DCDCOUT = 16V, LDOOUT = 15V VCC=12V VCC DC/DC Boost Converter VREG + + - IN1 + OSC Soft Start P by P LDOIN FB + SCP PGOOD DDCTL LDOOUT ILimit EN High Enable DC/DC OUT=16V SW VREF DC/DCOUT (LDOIN) PGOOD SCP UVLO TSD DC/DC Control LDOOUT=15V IO=300mA IN2 LDO SGND PGND 〈〈Note〉〉 When LDOOUT is in the over current state or the short-circuit state, IC and external parts are protected by over current limiter of LDO. And when DC/DCOUT is short-circuited, IC stops by timer latch-off type SCP function. Application circuit 2 (for BS/CS antenna) BS condition: VCC = 12V, DCDCOUT = 16V, LDOOUT = 15V CS condition: VCC = 12V, DCDC = OFF, LDOOUT = 11V VCC=12V VCC DC/DC Boost Converter VREG + + - IN1 Soft Start + OSC P by P LDOIN FB + SCP PGOOD ILimit PGOOD SCP UVLO TSD EN 2V DDCTL DC/DC OUT=16V/11.7V SW VREF DC/DCOUT (LDOIN) DC/DC Control DDCTL=L : LDOOUT=15V DDCTL=H : LDOOUT=11V LDOOUT LDOOUT=15V/11V IO=300mA IN2 Tr for LDO output switching SGND PGND LDO No.A2145-8/9 LV56351HA 〈〈Addition〉〉 The above application circuit enables switching between 15V for BS and 11V for CS. Where DDCTL=L, DC/DC booster is turned on and set as follows: DC/DCOUT=16V, LDOOUT=15V Where DDCTL=H, DC/DC booster is turned off and set as follows: DC/DCOUT=11.7V, LDOOUT=11V (because the resistance value of output setting of LDO is switched) 〈〈Output waveform at switching〉〉 LDOOUT = 15V ⇒ 11V LDOOUT = 11V ⇒ 15V 5ms 16V 15V DC/DC OUT LDOOUT 12V (=VCC) 11V Delay+Softstart 3.3ms 16V 15V 12V (=VCC) 11V Time DDCTL DC/DC OUT LDOOUT Time DDCTL ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. 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