Ordering Orderingnumber number: :ENA1691E ENA1691E LV47017P Monolithic Linear IC 4-Channel BTL Power Amplifier for Car Audio Systems http://onsemi.com Overview The LV47017P is the IC for 4-channel BTL power amplifier that is developed for car audio system. Pch DMOS in the upper side of the output stage and Nch DMOS in the lower side of the output stage are complimentary. High power and high quality sound are realized by that. This IC incorporate various functions (standby switch, muting function, and various protection circuit) necessary for car audio system. Also, it has a self-diagnosis function. Functions High output : PO max = 48W (typical) (VCC = 15.2V, f = 1kHz, RL = 4, Max power) : PO max = 28W (typical) (VCC = 14.4V, f = 1kHz, THD = 10%, RL = 4) : PO max = 21W (typical) (VCC = 14.4V, f = 1kHz, THD = 1%, RL = 4) Built-in muting function (pin 22) Built-in Standby switch (pin 4) Built-in Self-diagnosis function (pin 25) : Signal output in case of output offset detection, shorting to VCC, shorting to ground, and load shorting. Electric mirror noise decrease Built-in various protection circuit (shorting to ground, shorting to VCC, load shorting, over voltage and thermal shut down) No external anti-oscillation part necessary. Note 1 : Please do not mistake connection. A wrong connection may produce destruction, deterioration and damage for the IC or equipment. Note 2 : The protective circuit function is provided to temporarily avoid abnormal state such as incorrect output connection. But, there is no guarantee that the IC is not destroyed by the accident. The protective function do not operate of the operation guarantee range. If the outputs are connected incorrectly, IC destruction may occur when used outside of the operation guarantee range. Note 3 : External parts, such as the anti-oscillation part, may become necessary depending on the set condition. Check their necessity for each set. Semiconductor Components Industries, LLC, 2013 May, 2013 42512SY/41812SY/O2611SY 20110930-S00016/60811SY/60310SY/40710SY No.A1691-1/11 LV47017P Specifications Maximum Ratings at Ta = 25C Parameter Maximum supply voltage Symbol Conditions Ratings Unit VCC max1 Without signal, t = 1 minute 26 V VCC max2 With signal 18 V IO peak Per channel 4.5/ch A Allowable power dissipation Pd max With an infinity large heat sink 50 W Operating temperature Topr -40 to +85 C Storage temperature Tstg -40 to +150 C Thermal resistance between the junction j-c Maximum output current 1 C/W and case Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Recommended Operating Ranges at Ta = 25C Parameter Recommended supply voltage Symbol Conditions Ratings VCC Recommended load resistance RL op Operating supply voltage range VCC op A range not exceeding Pdmax Unit 14.4 V 4 9 to 16 V Electrical Characteristics at Ta = 25°C, VCC = 14.4V, RL = 4, f = 1kHz, Rg = 600 Ratings Parameter Symbol Conditions Unit min typ Quiescent current ICCO RL = , Rg = 0 Standby current Ist Vst = 0V Voltage gain VG VO = 0dBm 25 23 Voltage gain difference VG Output power PO THD = 10% PO max1 Max Power max 200 26 -1 400 mA 10 A 27 dB +1 dB 28 W 43 W PO max2 VCC = 15.2, Max Power Output offset voltage Vn offset Rg = 0 48 Total harmonic distortion THD PO = 4W Channel separation CHsep VO = 0dBm, Rg = 10k 55 65 dB Ripple rejection ratio SVRR Rg = 0, fr = 100Hz, VCCR = 0dBm 45 65 dB Output noise voltage VNO Rg = 0, B.P.F. = 20Hz to 20kHz Input resistance Ri Mute attenuation Matt VO = 20dBm, mute : on Standby pin control voltage Vstby H Amp : on 2.5 Vstby L Amp : off 0.0 Mute pin control voltage Vmute H Mute : off Vmute L Mute : on -100 W +100 0.03 0.2 mV % 80 200 Vrms 40 50 65 k 75 90 dB VCC V 0.5 V 1.0 V Open 0.0 - * 0dBm = 0.775Vrms No.A1691-2/11 LV47017P Package Dimensions unit : mm (typ) 3236A 29.2 25.6 Maximum power dissipation, Pd max -- W ( 2.5) 4.5 (14.4) 14.5 (11.0) 21.7 18.6 max (R1.7) (5.0) (12.3) (8.5) 0.4 25 (1.0) 2.0 0.52 3.5 1 (2.6) Pd max -- Ta 70 (22.8) 4.2 4.0 2.0 60 50 40 30 20 10 0 -40 -20 0 20 40 60 80 100 120 140 160 Ambient temperature, Ta -- °C SANYO : HZIP25 Block Diagram VCC + N.C. 1 VCC1/2 6 VCC3/4 20 IN 1 11 + + 9 - - 7 DC AC GND 10 RL 8 IN 2 + OUT 1- PWR GND1 Protective circuit 12 OUT 1+ + + 5 - - 3 Ripple Filter OUT 2+ OUT 2- RL PWR GND2 2 OFFSET DIAG 25 16 5V PRE GND Mute Mute circuit 13 22 IN 3 15 + + 17 - - 19 +5V ST ON 4 Stand by Switch OUT 3+ OUT 3- RL 18 IN 4 STBY Low Level Mute ON PWR GND3 Protective circuit 14 + + + 21 - - 23 OUT 4+ OUT 4- RL PWR GND4 24 No.A1691-3/11 LV47017P External Components Part Name Recommended Value Purpose Remarks C1 to C5 0.47F Cuts DC voltage The larger the constant value, the lower the cut-off frequency C6 22F Reduces ripples The larger the constant value, the longer the amplifier ON/OFF time C7 2200F Ripple filter C8 0.1F Improves oscillation stability Reducing high-frequency noise C9 1F Reduces pop noise The larger the constant value, the longer the mute ON/OFF time R1 10k Reduces pop noise The larger the constant value, the longer the mute ON/OFF time R2 4.7k Pull-up resistor The values of C1 to C5 must be the same Reduces pop noise Eliminating power supply ripples * The components and constant values within the test circuit are used for confirmation of characteristics and are not guarantees that incorrect or trouble will not occur in application equipment. Description of Operation 1. Standby switch function (pin 4) Threshold voltage of the pin 4 is set by about 2VBE. The amplifier is turned on by the applied voltage of 2.5V or more. Also, the amplifier is turned off by the applied voltage of 0.5V or less. STBY 4 10kΩ 30kΩ Fig1 Standby equivalent circuit 2. Muting function (pin 22) The muted state is obtained by setting pin 22 to the ground potential, enabling audio muting. The muting function is turned on by the applied voltage of 1V or less to the resistance of 10k. And the muting function is turn off when this pin opens. Also, the time constant of the muting function is determined by external capacitor and resistor constants. It is concerned with a pop noise in amplifier ON/OFF and mute ON/OFF. After enough examination, please set it. about 50μA MUTE OFF ON MUTE 22 200Ω 10kΩ 18kΩ 1μF + about 2.5V Fig2 Mute equivalent circuit 3. ACGND pin (pin 16) The capacitor of the pin 16 must use the same capacitance value as the input capacitor. Also, connect to the same PREGND as the input capacitor. No.A1691-4/11 LV47017P 4. Self-diagnostics function (pin 25) By detecting the unusual state of the IC, the signal is output to the pin 25. Also, by controlling the standby switch after the signal of the pin 25 is detected by the microcomputer, the burnout of the speaker can be prevented. (1) Shorting to VCC/Shorting to ground : The pin 25 becomes the low level. (2) Load shorting : The pin 25 is alternated between the low level and the high level according to the output signal. (3) Output offset detection : when the output offset voltage exceeds the detection threshold voltage, the pin 25 becomes the low level. * Note: The output offset abnormality is thought of as the leakage current of the input capacitor. In addition, the pin 25 has become the NPN open collector output (active low). The pin 25 must be left open when this function is not used. 5V OFFSET DIAG 25 IN OUT+ + AC GND 16 + RT - - OUT- Output voltage Speaker pin output voltage +1.8V (typical) 0V -1.8V (typical) time 25 pin voltage time Fig3 Self-diagnosis Function Diagram No.A1691-5/11 LV47017P 5. Sound quality (low frequencies) By varying the value of input capacitor, low-frequency characteristic can be improved. However, it is concerned the shock noise. Please confirm in each set when the capacitance value varies. 6. Pop noise For pop noise prevention, it is recommended to use the muting function at the same time. Please turn on the muting function simultaneously with power supply on when the amplifier is turned on. Next, turn off the muting function after the output DC potential stabilization. When the amplifier is turn off, turn off the power supply after turning on the muting function. 7. Oscillation stability Pay due attention on the following points because parasitic oscillation may occur due to effects of the capacity load, board layout, etc. (1) Capacity load When the capacitor is to be inserted between each output pin and GND so as to prevent electric mirror noise, select the capacitance of maximum 1500pF. (Conditions : Our recommended board, RL = 4) (2) Board layout Provide the VCC capacitor of 0.1F in the position nearest to IC. PREGND must be independently wired and connected to the GND point that is as stable as possible, such as the minus pin of the 2200F VCC capacitor. In case of occurrence of parasitic oscillation, any one of following parts may be added as a countermeasure. Note that the optimum capacitance must be checked for each set in the mounted state. Series connection of CR (0.1F and 2.2) between BTL outputs Series connection of CR(0.1F and 2.2) between each output pin and GND. No.A1691-6/11 LV47017P ICCO -- VCC 200 150 100 50 0 6 8 10 12 VN -- VCC 14 Output midpoint voltage, VN -- V Quiescent current, ICCO -- mA 250 14 16 12 10 8 all channel is similar 6 4 2 0 6 18 8 Supply voltage, VCC -- V PO -- VCC 50 Output power, PO -- W 30 20 all channel is similar 16 18 all channel is similar 15 10 5 0 10 0 8 10 12 14 16 18 2 3 5 7 100 2 3 Supply voltage, VCC -- V THD -- PO 10 7 5 3 2 1 7 5 3 2 CH2 0.1 7 5 CH4 CH3 3 2 0.01 0.1 CH1 2 3 5 7 1 2 3 5 7 10 2 3 1 7 5 3 CH2 CH4 0.1 7 5 CH1 CH3 2 2 3 5 7 1 2 3 5 7 10 Output power, PO -- W 2 3 5 7 100 Total harmonic distortion, THD -- % 2 0.01 0.1 2 3 5 7100k 1 7 5 3 2 0.1 7 5 CH4 CH2 CH3 3 2 CH1 2 3 5 7 1 2 3 5 7 10 2 3 5 7 100 Output power, PO -- W 3 3 5 7 10k 3 2 0.01 0.1 5 7 100 THD -- PO 2 2 3 THD -- PO 10 7 5 Output power, PO -- W 10 7 5 5 7 1k Frequency, f -- Hz Total harmonic distortion, THD -- % Total harmonic distortion, THD -- % 14 PO -- f 20 10 Total harmonic distortion, THD -- % 12 25 40 Output power, PO -- W 10 Supply voltage, VCC -- V THD -- f 10 7 5 3 2 1 7 5 3 2 0.1 7 5 CH2 CH4 3 2 0.01 10 CH1 CH3 2 3 5 7 100 2 3 5 7 1k 2 3 5 7 10k 2 3 5 7100k Frequency, f -- Hz No.A1691-7/11 LV47017P Respomse -- f 1 VNO -- Rg 150 Output noise voltage, VNO -- V CH4 Response -- dB 0 all channel is similar --1 --2 --3 10 2 3 5 7 100 2 3 5 7 1k 2 3 5 7 10k 2 3 CH1 100 CH3 50 0 10 5 7100k CH2 2 3 5 7 100 2 3 5 7 1k 2 3 5 7 10k 2 3 5 7100k Frequency, f -- Hz CH.Sep -- f Channel separation -- dB CH1 1 CH 4 CH 1 CH 2 40 20 2 3 5 7 100 2 3 5 7 1k 2 3 5 7 10k CH2 CH3 CH2 CH4 CH 2 C H1 CH3 CH 60 0 10 CH.Sep -- f 80 Channel separation -- dB 80 2 3 60 40 20 0 10 5 7100k 2 3 5 7 100 Frequency, f -- Hz Channel separation -- dB Channel separation -- dB CH2 60 CH3 C H1 CH3 CH 4 40 20 2 3 5 7 100 2 3 5 7 1k 2 3 5 7 10k 2 3 60 CH3 CH1 40 20 0 10 12 2 3 5 7100k 20 2 3 5 7 100 14 Supply voltage, VCC -- V 2 3 5 7 1k 2 3 5 7 10k SVRR -- fR 80 60 8 5 7100k Frequency, f -- Hz Ripple rejection ratio, SVRR -- dB Ripple rejection ratio, SVRR -- dB CH2 2 3 40 0 10 5 7100k SVRR -- VCC CH4 5 7 10k CH4 CH3 CH4 CH1 CH4 CH2 Frequency, f -- Hz 80 2 3 CH.Sep -- f 80 CH3 0 10 5 7 1k Frequency, f -- Hz CH.Sep -- f 80 2 3 16 18 CH3 60 CH 4 CH2 CH 1 40 20 0 10 2 3 5 7 100 2 3 5 7 1k 2 3 5 7 10k 2 3 5 7100k Ripple frequency, f R -- Hz No.A1691-8/11 LV47017P Offset DIAG -- VCC Pd -- PO 60 50 8 Power dissipation, Pd -- W Detection threshold voltage, Vosdet -- V 10 1/2VCC 6 4 Detection Level all channel is similar 2 40 30 6V 20 V 8 10 12 14 16 2 3 Mute attenuation, Mute ATT -- dB Quiescent current, ICCO -- mA 150 100 50 0 2.0 3.0 3 5 7 10 2 3 5 7 100 Mute ATT -- V Mute 100 200 1.0 2 1 Output power, PO -- W ICCO -- Vst 0 =1 5 7 Supply voltage, VCC -- V 250 V 4.4 C 0 0.1 18 =1 VC 10 0 CC 4.0 Standby control voltage, Vst -- V 5.0 80 60 40 20 0 0 1.0 2.0 3.0 4.0 5.0 Mute control voltage, V Mute -- V No.A1691-9/11 LV47017P HZIP25 Heat sink attachment Heat sinks are used to lower the semiconductor device junction temperature by leading the head generated by the device to the outer environment and dissipating that heat. a. Unless otherwise specified, for power ICs with tabs and power ICs with attached heat sinks, solder must not be applied to the heat sink or tabs. b. Heat sink attachment · Use flat-head screws to attach heat sinks. · Use also washer to protect the package. · Use tightening torques in the ranges 39-59Ncm(4-6kgcm) . · If tapping screws are used, do not use screws with a diameter larger than the holes in the semiconductor device itself. · Do not make gap, dust, or other contaminants to get between the semiconductor device and the tab or heat sink. · Take care a position of via hole . · Do not allow dirt, dust, or other contaminants to get between the semiconductor device and the tab or heat sink. · Verify that there are no press burrs or screw-hole burrs on the heat sink. · Warping in heat sinks and printed circuit boards must be no more than 0.05 mm between screw holes, for either concave or convex warping. · Twisting must be limited to under 0.05 mm. · Heat sink and semiconductor device are mounted in parallel. Take care of electric or compressed air drivers · The speed of these torque wrenches should never exceed 700 rpm, and should typically be about 400 rpm. Binding head machine screw Countersunk head mashine screw Heat sink gap Via hole c. Silicone grease · Spread the silicone grease evenly when mounting heat sinks. · Our company recommends YG-6260 (Momentive Performance Materials Japan LLC) d. Mount · First mount the heat sink on the semiconductor device, and then mount that assembly on the printed circuit board. · When attaching a heat sink after mounting a semiconductor device into the printed circuit board, when tightening up a heat sink with the screw, the mechanical stress which is impossible to the semiconductor device and the pin doesn't hang. e. When mounting the semiconductor device to the heat sink using jigs, etc., · Take care not to allow the device to ride onto the jig or positioning dowel. · Design the jig so that no unreasonable mechanical stress is not applied to the semiconductor device. f. Heat sink screw holes · Be sure that chamfering and shear drop of heat sinks must not be larger than the diameter of screw head used. · When using nuts, do not make the heat sink hole diameters larger than the diameter of the head of the screws used. A hole diameter about 15% larger than the diameter of the screw is desirable. · When tap screws are used, be sure that the diameter of the holes in the heat sink are not too small. A diameter about 15% smaller than the diameter of the screw is desirable. g. There is a method to mount the semiconductor device to the heat sink by using a spring band. But this method is not recommended because of possible displacement due to fluctuation of the spring force with time or vibration. No.A1691-10/11 LV47017P ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. 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