Buck Converter, Switching Regulator, 1-Channel

Ordering number : ENA2233
LV5980MD
Bi-CMOS IC
Low power consumption and highefficiency
http://onsemi.com
Step-down Switching Regulator
Overview
LV5980MD is 1ch DCDC converter with built-in power Pch MOSFET.
The recommended operating range is 4.5V to 23V.
The maximum current is 3A. The operating current is about 63μA,
and low power consumption is achieved.
Features and Functions
• 1ch SBD rectification DCDC converter IC with built-in power Pch MOSFET
• Typical value of light load mode current is 63μA
• 4.5V to 23V Operating input voltage range
• 100mΩ High-side switch
• Output voltage adjustable to 1.235V
• The oscillatory frequency is 370kHz
• ON/OFF Function
• built-in OCP circuit with P-by-P method
• When P-by-P is generated continuously, it shifts to the HICCUP operation
• External capacitor Soft-start
• Under voltage lock-out, thermal shutdown
SOIC10
Applications
• Set top boxes
• Point of load DC/DC converters
• White Goods
• DVD/Blu-ray™ drivers and HDD
• Office Equipment
• LCD monitors and TVs
• POS System
Application Circuit Example
VIN
C1
100
C3
10μF
×2
PDR
EN
REF
VIN
R1
LV5980MD
R3
C2
R2
COMP
SS/HICCUP
C6
C5
SUBGND
V IN=12V
70
VIN=15V
60
50
40
30
47kΩ
C4
80
5V
10μF
×3
FB
VIN=8V
VOUT
SW
D1
EN
90
L1 10μH
Efficiency -- %
VIN
1μF
Efficiency
VOUT = 5V
GND
1μF 4.7nF 2.2nF
C1: GRM31CB31E106K [murata]
C2: C2102JB0J106M [TDK]
L1: FDVE1040-100M [TOKO]
D1: SB3003CH [ON]
20
10
0
0.1 2 3 5 7 1
2 3 5 7 10
2 3 5 7100 2 3 5 71000 2 3 5 710000
Load current -- mA
ORDERING INFORMATION
See detailed ordering and shipping information on page 20 of this data sheet.
Semiconductor Components Industries, LLC, 2013
October, 2013
O3013NK 20131009-S00001 No.A2233-1/20
LV5980MD
Specifications
Absolute Maximum Ratings at Ta = 25°C
Parameter
Symbol
Input voltage
VIN max
Allowable pin voltage
VIN-SW
Conditions
Ratings
EN
Unit
25
V
30
V
VIN
VIN-PDR
6
V
REF
6
V
SS/HICCUP
REF
V
FB
REF
V
COMP
REF
V
Allowable power dissipation
Pd max
1.3
W
Operating temperature
TOPR
Specified substrate *1
-40 to +85
°C
Storage temperature
TSTG
-55 to +150
°C
*1 Specified substrate: 50.0 mm × 50.0 mm × 1.6 mm, fiberglass epoxy printed circuit board, 4 layers
Caution 1) Absolute maximum ratings represent the values which cannot be exceeded for any length of time.
Caution 2) Even when the device is used within the range of absolute maximum ratings, as a result of continuous usage under high temperature, high current,
high voltage, or drastic temperature change, the reliability of the IC may be degraded. Please contact us for the further details.
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating
Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
*1 Specified substrate : 50.0mm × 50.0mm × 1.6mm, fiberglass epoxy printed circuit board, 4 layers
Recommended Operating Conditions at Ta = 25°C
Parameter
Input voltage range
Symbol
Conditions
Ratings
VIN
Unit
4.5 to 23
V
Electrical Characteristics at Ta=25°C, VIN=15V
Characteristic
Symbol
Conditions
Min.
Typ.
Max.
Units
[Reference Voltage]
Internal Reference Voltage
Pch Drive Voltage
VREF
1.210
1.235
1.260
V
VPDR
VIN
-5.5
VIN
-5.0
VIN
-4.5
V
310
370
430
kHz
VIN
V
0.3
V
2.4
uA
IOUT=0 ~ -5mA
[Saw Wave Oscillator]
Oscillatory Frequency
FOSC
[ON/OFF Circuit]
IC startup voltage (EN PIN)
VCNT_ON
Disable voltage (EN PIN)
VCNT_OFF
2.0
[Soft Start Circuit]
Soft Start • Source Current
ISS_SC
Soft Start • Sink Current
ISS_SK
VIN = 3V, EN > 2V
VSS = 0.4V
UVLO Release Voltage
VUVLON
FB = COMP
3.3
3.7
4.1
V
UVLO Lock Voltage
VUVLOF
FB = COMP
3.02
3.42
3.82
V
-100
-10
[UVLO Circuit]
1.2
1.8
300
uA
[Error Amplifier]
Input Bias Current
IEA_IN
nA
Error amplifier gain
GEA
100
220
380
Output Sink Current
IEA_OSK
FB = 1.75V
-30
-17
-8
uA
Output Source Current
IES_OSC
FB = 0.75V
8
17
30
uA
ICL
*2 Test circuit
3.5
4.7
6.2
A
uA/V
[Over Current Limit Circuit]
Current Limit Peak
HICCUP Timer Start-up Cycle
NCYC
15
HICCUP Comparator Threshold
Voltage
VtHIC
0.15
cycle
V
HICCUP Timer Discharge Current
IHIC
0.25
uA
Continued on next page.
No.A2233-2/20
LV5980MD
Continued from preceding page.
Characteristic
Symbol
Conditions
Min.
Typ.
Max.
Units
[PWM Comparator]
Maximum On-Duty
DMAX
94
%
[Output]
Output On Resistance
RON
Io = 0.5A
100
Standby current
ICCS
EN < 0.3V
Light Load Mode Consumption
Current
ISLEEP
No switching
Thermal Shutdown
TSD
*3 Design guarantee
mΩ
[The entire device]
63
170
1
uA
83
uA
°C
*2 Test circuit
*3 Design guarantee: Signifies target value in design. These parameters are not tested in an independent IC.
Pdmax - Ta
2.0
1.5
1.3
1.0
0.68
0.5
0
0
20
40
60
80
100
No.A2233-3/20
LV5980MD
Specified substrate
Top
Bottom
2nd/3rd layers
No.A2233-4/20
LV5980MD
Pin Connections
Pin Function Description
Pin
Pin Name
1
SW
Description
2
PDR
3
GND
4
SS/HICCUP
5
COMP
6
FB
7
REF
8
SUBGND
9
EN
ON/OFF Pin.
10
VIN
Supply voltage pin.
It is observed by the UVLO function.
When its voltage becomes 3.7V or more, ICs startup in soft start.
High-side Pch MOSFET drain Pin.
Pch MOSFET gate drive Voltage.
The bypass capacitor is necessarily connected between this pin and Vin.
Ground Pin. Ground pin voltage is reference voltage
Capacitor connection pin for soft start and setting re-startup cycle in HICCUP mode.
About 1.8uA current charges the soft start capacitor.
Error Amplifier Output Pin.
The phase compensation network is connected between GND pin and COMP pin.
Thanks to current-mode control, comp pin voltage would tell you the output current amplitude. Comp pin is
connected internally to an Init.comparator which compares with 0.9V reference. If comp pin voltage is larger than
0.9V, IC operates in “continuous mode”. If comp pin voltage is smaller than 0.9V,
IC operates in “discontinuous mode (low consumption mode)”.
Error amplifier reverse input pin.
ICs make its voltage keep 1.235V.
Output voltage is divided by external resistances and it across FB.
Reference voltage.
Short-circuited and use 3pin and 8pin as GND
No.A2233-5/20
LV5980MD
Block Diagram
No.A2233-6/20
LV5980MD
Pin Equivalent Circuit
Pin No.
Pin Name
1
SW
2
PDR
3
GND
Equivalent Circuit
VIN
10k
4
1k
SS/HICCUP
SS/HICCUP
10k
1k
GND
To the next page
No.A2233-7/20
LV5980MD
From the previous page
Pin No.
Pin Name
5
COMP
6
FB
7
REF
8
SUBGND
Equivalent Circuit
To the next page
No.A2233-8/20
LV5980MD
From the previous page
Pin No.
Pin Name
9
EN
10
VIN
Equivalent Circuit
No.A2233-9/20
LV5980MD
Typical Performance Characteristics
Application Curves at Ta = 25°C
100
Efficiency
100
VOUT = 1.235V
90
V IN=5V
12V
50
40
Efficiency -- %
8V
70
40
20
20
10
0.1 2 3 5 7 1
2 3 5 7100 2 3 5 71000 2 3 5 710000
Load current -- mA
Efficiency
VOUT = 3.3V
90
8V
70
100
VIN=5V
80
12V
15V
50
40
Efficiency
VOUT = 5V
VIN=8V
15V
60
50
40
20
20
Load current -- mA
12V
70
30
2 3 5 7100 2 3 5 71000 2 3 5 710000
2 3 5 7100 2 3 5 71000 2 3 5 710000
Load current -- mA
80
30
2 3 5 7 10
2 3 5 7 10
90
60
10
0.1 2 3 5 7 1
8V
15V
50
30
2 3 5 7 10
12V
60
30
Efficiency -- %
Efficiency -- %
15V
60
V IN=5V
80
70
10
0.1 2 3 5 7 1
Efficiency -- %
VOUT = 1.8V
90
80
100
Efficiency
10
0.1 2 3 5 7 1
2 3 5 7 10
2 3 5 7100 2 3 5 71000 2 3 5 710000
Load current -- mA
Operation Waveforms (Circuit from Typical Application, Ta = 25°C, VIN = 15V, VOUT = 5V)
Light load mode
Output Voltage
IOUT = 10mA
IOUT = 10mA
VSW
5V/DIV
VOUT
20mV/DIV
IL
0.5A/DIV
IL
0.5A/DIV
10μs/DIV
10μs/DIV
No.A2233-10/20
LV5980MD
Discontinious current mode
Output Voltage
IOUT = 200mA
IOUT = 200mA
VSW
5V/DIV
VOUT
20mV/DIV
IL
0.5A/DIV
IL
0.5A/DIV
2μs/DIV
2μs/DIV
Continious current mode
Output Voltage
IOUT = 2A
IOUT = 2A
VSW
5V/DIV
VOUT
20mV/DIV
IL
1A/DIV
IL
1A/DIV
2μs/DIV
2μs/DIV
Load Transient response
Soft start and shutdown
IOUT = 0.5 Q 2.5A, Slew Rate = 100μS
IOUT = 2A
VIN
20V/DIV
VOUT
0.2V/DIV
VSS/HICCUP
2V/DIV
IOUT
2A/DIV
VOUT
2V/DIV
500μs/DIV
2ms/DIV
Over current protection
OUT - GND short
VOUT
5V/DIV
VSS/HICCUP
5V/DIV
VSW
20V/DIV
IOUT
5A/DIV
20ms/DIV
No.A2233-11/20
LV5980MD
Characterization Curves at Ta = 25°C, VIN = 15V
90
Light Load Mode Consumption Current
Internal Reference Voltage
1.26
Internal reference voltage -- V
80
Input current -- μA
70
60
50
40
30
20
1.25
1.24
1.23
1.22
10
0
--50
--25
0
25
50
75
100
125
1.21
--50
150
--25
0
Temperature -- °C
Output on resistance
140
4.9
120
4.8
100
80
60
40
20
0
--50
50
75
100
125
150
100
125
150
100
125
150
Current limit peak
5
Current limit peak -- A
Output on resistance -- mΩ
160
25
Temperature -- °C
4.7
4.6
4.5
4.4
4.3
--25
0
25
50
75
100
125
4.2
--50
150
--25
0
Temperature -- °C
Oscillatory Frequency
400
25
50
75
Temperature -- °C
UVLO
3.8
3.7
380
UVLO release voltage
370
UVLO voltage -- V
Oscillatory frequency -- kHz
390
360
350
340
330
320
3.6
3.5
3.4
UVLO lock voltage
3.3
310
300
--50
--25
0
25
50
75
100
125
3.2
--50
150
--25
0
Temperature -- °C
Soft Start Source Current
0.33
HICCUP timer Discharge current -- μA
Soft start source current -- μA
2
1.9
1.8
1.7
1.6
1.5
--50
--25
0
25
50
75
Temperature -- °C
25
50
75
Temperature -- °C
100
125
150
HICCUP Timer Discharge Current
0.31
0.29
0.27
0.25
0.23
0.21
0.19
0.17
--50
--25
0
25
50
75
100
125
150
Temperature -- °C
No.A2233-12/20
LV5980MD
IC startup EN voltage
EN Current
5
2.0
1.8
4
1.6
3
1.4
2
1.2
1
0
-50
1.0
-25
0
25
50
75
100
125
150
0.8
-50
-25
0
25
50
75
100
125
150
No.A2233-13/20
LV5980MD
Detailed Description
Power-save Feature
The LV5980MC has Power-saving feature to enhance efficiency when the load is light.
By shutting down unnecessary circuits, operating current of the IC is minimized and high efficiency is realized.
Output Voltage Setting
Output voltage (VOUT) is configurable by the resistance R3 between VOUT and FB and the R2 between FB and GND.
VOUT is given by the following equation (1).
R3
R3
VOUT = (1 + R2 ) × VREF = (1 + R2 ) × 1.235 [V]
(1)
Soft Start
Soft start time (TSS) is configurable by the capacitor (C5) between SS/HICCUP and GND. The setting value of TSS is
given by the equation (2).
VREF
1.235
TSS = C5 × I
= C5 ×
[ms]
1.8
× 10-6
SS
(2)
Hiccup Over-Current Protection
Over-current limit (ICL) is set to 4.7A in the IC. When the peak value of inductor current is higher than 4.7A for 15
consecutive times, the protection deems it as over current and stops the IC. Stop period (THIC) is defined by the
discharging time of the SS/HICCUP. When SS/HICCUP is lower than 0.15V, the IC starts up. When SS/HICCUP is
higher than 0.3V and then over current is detected, the IC stops again. And when SS/HICCUP is higher than 1.235V, the
discharge starts again. When the protection does not detect over-current status, the IC starts up again.
The IC stops when the peak value of inductor current is higher
than overcurrent limit for 15 consecutive times.
ICL
IL
* The stop time defined
by the discharging time
of the SS/HICCUP.
SS/HICCUP
THIC
0.3V
0.15V
1.235V
The IC starts up when SS/HICCUP is lower
than 0.15V.
•The IC stops when SS/HICCUP is higher
than 0.3V and overcurrent is detected.
•The IC starts up again if no overcurrent is
detected.
FB
No.A2233-14/20
LV5980MD
Design Procedure
Inductor Selection
When conditions for input voltage, output voltage and ripple current are defined, the following equations (3) give
inductance value.
L=
VIN - VOUT
× TON
ΔIR
TON =
{((V
FOSC
VF
VIN
VOUT
(3)
1
IN - VOUT) ÷ (VOUT + VF)) + 1} × FOSC
: Oscillatory Frequency
: Forward voltage of Schottky Barrier diode
: Input voltage
: Output voltage
• Inductor current: Peak value (IRP)
Current peak value (IRP) of the inductor is given by the equation (4).
VIN - VOUT
IRP = IOUT +
× TON
2L
(4)
Make sure that rating current value of the inductor is higher than a peak value of ripple current.
• Inductor current: ripple current (∆IR)
Ripple current (∆IR) is given by the equation (5).
ΔIR =
VIN - VOUT
× TON
L
(5)
When load current (IOUT) is less than 1/2 of the ripple current, inductor current flows discontinuously.
Output Capacitor Selection
Make sure to use a capacitor with low impedance for switching power supply because of large ripple current flows
through output capacitor.
This IC is a switching regulator which adopts current mode control method. Therefore, you can use capacitor such as
ceramic capacitor and OS capacitor in which equivalent series resistance (ESR) is exceedingly small.
Effective value is given by the equation (6) because the ripple current (AC) that flows through output capacitor is saw
tooth wave.
IC_OUT =
VOUT × (VIN - VOUT)
1
×
[Arms]
L × FOSC × VIN
2√3
(6)
Input Capacitor Selection
Ripple current flows through input capacitor which is higher than that of the output capacitors.
Therefore, caution is also required for allowable ripple current value.
The effective value of the ripple current flows through input capacitor is given by the equation (7).
IC_IN = √D (1 - D) × IOUT [Arms]
(7)
TON VOUT
D= T = V
IN
In (7), D signifies the ratio between ON/OFF period. When the value is 0.5, the ripple current is at a maximum. Make sure
that the input capacitor does not exceed the allowable ripple current value given by (7). With (7), if VIN=15V, VOUT=5V,
IOUT=1.0A and FOSC=370 kHz, then IC_IN value is about 0.471Arms.
In the board wiring from input capacitor, VIN to GND, make sure that wiring is wide enough to keep impedance low
because of the current fluctuation. Make sure to connect input capacitor near output capacitor to lower voltage bound due
to regeneration current.When change of load current is excessive (IOUT: high ⇒ low), the power of output electric
capacitor is regenerated to input capacitor. If input capacitor is small, input voltage increases. Therefore, you need to
implement a large input capacitor. Regeneration power changes according to the change of output voltage, inductance of
a coil and load current.
No.A2233-15/20
LV5980MD
Selection of external phase compensation component
This IC adopts current mode control which allows use of ceramic capacitor with low ESR and solid polymer capacitor
such as OS capacitor for output capacitor with simple phase compensation. Therefore, you can design long-life and high
quality step-down power supply circuit easily.
Frequency Characteristics
The frequency characteristic of this IC is constituted with the following transfer functions.
(1) Output resistance breeder
: HR
(2) Voltage gain of error amplifier
: GVEA
Current gain
: GMEA
(3) Impedance of phase compensation external element
: ZC
(4) Current sense loop gain
: GCS
(5) Output smoothing impedance
: ZO
VIN
1/GCS
OSC
FB
Current
sence loop
GVER
GMER
VREF
CLK
D
C
Q
R
SW
VOUT
COMP
R2
CC
ZC
RC
HR
R1
CO
RL
ZO
Closed loop gain is obtained with the following formula (8).
G = HR • GMER • ZC • GCS • ZO
VREF
RL
1
=V
• GMER • RC + SC • GCS • 1 + SC • R
OUT
O
L
C
(8)
Frequency characteristics of the closed loop gain is given by pole fp1 consists of output capacitor CO and output load
resistance RL, zero point fz consists of external capacitor CC of the phase compensation and resistance RC, and pole fp2
consists of output impedance ZER of error amplifier and external capacitor of phase compensation CC as shown in
formula (8). fp1, fz, fp2 are obtained with the following equations (9) to (11).
fp1 =
fz =
1
2π • CO • RL
1
2π • CC • RC
fp2 =
1
2π • ZER • CC
(9)
(10)
(11)
No.A2233-16/20
LV5980MD
Calculation of external phase compensation constant
Generally, to stabilize switching regulator, the frequency where closed loop gain is 1 (zero-cross frequency fZC) should
be 1/10 of the switching frequency (or 1/5). Since the switching frequency of this IC is 370kHz, the zero-cross frequency
should be 37kHz. Based on the above condition, we obtain the following formula (12).
RL
VREF
1
VOUT • GMER • RC + SCC • GCS • 1 + SCO • RL = 1
(12)
As for zero-cross frequency, since the impedance element of phase compensation is RC >>1/SCC, the following equation
(13) is obtained.
RL
VREF
•
G
•
R
•
G
•
=1
MER
C
CS
VOUT
1 + 2π • fZC • CO • RL
(13)
Phase compensation external resistance can be obtained with the following formula (14), the variation of the formula (13).
Since 2π • fZC • CO • RL >> 1 in the equation (14), we know that the external resistance is independent of load resistance.
VOUT
1 + 2π • fZC • CO • RL
1
1
RC = V
•
•
•
RL
REF GMER GCS
(14)
When output is 5V and load resistance is 5Ω (1A load), the resistances of phase compensation are as follows.
GCS = 2.7A/V, GMER = 220μA/V, fZC = 37kHz
5
1
1 1 + 2 × 3.14 × (37 × 103) × (30 × 10-6) × 5
RC = 1.235 ×
= 48.898…× 103
-6 ×
5
2.7 ×
220 × 10
= 48.90 [kΩ]
If frequency of zero point fz and pole fp1 are in the same position, they cancel out each other. Therefore, only the pole
frequency remains for frequency characteristics of the closed loop gain.
In other words, gain decreases at -20dB/dec and phase only rotates by 90º and this allows characteristics where oscillation
never occurs.
fp1 = fz
1
1
•
2π • CO • RL 2π • CO • RC
CC =
RL • CO 5 × (30 × 10-6)
-9
RC • 48.9 × 103 = 3.067…× 10
= 3.07 [nF]
The above shows external compensation constant obtained through ideal equations. In reality, we need to define phase
constant through testing to verify constant IC operation at all temperature range, load range and input voltage range. In the
evaluation board for delivery, phase compensation constants are defined based on the above constants. The zero-cross
frequency required in the actual system board, in other word, transient response is adjusted by external compensation
resistance. Also, if the influence of noise is significant, use of external phase compensation capacitor with higher value is
recommended.
No.A2233-17/20
LV5980MD
Caution in pattern design
Pattern design of the board affects the characteristics of DC-DC converter. This IC switches high current at a high speed.
Therefore, if inductance element in a pattern wiring is high, it could be the cause of noise. Make sure that the pattern of the
main circuit is wide and short.
Orange :Hi Side MOSFET ON
Red
:Hi Side MOSFET OFF
(1) Pattern design of the input capacitor
Connect a capacitor near the IC for noise reduction between VIN and the GND. The change of current is at the largest
in the pattern between an input capacitor and VIN as well as between GND and an input capacitor among all the main
circuits. Hence make sure that the pattern is as fat and short as possible.
(2) Pattern design of an inductor and the output capacitor
High electric current flows into the choke coil and the output capacitor. Therefore this pattern should also be as fat and
short as possible.
(3) Pattern design with current channel into consideration
Make sure that when High side MOSFET is ON (red arrow) and OFF (orange arrow), the two current channels runs
through the same channel and an area is minimized.
(4) Pattern design of the capacitor between VIN-PDR
Make sure that the pattern of the capacitor between VIN and PDR is as short as possible.
OUT
(5) Pattern design of the small signal GND
The GND of the small signal should be separated from the power GND.
(6) Pattern design of the FB-OUT line
Wire the line shown in red between FB and OUT to the output capacitor as near as
possible. When the influence of noise is significant, use of feedback resistors R2
and R3 with lower value is recommended.
FB
Fig: FB-OUT Line
No.A2233-18/20
LV5980MD
PAKAGE DIMENSIONS
SOIC-10NB
CASE 751BQ-01
ISSUE A
2X
0.10 C A-B
D
D
A
2X
0.10 C A-B
10
F
6
H
E
1
5
0.20 C
10X
B
2X 5 TIPS
L2
b
0.25
A3
L
C
SEATING
PLANE
DETAIL A
M
C A-B D
TOP VIEW
10X
0.10 C
0.10 C
h
X 45
M
A
e
A1
C
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION
SHALL BE 0.10mm TOTAL IN EXCESS OF ’b’
AT MAXIMUM MATERIAL CONDITION.
4. DIMENSIONS D AND E DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS. MOLD FLASH, PROTRUSIONS, OR
GATE BURRS SHALL NOT EXCEED 0.15mm
PER SIDE. DIMENSIONS D AND E ARE DETERMINED AT DATUM F.
5. DIMENSIONS A AND B ARE TO BE DETERMINED AT DATUM F.
6. A1 IS DEFINED AS THE VERTICAL DISTANCE
FROM THE SEATING PLANE TO THE LOWEST
POINT ON THE PACKAGE BODY.
SEATING
PLANE
DETAIL A
SIDE VIEW
RECOMMENDED
SOLDERING FOOTPRINT*
END VIEW
DIM
A
A1
A3
b
D
E
e
H
h
L
L2
M
GENERIC
MARKING DIAGRAM*
10
1.00
PITCH
10X 0.58
MILLIMETERS
MIN
MAX
1.25
1.75
0.10
0.25
0.17
0.25
0.31
0.51
4.80
5.00
3.80
4.00
1.00 BSC
5.80
6.20
0.37 REF
0.40
1.27
0.25 BSC
0
8
XXXXX
ALYWX
1
6.50
10X 1.18
1
DIMENSION: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
XXXXX
A
L
Y
W
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
*This information is generic. Please refer
to device data sheet for actual part
marking. Pb−Free indicator, “G”, may
or not be present.
No.A2233-19/20
LV5980MD
ORDERING INFORMATION
Device
LV5980MD-AH
Package
SOIC10
(Pb-Free / Halogen Free)
Shipping (Qty / Packing)
2500 / Tape & Reel
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PS No.A2233-20/20