PI3VDP3212 2-Lane DisplayPort™ Rev 1.2 Compliant

PI3VDP3212
2-Lane DisplayPort™ Rev 1.2 Compliant Switch
Features
Description
ÎÎ2-lane, 1:2 mux/demux that will support RBR, HBR1, or
Pericom Semiconductor’s PI3VDP3212 mux/demux is targeted
for next generation digital video signals. This device can be used
to connect a DisplayPort™ Source to two Independent DisplayPort Sinks or to connect two DisplayPort sources to a single DP
display.
HBR2
ÎÎ1-channel 1:2 mux/demux for DP_HPD signal
ÎÎ1-differential channel 1:2 mux/demux for DP_Aux signal
with support up to 720Mbps
The newly released DisplayPort spec requires a data rate of 5.4
Gbps. Pericom's solution has been specifically designed around
this standard and will support such signals.
ÎÎInsertion Loss for high speed channels @ 2.7 GHz: -1.7dB
ÎÎ-3dB Bandwidth for high speed channels:
4.7GHz
ÎÎReturn loss for high speed channels @ 2.7GHz: -16dB
Application
ÎÎLow Bit-to-Bit Skew , 7ps max (between '+' and '-' bits)
Routing of DisplayPort signals with low signal attenuation between source and sink.
ÎÎLow Crosstalk for high speed channels: [email protected] Gbps
ÎÎLow Off Isolation for high speed channels:
[email protected] Gbps
ÎÎVDD Operating Range: 3.3V +/-10%
ÎÎESD Tolerance: 2kV HBM
ÎÎLow channel-to-channel skew, 35ps max
ÎÎPackaging (Pb-free & Green):
àà 32 TQFN (ZL)
Block Diagram
D0+
D0 D1+
D1 -
D0+A
D0-A
D1+A
D1-A
D0+B
D0-B
D1+B
D1-B
AUX+
AUXHPD
AUX+ A
AUX-A
HPD A
AUX+ B
AUX- B
HPD B
OE
SEL
Logic
Control
AUX_SEL
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PI3VDP3212
2-Lane DisplayPort™ Rev 1.2 Compliant Switch
GND
28
VDD
29
30
D0-A
D0+A
Truth Table
1
27
2
26
3
25
4
24
5
23
GND
8
20
9
19
10
18
11
17
D1+A
D1-A
D0+B
D0-B
D1+B
D1-B
GND
VDD
AUX+A
AUX-A
HPD_A
OE
SEL
AUX_
SEL
Function
Low
Low
Low
Port A active for all channels
Low
Low
High
Port A for HS, port B for HPD/AUX
Low
High
Low
Port B for HS, port A for HPD/AUX
Low
High
High
Port B active for all channels
High
x
x
All I/O's are hi-z and IC is power down
VDD
HPD_B
AUX-B
AUX+B
VDD
16
21
15
7
14
22
13
6
12
D0+
D0VDD
D1+
D1AUX+
AUXHPD
VDD
SEL
OE
31
32
AUX_SEL
Pin Assignment (TQFN-32)
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PI3VDP3212
2-Lane DisplayPort™ Rev 1.2 Compliant Switch
Pin Description
pin#
pin Name
Signal Type
Description
1
D0+
I/O
positive differential signal 0 for COM port
2
D0-
I/O
negative differential signal 0 for COM port
3
VDD
Power
3.3V +/-10% power supply
4
D1+
I/O
positive differential signal 1 for COM port
5
D1-
I/O
negative differential signal 1 for COM port
6
AUX+
I/O
positive differential signal for AUX COM port
7
AUX-
I/O
negative differential signal for AUX COM port
8
HPD
I/O
HPD for COM port
9
VDD
Power
3.3V +/-10% power supply
10
SEL
I
11
OE
I
Output enable. if OE is low, IC is enabled. If OE is high, then IC is power
down and all I/Os are hi-z
12
VDD
Power
3.3V +/-10% power supply
13
HPD_B
I/O
HPD for port B
14
AUX-B
I/O
negative differential signal for AUX, port B
15
AUX+B
I/O
positive differential signal for AUX, port B
16
VDD
Power
3.3V +/-10% power supply
17
HPD_A
I/O
HPD for port A
18
AUX-A
I/O
negative differential signal for AUX, port A
19
AUX+A
I/O
positive differential signal for AUX, port A
20
VDD
Power
3.3V +/-10% power supply
21
GND
Ground
Ground
22
D1-B
I/O
negative differential signal 1 for port B
23
D1+B
I/O
positive differential signal 1 for port B
24
D0-B
I/O
negative differential signal 0 for port B
25
D0+B
I/O
positive differential signal 0 for port B
26
D1-A
I/O
negative differential signal 1 for port A
27
D1+A
I/O
positive differential signal 1 for port A
28
GND
Ground
Ground
29
VDD
Power
3.3V +/-10% power supply
30
D0-A
I/O
negative differential signal 0 for port A
31
D0+A
I/O
positive differential signal 0 for port A
switch logic control.
If HIGH, then path B is selected for high speed channels only
If LOW, then path A is selected for high speed channels only
switches only the AUX and HPD channels from port A vs. port B
32
AUX_SEL
I
If High, path B is selected
If LOW, path A is selected
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PI3VDP3212
2-Lane DisplayPort™ Rev 1.2 Compliant Switch
Maximum Ratings
(Above which useful life may be impaired. For user guidelines, not tested.)
Storage Temperature ........................................................... –65°C to +150°C
Supply Voltage to Ground Potential ....................................–0.5V to +4.2V
DC Input Voltage ...................................................................... –0.5V to VDD
DC Output Current ..............................................................................120mA
Power Dissipation .................................................................................... 0.5W
Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the
device. This is a stress rating only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
reliability.
DC Electrical Characteristics for Switching over Operating Range (TA = –40°C to +85°C, VDD =
3.3V ±10%)
Parameter
Description
Test Conditions(1)
Min
Typ(1)
VIH
Input HIGH Voltage
Guaranteed HIGH level
1.5
VIL
Input LOW Voltage
Guaranteed LOW level
VIK
Clamp Diode Voltage, Dx
VDD = Max., IIN = –18mA
IIH
Input HIGH Current
VDD = Max., VIN = VDD
±5
IIL
Input LOW Current
VDD = Max., VIN = GND
±5
IOFF_SB
I/O leakage when part is off for side
VDD = 0V, VINPUT = 0V to 3.6V
band signals only (DDC, AUX, HPD)
RON_HS
On resistance between input to output for high speed signals
VDD = 3.3V, Vinput = 0V to 2V,
IINPUT = 20mA
10
Ohm
RON_AUX
On resistance between input to output for side-band signals (AUX)
VDD = 3.3V, Vinput = 0 to 3.3V,
IINPUT = 20mA
7
Ohm
Aux_ss
Signal Swing Tolerance in Aux path
VDD = 3.0V
HPD_I
Input voltage tolerance on HPD path
HPD_O
Output voltage on HPD path
–1.6
Max
Units
0.75
V
–1.8
µA
20
–0.5
3.6
V
5.5
V
3.6
V
Typ(1)
Max
Units
320
500
uA
HPD input from 0V to 5.25V
Power Supply Characteristics (TA = –40°C to +85°C)
Parameter
Description
Test Conditions(1)
ICC
Quiescent Power Supply Current
VDD = 3.3V., VIN = GND or VDD
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Min
11/11/13
PI3VDP3212
2-Lane DisplayPort™ Rev 1.2 Compliant Switch
Dynamic Electrical Characteristics over Operating Range (TA = -40º to +85ºC, VDD = 3.3V ±10%)
Parameter
Description
Test Conditions
Typ.
XTALK
Crosstalk on High Speed Channels
See Fig. 1 for Measurement f= 2.7 GHz
Setup
f = 1.35 GHz
-25dB
f= 2.7 GHz
See Fig. 2 for Measurement
Setup,
f = 1.35 GHz
Max
Units
-32dB
-22dB
dB
OIRR
OFF Isolation on High Speed Channels
ILOSS
Differential Insertion Loss on High Speed
@5.4Gbps (see figure 3)
Channels
-1.7
dB
R loss
Differential Return Loss on high speed
channels
@ 2.7GHz
-16
dB
BW_Dx±
Bandwidth -3dB for Main high speed
path (Dx±)
See figure 3
4.7
GHz
BW_AUX/
HPD
-3dB BW for AUX and HPD signals
See figure 3
1.5
GHz
Tsw a-b
time it takes to switch from port A to port
B
1
us
Tsw b-a
time it takes to switch from port B to port
A
1
us
Tstartup
Vdd valid to channel enable
10
us
Twakeup
Enabling output by changing OE from
low to High
10
us
-30dB
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V DD = 3.3V, TA = 25°C ambient and maximum loading.
Switching Characteristics (TA= -40º to +85ºC, VDD = 3.3V±10%)
Parameter
Description
Tpd
Propagation delay (input pin to output pin)
80
ps
tb-b
Bit-to-bit skew within the same differential pair
5
ps
tch-ch
Channel-to-channel skew
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Min.
Typ.
Max.
50
5
Units
ps
11/11/13
PI3VDP3212
2-Lane DisplayPort™ Rev 1.2 Compliant Switch
BALANCED
PORT1
BALANCED
PORT2
+
+
50
–
–
50
+
+
50
–
–
50
DUT
Fig 1. Crosstalk Setup
BALANCED
PORT1
+
+
50
–
–
50
+
BALANCED
PORT2
–
DUT
Fig 2. Off-isolation setup
BALANCED
PORT1
+
+
–
–
BALANCED
PORT2
DUT
Fig 3. Differential Insertion Loss set up
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PI3VDP3212
2-Lane DisplayPort™ Rev 1.2 Compliant Switch
-20.0
-30.0
-40.0
-50.0
Crosstalk (dB)
-60.0
-70.0
-80.0
-90.0
-100.0
1.00E+07
1.00E+09
1.00E+08
1.00E+10
Frequency (Hz)
Fig 4. Xtalk for high speed channels (D0 and D1)
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PI3VDP3212
2-Lane DisplayPort™ Rev 1.2 Compliant Switch
-0.0
-10.0
-20.0
Off Isolation (dB)
-30.0
-40.0
-50.0
-60.0
-70.0
-80.0
1.00E+07
1.00E+09
1.00E+08
1.00E+10
Frequency (Hz)
Fig 5. Off Isolation for high speed channels (D0 an D1). Red is for path B and Blue is for path A
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PI3VDP3212
2-Lane DisplayPort™ Rev 1.2 Compliant Switch
-0.0
-1.0
Insertion Loss (dB)
-2.0
-3.0
-4.0
-5.0
-6.0
1.00E+07
1.00E+09
1.00E+08
1.00E+10
Frequency (Hz)
Fig 6. Insertion Loss for high speed channels, D0 and D1. Red is for path B and Blue is for path A
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PI3VDP3212
2-Lane DisplayPort™ Rev 1.2 Compliant Switch
Test Circuit for Electrical Characteristics(1-5)
2 * VDD
VDD
200-ohm
Pulse
Generator
VIN
VOUT
D.U.T
4pF
CL
RT
200-ohm
Notes:
1. CL = Load capacitance: includes jig and probe capacitance.
2. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator
3. Output 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
4. Output 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
5. All input impulses are supplied by generators having the following characteristics: PRR ≤ MHz, ZO = 50Ω, t R ≤ 2.5ns, t F ≤ 2.5ns.
6. The outputs are measured one at a time with one transition per measurement.
Switching Waveforms
SEL
VDD
50%
50%
0V
Output 1
tPZL
tPLZ
VOH
10%
tPHZ
tPZH
90%
VOL
VOH
VOL
Output 2
Voltage Waveforms Enable and Disable Times
Switch Positions
Test
Switch
tPLZ , tPZL (output on B-side)
2 * Vdd
tPHZ , tPZH (output on B-side)
GND
Prop Delay
Open
Test Circuit for Dynamic Electrical Characteristics
Agilent PNA-L Network Analyzer
Balanced port 1
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Balanced port 2
DUT
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11/11/13
PI3VDP3212
2-Lane DisplayPort™ Rev 1.2 Compliant Switch
Packaging Mechanical: 32-Contact TQFN (ZL)
1
DATE: 10/09/09
DESCRIPTION: 32-contact, Thin Fine Pitch Quad Flat No-Lead (TQFN)
PACKAGE CODE: ZL (ZL32)
DOCUMENT CONTROL #: PD-2044
REVISION: A
09-0125
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PI3VDP3212
2-Lane DisplayPort™ Rev 1.2 Compliant Switch
1
DATE: 11/11/13
DESCRIPTION: 32-contact, Thin Fine Pitch Quad Flat No-Lead (TQFN)
PACKAGE CODE: ZLS (ZLS32)
REVISION: --
DOCUMENT CONTROL #: PD-2175
Note:
For latest package info, please check: http://www.pericom.com/products/packaging/mechanicals.php
Ordering Information
Ordering Code
Package Code
Package Description
PI3VDP3212ZLE
ZL
Pb-free & Green, 32-contact TQFN
PI3VDP3212ZLSE
ZLS
Pb-free & Green, 32-contact TQFN
Notes:
• Thermal characteristics can be found on the company web site at www.pericom.com/packaging/
• "E" denotes Pb-free and Green
• Adding an "X" at the end of the ordering code denotes tape and reel packaging
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