PI6UMC10802 Ultra Mobility, Clipped Sinewave, Clock Buffer with 2 Outputs Features Description ÎÎDual Analog Voltage Clipped Sinewave Buffer The PI6UMC10802 is a small footprint, low power, clipped sinewave buffer with 2 outputs designed to address mobile clock distribution applications and offers cost savings over using multiple TCXOs. ÎÎDistributes Two Outputs ÎÎ19.2 MHz to 52 MHz Operation Frequency Range ÎÎLow Power Consumption: The PI6UMC10802 features analog voltage buffer with variable input (0.3V-1.5V) and fixed output voltage (1.5V @26MHz). ÎÎTypical off ct - <0.2µA ÎÎ Typical on current - 0.75mA (one output enabled) @ 26MHz The PI6UMC10802 operates at 1.8V ± 5% and guaranteed over the extended commercial temperature range of -30°C to +85°C. ÎÎTypical on ct - 2.1mA (both outputs enabled) @ 26MHz ÎÎVariable Input Voltage - 0.3V - 1.5V ÎÎ2nd Harmonic -50dBc max The buffer provides low harmonic output with very low additive phase noise. There is negligible power consumption in standby mode. EN1 and EN2 signals enable the respective OUT1, OUT2 buffers. ÎÎ3rd Harmonic -15dBc max Applications ÎÎ4th Harmonic -50dBc max ÎÎSmart phone Clock Reference for RF & Peripheral ÎÎ5th Harmonic -20dBc max ÎÎMultimode RF clock reference ÎÎFixed Output Voltage - 1.5V @26MHz ÎÎLow Output Harmonic Level ÎÎLow Phase Noise Output ÎÎOver –70dB reverse isolation between output and input ÎÎPower supply: 1.8V ±5% ÎÎTemperature Range ÎÎ-30°C to +85°C extended commercial temp range ÎÎPackaging (Pb-free & Green): 10 GNDIN OUT1 BUFFER CLKIN CLKIN OUT2 15-0003 VDDIN EN2 3 1 9 1 7 2 6 8 GNDOUT 4 5 VDDOUT2 EN1 OUT1 EN1 Block Diagram 10-pin TQFN VDDOUT1 Pin Configuration EN2 ÎÎ10-pin UQFN 1.8 ×1.4 × 0.55 mm (ZM10) OUT2 PI6UMC10802 RevB 01/08/2014 PI6UMC10802 Ultra Mobility, Clipped Sinewave, Clock Buffer with 2 Outputs Pin Description Pin Signal Description 2 CLKIN Reference clock input 8, 6 OUT1, OUT2 Clipped Sinewave, Clock outputs with weak pull-down 1 GNDIN Input Ground 9, 5 VDDOUT1, VDDOUT2 Output Power - 1.8V 10, 4 EN1, EN2 Output Enable for OUT1, OUT 2. Active HIGH. Output is in logic LOW state when the corresponding EN1 or EN2 is LOW (see Truth Table). EN1 = 0 and EN2 = 0 is chip standby mode 7 GNDOUT Output Ground 3 VDDIN Input Stage Power - 1.8V Maximum Ratings(1) Operation Ratings(2) Supply Voltage Supply Voltage VDDOUT1, VDDOUT2................................. -0.5V to +2.5V VDDOUT1, VDDOUT2………...……………..........….1.8V ± 5% Input Current …………………………………….......... .-50mA Ambient Temperature (TA)..............................-30°C to +85°C Output Current..........…………………………………..±50mA Lead Temperature (soldering, 10 sec.).......................... +260°C Storage Temperature (Ts).................................-65°C to +150°C Junction Temperature…...…….………………..............+150°C ESD Protection ............................................2000V min (HBM) Notes: 1. Stresses greater then those listed under Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of the this specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. θJA and ΨJB values are determined for a 4-layer board in still-air, unless otherwise stated. Output Truth Table EN1 EN2 OUT1 OUT2 0 0 Low Low 0 1 Low Enabled 1 0 Enabled Low 1 1 Enabled Enabled 15-0003 2 PI6UMC10802 RevB 01/08/2014 PI6UMC10802 Ultra Mobility, Clipped Sinewave, Clock Buffer with 2 Outputs DC Electrical Characteristics (VDDOUT1, VDDOUT2 = 1.8V ± 5%, TA=-30°C to 85°C, RL = 10kW, CL = 10pF, unless otherwise stated.) Parameter IDD1 Description Test Conditions Supply Current @ 19.2MHz IDD1 Supply Current @ 26MHz IDD1 Supply Current @ 38.4MHz Min. Typ. Max. EN1 = 0, EN2 = 0 0.2 1 EN1 = 1, EN2 = 0 or EN1 = 0, EN2 =1 0.55 0.75 EN1 = 1, EN2 = 1 1.6 2 EN1 = 0, EN2 = 0 0.2 1 EN1 = 1, EN2 = 0 or EN1 = 0, EN2 =1 0.75 1 EN1 = 1, EN2 = 1 2.1 2.5 EN1 = 0, EN2 = 0 0.2 1 EN1 = 1, EN2 = 0 or EN1 = 0, EN2 =1 1.2 1.5 EN1 = 1, EN2 = 1 3 3.5 μA mA μA mA μA mA VIH EN1, EN2 Input HIGH Voltage 0.65*VDD 1.95 VIL EN1, EN2 Input LOW Voltage -0.3 0.35*VDD Note: Units V 1. No Load. AC Electrical Characteristics (VDDOUT1, VDDOUT2 = 1.8V ± 5%, TA=-30°C to 85°C, RL = 10kW, CL = 10pF, unless otherwise stated.) Parameter Description Test Conditions Min. 19.2 FO Output frequency PI6UMC10802-1 PN OUT1, OUT2 Phase Noise degradation Load as in Fig. 1 VIN Input Voltage OUT1, OUT2 Harmonic Level PH(1) OUT1, OUT2 Harmonic Level PH (1) OUT1, OUT2 Harmonic Level PH (1) Typ. Max. 52 1KHz Offset 0 1 100KHz Offset 0 1 0.3 1.5 2nd Harmonic -50 Load as in Fig. 1 @ 19.2MHz 3rd Harmonic -15 I/P duty cycle 50% 4nd Harmonic -50 5th Harmonic -20 2nd Harmonic -50 Load as in Fig. 1 @ 26MHz 3rd Harmonic -15 I/P duty cycle 50% 4nd Harmonic -50 5th Harmonic -20 2nd Harmonic -50 Load as in Fig. 1 @ 38.4MHz 3rd Harmonic -15 I/P duty cycle 50% 4nd Harmonic -50 5th Harmonic -20 Units MHz dBc/Hz V dBc dBc dBc Continued 15-0003 3 PI6UMC10802 RevB 01/08/2014 PI6UMC10802 Ultra Mobility, Clipped Sinewave, Clock Buffer with 2 Outputs Parameter Description OUT1, OUT2 Harmonic Level PH (1) Test Conditions Min. -40 Load as in Fig. 1 @ 52MHz 3rd Harmonic -16 I/P duty cycle 50% 4nd Harmonic -36 5th Harmonic -25 Peak-to-Peak output voltage VDD = 1.8V ± 5% Reverse Isolation PR Max. 2nd Harmonic VDD = 1.8V ± 3% Vpp Typ. OUT1, OUT2 to CLKIN @19.2MHz 1.56 1.73 @26MHz 1.49 1.63 @38.4MHz 1.26 1.40 @52MHz 1.03 1.37 @19.2MHz 1.53 1.76 @26MHz 1.46 1.66 @38.4MHz 1.23 1.43 @52MHz 1.0 1.40 70 Units dBc V dB Note: 1. Harmonics levels are for stated load conditions. 15-0003 4 PI6UMC10802 RevB 01/08/2014 PI6UMC10802 Ultra Mobility, Clipped Sinewave, Clock Buffer with 2 Outputs Fig. 1. Test Condition 1000pF 1000pF TCXO CLK_IN PI6UMC10802 OUT1 10k-ohm 1000pF 10pF OUT2 10pF 10k-ohm Figure 1. Test Condition WiFi/BT Combo Module or GPS C1 1000pF VCTCXO C2 PI6UMC10802 C1 GSM RF C2 C1, C2 - Depending on application input levels Figure 2. Application in Smart Phone Application Guide: Please make sure a low noise supply is used to ensure output phase noise is minimized. We recommend use of an "analog" +1.8V supply which powers only low noise/low power circuits. All the VDD pins are tied to a common 1µF ceramic decoupling capacitor to ground. The decoupling capacitor should be placed close to VDDIN pin. Digital supplies are not recommended. VDD routing for the decoupling capacitor should be done directly to the chip on the top PCB layer without any vias. 15-0003 5 PI6UMC10802 RevB 01/08/2014 PI6UMC10802 Ultra Mobility, Clipped Sinewave, Clock Buffer with 2 Outputs Package Mechanical: 10-pin UQFN (ZM10) 1 DATE: 01/29/09 DESCRIPTION: 10-contact, Ultra-thin Quad Flat No-Lead (UQFN) PACKAGE CODE: ZM10 REVISION: A DOCUMENT CONTROL #: PD-2066 09-0072 Ordering Information(1-3) Ordering Code PI6UMC10802-1ZME Package Code ZM Package Type Pb-free & Green, 10-pin UQFN Notes: 1. Thermal characteristics can be found on the company website at http://www.pericom.com/packaging/ 2. E = Pb–free and Green 3. X Suffix = Tape & Reel Pericom Semiconductor Corporation • 1-800-435-2336 • www.pericom.com 15-0003 6 PI6UMC10802 RevB 01/08/2014