LNK603-606/613-616 LinkSwitch-II

LNK603-606/613-616
™
LinkSwitch-II
Family
Energy-Efficient, Accurate CV/CC Switcher
for Adapters and Chargers
Product Highlights
Dramatically Simplifies CV/CC Converters
• Eliminates optocoupler and all secondary CV/CC control circuitry
• Eliminates all control loop compensation circuitry
Advanced Performance Features
Compensates for transformer inductance tolerances
Compensates for input line voltage variations
Compensates for cable voltage drop (LNK61X series)
Compensates for external component temperature variations
Very tight IC parameter tolerances using proprietary trimming
technology
• Frequency jittering greatly reduces EMI filter cost
• Even tighter output tolerances achievable with external resistor
selection/trimming
• Programmable switching frequency up to 85 kHz to reduce transformer size
•
•
•
•
•
Advanced Protection/Safety Features
Wide Range
High-Voltage
DC Input
D
LinkSwitch-II
FB
BP/M
S
PI-4960-012315
(a) Typical Application Schematic
±5%
VO
• Auto-restart protection reduces power delivered by >95% for output
short-circuit and control loop faults (open and shorted components)
• Hysteretic thermal shutdown – automatic recovery reduces power
±10%
supply returns from the field
• Meets high-voltage creepage requirements between DRAIN and all
other pins both on the PCB and at the package
EcoSmart™– Energy Efficient
external bias winding
• ON/OFF control provides constant efficiency down to very light loads
– ideal for CEC and ENERGY STAR 2.0 regulations
• No current sense resistors – maximizes efficiency
Green Package
• Halogen free and RoHS compliant package
Applications
• Chargers for cell/cordless phones, PDAs, MP3/portable audio
devices, adapters, LED drivers, etc.
Description
The LinkSwitch-II dramatically simplifies low power CV/CC charger
designs by eliminating an optocoupler and secondary control circuitry.
The device introduces a revolutionary control technique to provide very
tight output voltage and current regulation, compensating for transformer
and internal parameter tolerances along with input voltage variations.
The device incorporates a 700 V power MOSFET, a novel ON/OFF control
state machine, a high-voltage switched current source for self biasing,
frequency jittering, cycle-by-cycle current limit and hysteretic thermal
shutdown circuitry onto a monolithic IC.
IO
PI-4906-012315
• Easily meets all global energy efficiency regulations
• No-load consumption below 30 mW at 230 VAC with optional
(b) Output Characteristic
Figure 1. Typical Application/Performance – Not a Simplified Circuit (a) and Output Characteristic Envelope (b). (see Application Section for
more information).
Output Power Table
Product3
85-265 VAC
Adapter1
Open Frame2
LNK603/613PG/DG
2.5 W
3.3 W
LNK604/614PG/DG
3.5 W
4.1 W
LNK605/615PG/DG
4.5 W
5.1 W
LNK606/616PG/GG/DG
5.5 W
6.1 W
Table 1. Output Power Table.
Notes:
1. Minimum continuous power in a typical non-ventilated enclosed adapter
measured at +50 °C ambient, device, TJ <100 °C.
2. Maximum practical continuous power in an open frame design with adequate
heat sinking, measured at 50 °C ambient (see Key Applications Considerations section for more information).
3. Packages: P: DIP-8C, G: SMD-8C, D: SO-8C.
Figure 2. DIP-8C P and SO-8C D Packages.
www.power.com February 2015
This Product is Covered by Patents and/or Pending Patent Applications.
LNK603-606/613-616
REGULATOR
6V
BYPASS
(BP/M)
+
+
FEEDBACK
(FB)
DRAIN
(D)
VTH
-
D
Q
FB
OUT
tSAMPLE-OUT
CABLE DROP
COMPENSATION
ILIM
INDUCTANCE
CORRECTION
tSAMPLE-INPUT
-
VILIMIT
Drive
DCMAX
FAULT
Auto-Restart
Open-Loop
FB
6.5 V
Reset
STATE
MACHINE
VILIMIT
6V
5V
THERMAL
SHUTDOWN
DCMAX
SAMPLE
DELAY
tSAMPLE-OUT
tSAMPLE-INPUT
OSCILLATOR
SOURCE
(S)
+
SOURCE
(S)
CONSTANT
CURRENT
ILIM
-
VILIMIT
Current Limit
Comparator
LEADING
EDGE
BLANKING
PI-4908-012915
Figure 3.
Functional Block Diagram.
Pin Functional Description
DRAIN (D) Pin:
This pin is the power MOSFET drain connection. It provides internal
operating current for both start-up and steady-state operation.
P Package (DIP-8C)
G Package (SMD-8C)
D Package (SO-8C)
BYPASS/MULTI-FUNCTIONAL PROGRAMMABLE (BP/M) Pin:
This pin has multiple functions:
1. It is the connection point for an external bypass capacitor for the
internally generated 6 V supply.
FB
1
8
BP/M
2
7
2. It is a mode selection for the cable drop compensation for
6
LNK61X series.
FEEDBACK (FB) Pin:
During normal operation, switching of the power MOSFET is controlled
by this pin. This pin senses the AC voltage on the bias winding. This
control input regulates both the output voltage in CV mode and output
current in CC mode based on the flyback voltage of the bias winding.
The internal inductance correction circuit uses the forward voltage on
the bias winding to sense the bulk capacitor voltage.
D
4
5
S
S
FB
BP/M
8
2
7
6
S
S
1
D
4
5
S
S
S
S
PI-3491-020615
Figure 4. Pin Configuration.
SOURCE (S) Pin:
This pin is internally connected to the output MOSFET source for
high-voltage power and control circuit common returns.
2
Rev. I 02/15
www.power.com
LNK603-606/613-616
LinkSwitch-II Functional Description
The LinkSwitch-II combines a high-voltage power MOSFET
switch with a power supply controller in one device. Similar to the
LinkSwitch-LP and TinySwitch-III it uses ON/OFF control to regulate
the output voltage. In addition, the switching frequency is modulated
to regulate the output current to provide a constant current
characteristic. The LinkSwitch-II controller consists of an oscillator,
feedback (sense and logic) circuit, 6 V regulator, over-temperature
protection, frequency jittering, current limit circuit, leading-edge
blanking, inductance correction circuitry, frequency control for
constant current regulation and ON/OFF state machine for CV control.
Inductance Correction Circuitry
If the primary magnetizing inductance is either too high or low the
converter will automatically compensate for this by adjusting the
oscillator frequency. Since this controller is designed to operate in
discontinuous-conduction mode the output power is directly
proportional to the set primary inductance and its tolerance can be
completely compensated with adjustments to the switching
frequency.
Constant Current (CC) Operation
As the output voltage and therefore the flyback voltage across the
bias winding increases, the FEEDBACK pin voltage increases. The
switching frequency is adjusted as the FEEDBACK pin voltage
increases to provide a constant output current regulation. The
constant current circuit and the inductance correction circuit are
designed to operate concurrently in the CC region.
Constant Voltage (CV) Operation
As the FEEDBACK pin approaches VFBth from the constant current
regulation mode, the power supply transitions into CV operation.
The switching frequency at this point is at its maximum value,
corresponding to the peak power point of the CC/CV characteristic.
The controller regulates the FEEDBACK pin voltage to remain at VFBth
using an ON/OFF state-machine. The FEEDBACK pin voltage is
sampled 2.5 ms after the turn-off of the high-voltage switch. At light
loads the current limit is also reduced to decrease the transformer
flux density.
Output Cable Compensation
This compensation provides a constant output voltage at the end of
the cable over the entire load range in CV mode. As the converter
load increases from no-load to the peak power point (transition point
between CV and CC) the voltage drop introduced across the output
cable is compensated by increasing the FEEDBACK pin reference
voltage. The controller determines the output load and therefore the
correct degree of compensation based on the output of the state
machine. Cable drop compensation for a 24 AWG (0.3 W) cable is
selected with CBP = 1 mF and for a 26 AWG (0.49 W) cable with
CPB = 10 mF.
Auto-Restart and Open-Loop Protection
In the event of a fault condition such as an output short or an open
loop condition the LinkSwitch-II enters into an appropriate protection
mode as described below.
In the event the FEEDBACK pin voltage during the flyback period falls
below 0.7 V before the FEEDBACK pin sampling delay (~2.5 ms) for a
duration in excess of ~450 ms (auto-restart on-time (t AR-ON) the
converter enters into auto-restart, wherein the power MOSFET is
disabled for 2 seconds (~18% auto-restart duty cycle). The autorestart alternately enables and disables the switching of the power
MOSFET until the fault condition is removed.
In addition to the conditions for auto-restart described above, if the
sensed FEEDBACK pin current during the forward period of the
conduction cycle (switch “on” time) falls below 120 mA, the converter
annunciates this as an open-loop condition (top resistor in potential
divider is open or missing) and reduces the auto-restart time from
450 ms to approximately 6 clock cycles (90 ms), whilst keeping the
disable period of 2 seconds.
Over-Temperature Protection
The thermal shutdown circuitry senses the die temperature. The
threshold is set at 142 °C typical with a 60 °C hysteresis. When the
die temperature rises above this threshold (142 °C) the power
MOSFET is disabled and remains disabled until the die temperature
falls by 60 °C, at which point the MOSFET is re-enabled.
Current Limit
The current limit circuit senses the current in the power MOSFET.
When this current exceeds the internal threshold (ILIMIT), the power
MOSFET is turned off for the remainder of that cycle. The leading
edge blanking circuit inhibits the current limit comparator for a short
time (tLEB) after the power MOSFET is turned on. This leading edge
blanking time has been set so that current spikes caused by
capacitance and rectifier reverse recovery time will not cause
premature termination of the MOSFET conduction. The LinkSwitch-II
also contains a “di/dt” correction feature to minimize CC variation across
the input line range.
6.0 V Regulator
The 6 V regulator charges the bypass capacitor connected to the
BYPASS pin to 6 V by drawing a current from the voltage on the
DRAIN, whenever the MOSFET is off. The BYPASS pin is the internal
supply voltage node. When the MOSFET is on, the device runs off of
the energy stored in the bypass capacitor. Extremely low power
consumption of the internal circuitry allows the LinkSwitch-II to
operate continuously from the current drawn from the DRAIN pin.
A bypass capacitor value of either 1 mF or 10 mF is sufficient for both
high frequency decoupling and energy storage.
3
www.power.com
Rev. I 02/15
LNK603-606/613-616
Applications Example
C6
R7
1 nF
100 V 200 Ω
L1
1.5 mH
D1
1N4007
5
C3
820 pF
1 kV
R2
470 kΩ
D2
1N4007
R3
300 Ω
C1
4.7 µF
400 V
8
D4
1N4007
D7
SS14
C7
680 µF
10 V
2
D5
1N4007
C2
4.7 µF
400 V
LinkSwitch-II
U1
LNK613DG
D
D6
LL4148
DC
Output
VR1
2MM5230B-7
4.7 V
R5
13 kΩ
1%
FB
BP
S
R8
200 Ω
4
NC
D3
1N4007
5 V, 555 mA
10
1
RF1
8.2 Ω
2W
AC
Input
3
T1
EE16
C4
1 µF
25 V
R4
6.2 kΩ C5
10 µF
16 V
R6
8.87 kΩ
1%
PI-5111-012315
Figure 5.
Energy Efficient USB Charger Power Supply (74% Average Efficiency, <30 mW No-load Input Power).
Circuit Description
This circuit shown in Figure 5 is configured as a primary-side
regulated flyback power supply utilizing the LNK613DG. With an
average efficiency of 74% and <30 mW no-load input power this
design easily exceeds the most stringent current energy efficiency
requirements.
Input Filter
AC input power is rectified by diodes D1 through D4. The rectified
DC is filtered by the bulk storage capacitors C1 and C2. Inductor L1,
C1 and C2 form a pi (π) filter, which attenuates conducted differentialmode EMI noise. This configuration along with Power Integrations
transformer E-shield™ technology allow this design to meet EMI
standard EN55022 class B with good margin without requiring a Y
capacitor, even with the output connected to safety earth ground.
Fusible resistor RF1 provides protection against catastrophic failure.
This should be suitably rated (typically a wire wound type) to
withstand the instantaneous dissipation while the input capacitors
charge when first connected to the AC line.
LNK 613 Primary
The LNK613DG device (U1) incorporates the power switching device,
oscillator, CC/CV control engine, startup, and protection functions.
The integrated 700 V MOSFET provides a large drain voltage margin
in universal input AC applications, increasing reliability and also
reducing the output diode voltage stress by allowing a greater
transformer turns ratio. The device is completely self-powered from
the BYPASS pin and decoupling capacitor C4. For the LNK61X
devices, the bypass capacitor value also selects the amount of output
cable voltage drop compensation. A 1 mF value selects the standard
compensation. A 10 mF value selects the enhanced compensation.
Table 2 shows the amount of compensation for each device and
bypass capacitor value. The LNK60x devices do not provide cable
drop compensation.
The optional bias supply formed by D6 and C5 provides the operating
current for U1 via resistor R4. This reduces the no-load consumption
from ~200 mW to <30 mW and also increases light load efficiency.
The rectified and filtered input voltage is applied to one side of the
primary winding of T1. The other side of the transformer’s primary
winding is driven by the integrated MOSFET in U1. The leakage
inductance drain voltage spike is limited by an RCD-R clamp
consisting of D5, R2, R3, and C3.
Output Rectification
The secondary of the transformer is rectified by D7, a 1 A, 40 V
Schottky barrier type for higher efficiency, and filtered by C7. If
lower efficiency is acceptable then this can be replaced with a
1 A PN junction diode for lower cost. In this application C7 was sized
to meet the required output voltage ripple specification without
requiring a post LC filter. To meet battery self discharge requirement
the pre-load resistor has been replaced with a series resistor and
Zener network (R8 and VR1). However in designs where this is not a
requirement a standard 1 kW resistor can be used.
Output Regulation
The LNK613 regulates the output using ON/OFF control in the
constant voltage (CV) regulation region of the output character-istic and
frequency control for constant current (CC) regulation. The feedback
resistors (R5 and R6) were selected using standard 1% resistor
values to center both the nominal output voltage and constant
current regulation thresholds.
4
Rev. I 02/15
www.power.com
LNK603-606/613-616
Key Application Considerations
Output Power Table
The data sheet maximum output power table (Table 1) repre-sents
the maximum practical continuous output power level that can be
obtained under the following assumed conditions:
LinkSwitch-II Output Cable Voltage Drop
Compensation
Device
LNK613
1. The minimum DC input voltage is 90 V or higher at 85 VAC input.
2.
3.
4.
5.
6.
The value of the input capacitance should be large enough to
meet these criteria for AC input designs.
Secondary output of 5 V with a Schottky rectifier diode.
Assumed efficiency of 70%.
Discontinuous mode operation (KP >1.3).
The part is board mounted with SOURCE pins soldered to a
sufficient area of copper to keep the SOURCE pin temperature at
or below 90 °C.
Ambient temperature of 50 °C for open frame designs and an
internal enclosure temperature of 60 °C for adapter designs.
Note: Higher output power are achievable if an output CC tolerance
>±10% is acceptable, allowing the device to be operated at a higher
SOURCE pin temperature.
Output Tolerance
LinkSwitch-II provides an overall output tolerance (including line,
component variation and temperature) of ±5% for the output voltage
in CV operation and ±10% for the output current during CC operation
over a junction temperature range of 0 °C to 100 °C for the P/G
package. For the D package (SO8) additional CC variance may occur
due to stress caused by the manufacturing flow (i.e. solder-wave
immersion or IR reflow). A sample power supply build is
recommended to verify production tolerances for each design.
BYPASS Pin Capacitor Selection
For LinkSwitch-II 60x Family of Devices (without output
cable voltage drop compensation)
A 1 mF BYPASS pin capacitor is recommended. The capacitor voltage
rating should be greater than 7 V. The capacitor’s dielectric material
is not important but tolerance of capacitor should be ≤ ±50%. The
capacitor must be physically located close to the LinkSwitch-II
BYPASS pin.
For LinkSwitch-II 61x Family of Devices (with output cable
voltage drop compensation)
The amount of output cable compensation can be selected with the
value of the BYPASS pin capacitor. A value of 1 mF selects the
standard cable compensation. A 10 mF capacitor selects the enhanced
cable compensation. Table 2 shows the amount of compensation for
each LinkSwitch-II device and capacitor value. The capacitor can be
either ceramic or electrolytic but tolerance and temperature variation
should be ≤ ±50%.
The output voltage that is entered into PIXls design spreadsheet is
the voltage at the end of the output cable when the power supply is
delivering maximum power. The output voltage at the terminals of
the supply is the value measured at the end of the cable multiplied by
the output voltage change factor.
LinkSwitch-II Layout Considerations
Circuit Board Layout
LinkSwitch-II is a highly integrated power supply solution that
integrates on a single die, both, the controller and the high-voltage
MOSFET. The presence of high switching currents and voltages
together with analog signals makes it especially important to follow
good PCB design practice to ensure stable and trouble free operation
LNK614
LNK615
LNK616
Table 2.
BYPASS Pin
Capacitor Value
Output Voltage
Change Factor
1 μF
1.035
10 μF
1.055
1 μF
1.045
10 μF
1.065
1 μF
1.050
10 μF
1.070
1 μF
1.060
10 μF
1.090
Cable Compensation Change Factor vs. Device and BYPASS Pin
Capacitor Value.
of the power supply. See Figure 6 for a recommended circuit board
layout for LinkSwitch-II.
When designing a printed circuit board for the LinkSwitch-II based
power supply, it is important to follow the following guidelines:
Single Point Grounding
Use a single point (Kelvin) connection at the negative terminal of the
input filter capacitor for the LinkSwitch-II SOURCE pin and bias
winding return. This improves surge capabilities by returning surge
currents from the bias winding directly to the input filter capacitor.
Bypass Capacitor
The BYPASS pin capacitor should be located as close as possible to
the SOURCE and BYPASS pins.
Feedback Resistors
Place the feedback resistors directly at the FEEDBACK pin of the
LinkSwitch-II device. This minimizes noise coupling.
Thermal Considerations
The copper area connected to the SOURCE pins provides the
LinkSwitch-II heat sink. A good estimate is that the LinkSwitch-II will
dissipate 10% of the output power. Provide enough copper area to
keep the SOURCE pin temperature below 90 °C. Higher temperatures
are allowable only if an output current (CC) tolerance above ±10% is
acceptable. In this case a maximum SOURCE pin temperature below
110 °C is recommended to provide margin for part to part RDS(ON)
variation.
Secondary Loop Area
To minimize leakage inductance and EMI the area of the loop connecting
the secondary winding, the output diode and the output filter capacitor
should be minimized. In addition, sufficient copper area should be
provided at the anode and cathode terminal of the diode for heat
sinking. A larger area is preferred at the quiet cathode terminal.
A large anode area can increase high frequency radiated EMI.
Electrostatic Discharge Spark Gap
An trace is placed along the isolation barrier to form one electrode of
a spark gap. The other electrode on the secondary is formed by the
output return node. The spark gap directs ESD energy from the
secondary back to the AC input. The trace from the AC input to the
spark gap electrode should be spaced away from other traces to
prevent unwanted arcing occurring and possible circuit damage.
Drain Clamp Optimization
LinkSwitch-II senses the feedback winding on the primary side to
regulate the output. The voltage that appears on the feed-back
5
www.power.com
Rev. I 02/15
LNK603-606/613-616
Input Stage
R1
C1
Feedback
Resistors
R2
D1
D2
U1
R6
D4
RF1
S
C3
S
S
D5
D7
LinkSwitch-II
R5
FB
BP
D
C7
C4
Bypass
Capacitor
D3
C5
C8
D3
Bypass Supply
Components
R9
Preload
Resistor
Spark
Gap
AC
Input
Figure 6.
C6
R4
S
R1
R8
T1
C2
R3
L2
Output Filter
Output
Capacitors
Diode Snubber
Primary Clamp
DC
Output
PI-5110-012315
PCB Layout Example Showing 5.1 W Design using P Package.
winding is a reflection of the secondary winding voltage while the
internal MOSFET is off. Therefore any leakage inductance induced
ringing can affect output regulation. Optimizing the drain clamp to
minimize the high frequency ringing will give the best regulation.
Figure 7 shows the desired drain voltage waveform compared to
Figure 8 with a large undershoot due to the leakage inductance
induced ring. This will reduce the output voltage regulation performance. To reduce this adjust the value of the resistor in series with
the clamp diode.
Addition of a Bias Circuit for Higher Light Load Efficiency and
Lower No-load Input Power Consumption.
The addition of a bias circuit can decrease the no-load input power
from ~200 mW down to less than 30 mW at 230 VAC input. Light
load efficiency also increases which may avoid the need to use a
Schottky barrier vs PN junction output diode while still meeting
average efficiency requirements.
The power supply schematic shown in Figure 5 has the bias circuit
incorporated. Diode D6, C5 and R4 form the bias circuit. As the
output voltage is less than 8 V, an additional transformer winding is
needed, AC stacked on top of the feedback winding. This provides a
high enough voltage to supply the BYPASS pin even during low
switching frequency operation at no-load.
In Figure 5 the additional bias winding (from pin 2 to pin 1) is stacked
on top of the feedback winding (pin 4 to pin 2). Diode D6 rectifies
the output and C5 is the filter capacitor. A 10 uF capacitor is
recommended to hold up the bias voltage at low switching frequencies.
The capacitor type is not critical but the voltage rating should be
above the maximum value of VBIAS. The recommended current into
the BYPASS pin is equal to IC supply current (~0.5 mA) at the
minimum bias winding voltage. The BYPASS pin current should not
exceed 3 mA at the maximum bias winding voltage. The value of R4 is
calculated according to (VBIAS – VBP)/IS2, where VBIAS (10 V typ.) is the
voltage across C5, IS2 (0.5 mA typ.) is the IC supply current and VBP
(6.0 V typ.) is the BYPASS pin voltage. The parameters IS2 and VBP are
provided in the parameter table of the LinkSwitch-II data sheet. Diode
D6 can be any low cost diode such as FR102, 1N4148 or BAV19/20/21.
Quick Design Checklist
As with any power supply design, all LinkSwitch-II designs should be
verified on the bench to make sure that component specifications are
not exceeded under worst-case conditions. The following minimum
set of tests is strongly recommended:
1. Maximum drain voltage – Verify that peak VDS does not exceed 680 V
at the highest input voltage and maximum output power.
2. Maximum drain current – At maximum ambient temperature,
maximum input voltage and maximum output load, verify drain
current waveforms at start-up for any signs of transformer
saturation and excessive leading edge current spikes. LinkSwitch-II
has a leading edge blanking time of 170 ns to prevent premature
termination of the ON-cycle.
3. Thermal check – At maximum output power, both minimum and
maximum input voltage and maximum ambient temperature;
verify that temperature specifications are not exceeded for
LinkSwitch-II, transformer, output diodes and output capacitors.
Enough thermal margin should be allowed for part-to-part
variation of the RDS(ON) of LinkSwitch-II, as specified in the data
sheet. To assure 10% CC tolerance a maximum SOURCE pin
temperature of 90 ºC is recommended.
Design Tools
Up-to-date information on design tools can be found at the Power
Integrations web site: www.power.com
6
Rev. I 02/15
www.power.com
PI-5093-012315
PI-5094-012315
LNK603-606/613-616
An overshoot
is acceptable
Negative ring may
increase output
ripple and/or
degrade output
regulation
Figure 7. Desired Drain Voltage Waveform with Minimal Leakage
Ringing Undershoot.
Figure 8. Undesirable Drain Voltage Waveform with Large Leakage
Ring Undershoot.
L1
1 mH
D1
1N4007
5
C3
820 pF
1 kV 3
R2
470 kΩ
D2
1N4007
RF1
8.2 Ω
2W
C1
4.7 µF
400 V
10
8
D4
1N4007
D5
1N4007
C2
4.7 µF
400 V
LinkSwitch-II
U1
LNK613DG
1 kΩ
DC
Output
2
4
NC
D3
1N4007
D7
SL13
C7
470 µF
10 V
R3
300 Ω
AC
Input
TI
EE13
D
R5
13 kΩ
1%
FB
BP
S
C4
1 µF
50 V
R6
9.31 kΩ
1%
PI-5116-012315
Figure 9. LinkSwitch-II Flyback Power Supply without Bias Supply.
7
www.power.com
Rev. I 02/15
LNK603-606/613-616
Absolute Maximum Ratings(1,4)
DRAIN Voltage .........................................................-0.3 V to 700 V
DRAIN Peak Current: LNK603/613............................... 320 (480) mA4
LNK604/614............................400 (600) mA4
LNK605/615............................504 (750) mA4
LNK606/616............................654 (980) mA4
Peak Negative Pulsed Drain Current ....................................-100 mA2
FEEDBACK Pin Voltage.................................................. -0.3 V to 9 V
FEEDBACK Pin Current .........................................................100 mA
BYPASS Pin Voltage....................................................... -0.3 V to 9 V
BYPASS Pin Current................................................................10 mA
Storage Temperature .................................................-65 °C to 150 °C
Operating Junction Temperature...............................-40 °C to 150 °C
Lead Temperature(3) .................................................................260 °C
Notes:
1. All voltages referenced to SOURCE, TA = 25 °C.
2. Duration not to exceed 2 ms.
3. 1/16 in. from case for 5 seconds.
4. The higher peak DRAIN current is allowed while the DRAIN voltage is simultaneously less than 400 V.
5. Maximum ratings specified may be applied, one at a time without causing permanent damage to the product. Exposure to Absolute Maximum ratings for extended
periods of time may affect product reliability.
Thermal Resistance
Thermal Resistance: P or G Package:
(qJA) ......................................... 70 °C/W2; 60 °C/W3
(qJC)1 ....................................................... 11 °C/W
D Package:
(qJA).......................................100 °C/W2; 80 °C/W3
(qJC)1........................................................ 30 °C/W
Parameter
Symbol
Notes:
1. Measured on pin 8 (SOURCE) close to plastic interface.
2. Soldered to 0.36 sq. in. (232 mm2), 2 oz. (610 g/m2) copper clad.
3. Soldered to 1 sq. in. (645 mm2), 2 oz. (610 g/m2) copper clad.
Conditions
SOURCE = 0 V; TJ = 0 to 100 °C
(Unless Otherwise Specified)
Min
Typ
Max
LNK603/6
59
66
73
LNK613/6
58
65
72
Units
Control Functions
TJ = 25 °C, VFB = VFBth
tON × IFB = 2 mA-ms
See Notes A, G
Output Frequency
fOSC
Frequency Ratio
(Constant Current)
fRATIO(CC)
TJ = 25 °C
Between VFB = 1.0 V and VFB = 1.6 V
1.59
1.635
1.68
Frequency Ratio
(Inductance Correction)
fRATIO(IC)
Between tON × IFB = 1.6 mA × ms
and tON × IFB = 2 mA × ms
1.160
1.215
1.265
Peak-Peak Jitter Compared to
Average Frequency, TJ = 25 °C
Frequency Jitter
Ratio of Output Frequency at Auto-Restart
fOSC(AR)
TJ = 25 °C
Relative to fOSC
Maximum Duty Cycle
DCMAX
See Notes D, E
FEEDBACK Pin Voltage
VFBth
FEEDBACK Pin Voltage
Temperature Coefficient
TC VFB
FEEDBACK Pin Voltage
at Turn-OFF Threshold
VFB(AR)
Cable Compensation
Factor
υFB
TJ = 25 °C
CBP = 10 mF
See Note F
±7
12
16.5
%
21
55
LNK603/604P
1.815
1.840
1.855
1.880
1.905
LNK605P, LNK605D
1.835
1.860
1.885
LNK606P/G/D
1.775
1.800
1.825
LNK613/614P
1.935
1.960
1.985
LNK613/614/615D
1.975
2.000
2.025
LNK615P
1.975
2.000
2.025
LNK616P/G/D
1.935
1.960
1.985
1.865
-0.01
LNK613
0.72
CBP = 1 mF
1.035
CBP = 10 mF
1.055
%
%
LNK603/604D
0.65
kHz
V
%/°C
0.79
V
8
Rev. I 02/15
www.power.com
LNK603-606/613-616
Parameter
Symbol
Conditions
SOURCE = 0 V; TJ = 0 to 100 °C
(Unless Otherwise Specified)
Min
Typ
Max
Units
Control Functions
CBP = 1 mF
1.045
CBP = 10 mF
1.065
CBP = 1 mF
1.05
CBP = 10 mF
1.07
CBP = 1 mF
1.06
CBP = 10 mF
1.09
IFB = -500 mA
4
LNK614
Cable Compensation
Factor
υFB
LNK615
LNK616
Switch ON-Time
tON
Minimum Switch
ON-Time
tON(min)
FEEDBACK Pin
Sampling Delay
tFB
IS1
DRAIN Supply
Current
BYPASS Pin
Charge Current
IS2
ICH1
ICH2
fOSC = 66 kHz
VFB = VFBth
See Note E
IFB = -1 mA
2
IFB = -1.5 mA
1.33
IFB = -2 mA
1
See Note E
700
2.35
FB Voltage = VFBth -0.1,
Switch ON-Time = tON
(MOSFET Switching at fOSC)
VBP = 4 V
ns
2.55
2.75
280
330
LNK6X3/4
440
520
LNK6X5
480
560
LNK6X6
520
600
FB Voltage > VFBth
VBP = 0 V
ms
LNK6X3/4
-5.0
-3.4
-1.8
LNK6X5/6
-7.0
-4.8
-2.5
LNK6X3/4
-4.0
-2.3
-1.0
LNK6X5/6
-5.6
-3.2
-1.4
ms
mA
mA
BYPASS Pin Voltage
VBP
5.65
6.00
6.25
V
BYPASS Pin
Voltage Hysteresis
VBPH
0.70
1.00
1.20
V
VSHUNT
6.2
6.5
6.8
V
LNK6X3
di/dt = 50 mA/ms , TJ = 25 °C
186
200
214
LNK6X4
di/dt = 60 mA/ms , TJ = 25 °C
233
250
267
LNK6X5
di/dt = 70 mA/ms , TJ = 25 °C
293
315
337
LNK6X6
di/dt = 100 mA/ms , TJ = 25 °C
382
410
438
1.025
BYPASS Pin
Shunt Voltage
Circuit Protection
Current Limit
ILIMIT
mA
Normalized Output
Current
IO
TJ = 25 °C
See Figure 20, See Note F
0.975
1.000
Leading Edge
Blanking Time
tLEB
TJ = 25 °C
See Note E
170
215
Thermal Shutdown
Temperature
TSD
135
142
ns
150
°C
9
www.power.com
Rev. I 02/15
LNK603-606/613-616
Parameter
Symbol
Conditions
SOURCE = 0 V; TJ = 0 to 100 °C
(Unless Otherwise Specified)
Min
Typ
Max
Units
Circuit Protection
Thermal Shutdown
Hysteresis
TSDH
60
°C
Output
LNK6X3
ID = 50 mA
ON-State
Resistance
LNK6X4
ID = 50 mA
RDS(ON)
LNK6X5
ID = 62 mA
LNK6X6
ID = 82 mA
OFF-State
Leakage
Breakdown
Voltage
IDSS1
IDSS2
BVDSS
TJ = 25 °C
24
28
TJ = 100 °C
36
42
TJ = 25 °C
24
28
TJ = 100 °C
36
42
TJ = 25 °C
16
19
TJ = 100 °C
24
28
TJ = 25 °C
9.6
11
TJ = 100 °C
14
17
VDS = 560 V, See Figure 20
t AR-ON
Auto-Restart OFF-Time
t AR-OFF
Open-Loop FEEDBACK
Pin Current Threshold
IOL
Open-Loop ON-Time
mA
VDS = 375 V, See Figure 20
15
TJ = 50 °C
DRAIN Supply
Voltage
Auto-Restart
ON-Time
50
TJ = 125 °C, See Note C
TJ = 25 °C
See Figure 20
tON × IFB = 2 mA-ms, fOSC = 12 kHz
VFB = 0
See Notes A, E
W
700
V
50
V
450
1.2
ms
2
s
See Note E
-120
mA
See Note E
90
ms
NOTES:
A. Auto-restart ON-time is a function of switching frequency programmed by ton× IFB and minimum frequency in CC mode.
B. The current limit threshold is compensated to cancel the effect of current limit delay. As a result the output current stays constant across
the input line range.
C. IDSS1 is the worst-case OFF-state leakage specification at 80% of BVDSS and maximum operating junction temperature. IDSS2 is a typical
specification under worst-case application conditions (rectified 265 VAC) for no-load consumption calculations.
D. When the duty-cycle exceeds DCMAX the LinkSwitch-II operates in on-time extension mode.
E. This parameter is derived from characterization.
F. Mechanical stress induced during the assembly may cause shift in this parameter. This shift has no impact on the ability of LinkSwitch-II
to meet CC = ±10% and CV = ±5% in mass production given the design follows recommendation in AN-44 and good manufacturing practice.
G. The switching frequency is programmable between 60 kHz and 85 kHz.
10
Rev. I 02/15
www.power.com
LNK603-606/613-616
Typical Performance Characteristics
0.800
0.600
0.400
0.200
0.000
-40
-15
10
35
60
85
1.000
0.800
0.600
0.400
0.200
0.000
-40
110 135
PI-5086-012315
1.000
1.200
Frequency
(Normalized to 25 °C)
PI-5085-012315
Current Limit
(Normalized to 25 °C)
1.200
-15
Temperature (°C)
1.000
0.800
0.600
0.400
0.200
10
35
60
85
0.800
0.600
0.400
0.200
-15
0.800
0.600
0.400
0.200
35
60
85
Temperature (°C)
Figure 14. Feedback Voltage vs. Temperature.
35
60
85
110 135
110 135
Figure 13. Frequency Ratio vs. Temperature (Inductor Current).
PI-5090-012315
1.200
Normalized Output Current
(Normalized to 25 °C)
1.000
10
Temperature (°C)
PI-5089-012315
Feedback Voltage
(Normalized to 25 °C)
1.200
10
110 135
1.000
0.000
-40
110 135
Figure 12. Frequency Ratio vs. Temperature (Constant Current).
-15
85
1.200
Temperature (°C)
0.000
-40
60
PI-5088-012315
PI-5087-012315
Frequency Ratio
(Normalized to 25 °C)
1.200
-15
35
Figure 11. Output Frequency vs. Temperature.
Frequency Ratio
(Normalized to 25 °C)
Figure 10. Current Limit vs. Temperature.
0.000
-40
10
Temperature (°C)
1.000
0.800
0.600
0.400
0.200
0.000
-40
-15
10
35
60
85
110 135
Temperature (°C)
Figure 15. Normalized Output Current vs. Temperature.
11
www.power.com
Rev. I 02/15
LNK603-606/613-616
Typical Performance Characteristics (cont.)
1.0
TCASE = 25 °C
TCASE = 100 °C
250
200
150
100
Scaling Factors:
LNK6x3
1.0
LNK6x4
1.0
LNK6x5
1.5
LNK6x6
2.5
50
0
25
50
0
75 100 125 150
0
Junction Temperature (°C)
6
8
10
Figure 17. Output Characteristic.
50
PI-5083-012315
1000
100
40
Power (mW)
Drain Capacitance (pF)
4
DRAIN Voltage (V)
Figure 16. Breakdown vs. Temperature.
Scaling Factors:
LNK6x3
1.0
LNK6x4
1.0
LNK6x5
1.5
LNK6x6
2.5
10
2
PI-5084-012315
0.9
-50 -25
PI-5082-012315
300
Drain Current (mA)
PI-2213-012315
Breakdown Voltage
(Normalized to 25 °C)
1.1
Scaling Factors:
LNK6x3
1.0
LNK6x4
1.0
LNK6x5
1.5
LNK6x6
2.5
30
20
10
0
1
0
100
200
300
400
Drain Voltage (V)
Figure 18. COSS vs. Drain Voltage.
500
600
0
200
400
600
DRAIN Voltage (V)
Figure 19. Drain Capacitance Power.
12
Rev. I 02/15
www.power.com
LNK603-606/613-616
LinkSwitch-II
5 µF
50 kΩ
1 µF
10 kΩ
16 V
S
BP/M
S
D
S
.1 µF
4 kΩ
VIN
FB
S1
S
S2
+
Curve
Tracer
To measure BVDSS, IDSS1, and IDSS2 follow these steps:
1) Close S1, open S2.
2) Power-up VIN source (16 V).
3) Open S1, close S2.
4) Measure I/V characteristics of DRAIN pin using the curve tracer.
PI-4962-012915
Figure 20. Test Set-up for Leakage and Breakdown Tests.
680 µF
200 V
470 pF
3.3 V
RO
+
VO
200 Ω
11.5 kΩ
+ 50 V
LinkSwitch-II
FB
S
BP
S
S
10 µF
D
1)
2)
3)
4)
7.15 kΩ
S
The transformer inductance is chosen to set the value of tON × IFB to 2 mA × µS.
RO is chosen to operate test circuit in the CC region.
VO is measured.
Output current is VO / RO.
PI-4963-012315
Figure 21. Test Set-up for Output Current Measurements.
13
www.power.com
Rev. I 02/15
LNK603-606/613-616
PDIP-8C (P Package)
-E-
⊕ D S .004 (.10)
.240 (6.10)
.260 (6.60)
Pin 1
-D-
.367 (9.32)
.387 (9.83)
.057 (1.45)
.068 (1.73)
(NOTE 6)
.125 (3.18)
.145 (3.68)
-T-
Notes:
1. Package dimensions conform to JEDEC specification
MS-001-AB (Issue B 7/85) for standard dual-in-line (DIP)
package with .300 inch row spacing.
2. Controlling dimensions are inches. Millimeter sizes are
shown in parentheses.
3. Dimensions shown do not include mold flash or other
protrusions. Mold flash or protrusions shall not exceed
.006 (.15) on any side.
4. Pin locations start with Pin 1, and continue counter-clockwise to Pin 8 when viewed from the top. The notch and/or
dimple are aids in locating Pin 1. Pin 3 is omitted.
5. Minimum metal to metal spacing at the package body for
the omitted lead location is .137 inch (3.48 mm).
6. Lead width measured at package body.
7. Lead spacing measured with the leads constrained to be
perpendicular to plane T.
.015 (.38)
MINIMUM
SEATING
PLANE
.120 (3.05)
.140 (3.56)
.100 (2.54) BSC
.014 (.36)
.022 (.56)
.048 (1.22)
.053 (1.35)
⊕T
.137 (3.48)
MINIMUM
E D S .010 (.25) M
.008 (.20)
.015 (.38)
.300 (7.62) BSC
(NOTE 7)
.300 (7.62)
.390 (9.91)
P08C
PI-3933-012315
14
Rev. I 02/15
www.power.com
LNK603-606/613-616
SMD-8C (G Package)
⊕ D S .004 (.10)
.046 .060 .060 .046
-E-
.080
.086
.240 (6.10)
.260 (6.60)
Pin 1
.137 (3.48)
MINIMUM
Solder Pad Dimensions
.420
.367 (9.32)
.387 (9.83)
.057 (1.45)
.068 (1.73)
(NOTE 5)
.125 (3.18)
.145 (3.68)
.032 (.81)
.037 (.94)
.286
Pin 1
.100 (2.54) (BSC)
-D-
.186
.372 (9.45)
.388 (9.86)
⊕ E S .010 (.25)
Notes:
1. Controlling dimensions are
inches. Millimeter sizes are
shown in parentheses.
2. Dimensions shown do not
include mold flash or other
protrusions. Mold flash or
protrusions shall not exceed
.006 (.15) on any side.
3. Pin locations start with Pin 1,
and continue counter-clockwise to Pin 8 when viewed
from the top. Pin 3 is omitted.
4. Minimum metal to metal
spacing at the package body
for the omitted lead location
is .137 inch (3.48 mm).
5. Lead width measured at
package body.
6. D and E are referenced
datums on the package
body.
.048 (1.22)
.053 (1.35)
.004 (.10)
.009 (.23)
.004 (.10)
.012 (.30)
.036 (0.91)
.044 (1.12)
0 °- 8°
G08C
PI-4015-012315
15
www.power.com
Rev. I 02/15
LNK603-606/613-616
SO-8C (D Package)
4
B
0.10 (0.004) C A-B 2X
2
DETAIL A
4.90 (0.193) BSC
A
4
8
D
5
2 3.90 (0.154) BSC
GAUGE
PLANE
SEATING
PLANE
6.00 (0.236) BSC
o
0-8
C
1.04 (0.041) REF
2X
0.10 (0.004) C D
1
Pin 1 ID
4
0.40 (0.016)
1.27 (0.050)
0.20 (0.008) C
2X
7X 0.31 - 0.51 (0.012 - 0.020)
0.25 (0.010) M C A-B D
1.27 (0.050) BSC
1.35 (0.053)
1.75 (0.069)
0.25 (0.010)
BSC
1.25 - 1.65
(0.049 - 0.065)
DETAIL A
0.10 (0.004)
0.25 (0.010)
0.10 (0.004) C
H
7X
SEATING PLANE
0.17 (0.007)
0.25 (0.010)
C
Reference
Solder Pad
Dimensions
+
2.00 (0.079)
+
D07C
4.90 (0.193)
+
+
1.27 (0.050)
Notes:
1. JEDEC reference: MS-012.
2. Package outline exclusive of mold flash and metal burr.
3. Package outline inclusive of plating thickness.
4. Datums A and B to be determined at datum plane H.
5. Controlling dimensions are in millimeters. Inch dimensions
are shown in parenthesis. Angles in degrees.
0.60 (0.024)
PI-4526-012315
Part Ordering Information
• LinkSwitch Product Family
• II Series Number
• Package Identifier
G
Plastic Surface Mount DIP
P
Plastic DIP
D
Plastic SO-8
• Package Material
G
GREEN: Halogen Free and RoHS Compliant
• Tape & Reel and Other Options
Blank
LNK 615 D G - TL
TL
Standard Configurations
Tape & Reel, 1 k pcs minimum for G Package. 2.5 k pcs for D Package. Not
available for P Package.
16
Rev. I 02/15
www.power.com
LNK603-606/613-616
Revision
Notes
Date
C
Final data sheet.
06/08
D
Auto-restart time modified PCN-09131.
03/09
E
Introduced Max Current Limit when V DRAIN is below 400 V.
07/09
F
Added LNK616DG and LNK606DG.
01/10
G
Updated Note 6 in Parameter Table.
02/10
H
Updated due to DM process change.
05/13
H
Specified Max BYPASS Pin Current.
03/14
I
Figure removed “Test Set-up for FEEDBACK Pin Measurements” from previous version. Updated to latest Brand Style.
02/15
17
www.power.com
Rev. I 02/15
For the latest updates, visit our website: www.power.com
Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. Power Integrations
does not assume any liability arising from the use of any device or circuit described herein. POWER INTEGRATIONS MAKES NO WARRANTY
HEREIN AND SPECIFICALLY DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD PARTY RIGHTS.
Patent Information
The products and applications illustrated herein (including transformer construction and circuits external to the products) may be covered by one
or more U.S. and foreign patents, or potentially by pending U.S. and foreign patent applications assigned to Power Integrations. A complete list of
Power Integrations patents may be found at www.power.com. Power Integrations grants its customers a license under certain patent rights as set
forth at http://www.power.com/ip.htm.
Life Support Policy
POWER INTEGRATIONS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS
WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF POWER INTEGRATIONS. As used herein:
1. A Life support device or system is one which, (i) is intended for surgical implant into the body, or (ii) supports or sustains life, and (iii) whose
failure to perform, when properly used in accordance with instructions for use, can be reasonably expected to result in significant injury or
death to the user.
2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the
failure of the life support device or system, or to affect its safety or effectiveness.
The PI logo, TOPSwitch, TinySwitch, LinkSwitch, LYTSwitch, InnoSwitch, DPA-Switch, PeakSwitch, CAPZero, SENZero, LinkZero, HiperPFS,
HiperTFS, HiperLCS, Qspeed, EcoSmart, Clampless, E-Shield, Filterfuse, FluxLink, StakFET, PI Expert and PI FACTS are trademarks of Power
Integrations, Inc. Other trademarks are property of their respective companies. ©2015, Power Integrations, Inc.
Power Integrations Worldwide Sales Support Locations
World Headquarters
5245 Hellyer Avenue
San Jose, CA 95138, USA.
Main: +1-408-414-9200
Customer Service:
Phone: +1-408-414-9665
Fax: +1-408-414-9765
e-mail: [email protected]
China (Shanghai)
Rm 2410, Charity Plaza, No. 88
North Caoxi Road
Shanghai, PRC 200030
Phone: +86-21-6354-6323
Fax: +86-21-6354-6325
e-mail: [email protected]
China (Shenzhen)
17/F, Hivac Building, No. 2, Keji Nan
8th Road, Nanshan District,
Shenzhen, China, 518057
Phone: +86-755-8672-8689
Fax: +86-755-8672-8690
e-mail: [email protected]
Germany
Lindwurmstrasse 114
80337 Munich
Germany
Phone: +49-895-527-39110
Fax: +49-895-527-39200
e-mail: [email protected]
India
#1, 14th Main Road
Vasanthanagar
Bangalore-560052 India
Phone: +91-80-4113-8020
Fax: +91-80-4113-8023
e-mail: [email protected]
Italy
Via Milanese 20, 3rd. Fl.
20099 Sesto San Giovanni (MI)
Italy
Phone: +39-024-550-8701
Fax: +39-028-928-6009
e-mail: [email protected]
Japan
Kosei Dai-3 Bldg.
2-12-11, Shin-Yokohama,
Kohoku-ku
Yokohama-shi Kanagwan
222-0033 Japan
Phone: +81-45-471-1021
Fax: +81-45-471-3717
e-mail: [email protected]
Taiwan
5F, No. 318, Nei Hu Rd., Sec. 1
Nei Hu Dist.
Taipei 11493, Taiwan R.O.C.
Phone: +886-2-2659-4570
Fax: +886-2-2659-4550
e-mail: [email protected]
UK
First Floor, Unit 15, Meadway Court,
Korea
Rutherford Close,
RM 602, 6FL
Stevenage, Herts. SG1 2EF
Korea City Air Terminal B/D, 159-6 United Kingdom
Samsung-Dong, Kangnam-Gu,
Phone: +44 (0) 1252-730-141
Seoul, 135-728, Korea
Fax: +44 (0) 1252-727-689
Phone: +82-2-2016-6610
e-mail: [email protected]
Fax: +82-2-2016-6630
e-mail: [email protected]
Singapore
51 Newton Road
#19-01/05 Goldhill Plaza
Singapore, 308900
Phone: +65-6358-2160
Fax: +65-6358-2015
e-mail: [email protected]