HD74LVC3G04 Triple Inverters REJ03D0025–0300Z Rev.3.00 Jul. 01, 2004 Description The HD74LVC3G04 has triple inverters in an 8-pin package. Low voltage and high-speed operation is suitable for the battery powered products (e.g., notebook computers), and the low power consumption extends the battery life. Features • The basic gate function is lined up as renesas uni logic series. • Supply voltage range: 1.65 to 5.5 V Operating temperature range: –40 to +85°C • All inputs: VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V) All outputs: VO (Max.) = 5.5 V (@VCC = 0 V) • Output current: ±4 mA (@VCC = 1.65 V) ±8 mA (@VCC = 2.3 V) ±24 mA (@VCC = 3.0 V) ±32 mA (@VCC = 4.5 V) • Ordering Information Part Name HD74LVC3G04CPE Package Type WCSP-8 pin HD74LVC3G04CLE Package Code Package Abbreviation TBS-8V CP TBS-8AV CL Taping Abbreviation (Quantity) E (3,000 pcs/reel) Article Indication Marking Year code Month code E04YM Function Table Output Y Input A H L L H H : High level L : Low level Rev.3.00 Jul. 01, 2004 page 1 of 8 HD74LVC3G04 Pin Arrangement 0.9 mm 4 5 2Y 2A 3 6 3A 3Y 2 7 1Y 1A 1 8 VCC 1.9 mm Height 0.5 mm 0.5 mm pitch 0.17 mm 8–Ball (CP) GND 0.23 mm 8–Ball (CL) Pin#1 INDEX (Bottom view) (Top view) Logic Diagram 1A 2A 3A Rev.3.00 Jul. 01, 2004 page 2 of 8 1 7 3 5 6 2 1Y 2Y 3Y HD74LVC3G04 Absolute Maximum Ratings Item Symbol Ratings Unit Supply voltage range VCC –0.5 to 6.5 V Input voltage range *1 VI –0.5 to 6.5 V VO –0.5 to VCC +0.5 V Output voltage range *1, 2 Test Conditions Output : H or L –0.5 to 6.5 VCC : OFF Input clamp current IIK –50 mA Output clamp current IOK –50 mA VO < 0 Continuous output current IO ±50 mA VO = 0 to VCC Continuous current through VCC or GND ICC or IGND ±100 mA Package Thermal impedance θja 140 °C/W 102 Storage temperature Tstg VI < 0 CP CL –65 to 150 °C Notes: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore no two of which may be realized at the same time. 1. The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. This value is limited to 5.5 V maximum. Recommended Operating Conditions Item Symbol Min Max Unit Conditions Supply voltage range VCC 1.65 5.5 V Input voltage range VI 0 5.5 V Output voltage range VO 0 VCC V Output current IOL — 4 mA — 8 VCC = 2.3 V — 16 VCC = 3.0 V — 24 — 32 VCC = 4.5 V — –4 VCC = 1.65 V — –8 VCC = 2.3 V — –16 VCC = 3.0 V — –24 — –32 0 20 0 10 VCC = 3.0 to 3.6 V 0 5 VCC = 4.5 to 5.5 V –40 85 IOH Input transition rise or fall rate Operating free-air temperature ∆t / ∆v Ta Note: Unused or floating inputs must be held high or low. Rev.3.00 Jul. 01, 2004 page 3 of 8 VCC = 1.65 V VCC = 4.5 V ns / V °C VCC = 1.65 to 1.95 V, 2.3 to 2.7 V HD74LVC3G04 Electrical Characteristics Ta = –40 to 85°C Item Input voltage Symbol VIH VIL Output voltage VOH VCC (V) Typ Max 1.65 to 1.95 VCC×0.65 — — 2.3 to 2.7 1.7 — — 3.0 to 3.6 2.0 — — 4.5 to 5.5 VCC×0.7 — — 1.65 to 1.95 — — VCC×0.35 2.3 to 2.7 — — 0.7 Unit Test condition V 3.0 to 3.6 — — 0.8 4.5 to 5.5 — — VCC×0.3 Min to Max VCC–0.1 — — 1.65 1.2 — — IOH = –4 mA 2.3 1.9 — — IOH = –8 mA 3.0 2.4 — — IOH = –16 mA 2.3 — — IOH = –24 mA 3.8 — — IOH = –32 mA 4.5 VOL Min V IOH = –100 µA Min to Max — — 0.1 IOL = 100 µA 1.65 — — 0.45 IOL = 4 mA 2.3 — — 0.3 IOL = 8 mA 3.0 — — 0.4 IOL = 16 mA — — 0.55 IOL = 24 mA 4.5 — — 0.55 Input current IIN 0 to 5.5 — — ±5 µA IOL = 32 mA VIN = 5.5 V or GND Quiescent supply current ICC 1.65 to 5.5 — — 10 µA VIN = VCC or GND, IO = 0 ∆ICC 3 to 5.5 — — 500 Output leakage current IOFF 0 — — ±10 µA VIN or VO = 0 to 5.5 V Input capacitance CIN 3.3 — 3.5 — pF VIN = VCC or GND One input at VCC–0.6 V, Other input at VCC or GND Note: For conditions shown as Min or Max, use the appr appropriate values under recommended operating conditions. Rev.3.00 Jul. 01, 2004 page 4 of 8 HD74LVC3G04 Switching Characteristics VCC = 1.8 ± 0.15 V Ta = –40 to 85°C Item Propagation delay time Symbol tPLH tPHL Min 3.2 FROM Unit Max 7.9 ns Test Conditions (Input) (Output) Y A CL = 30 pF, RL = 1.0 kΩ TO VCC = 2.5 ± 0.2 V Ta = –40 to 85°C Item Propagation delay time Symbol tPLH tPHL Min 1.5 Unit Max 4.4 ns Test Conditions CL = 30 pF, RL = 500 Ω FROM TO (Input) (Output) Y A VCC = 3.3 ± 0.3 V Ta = –40 to 85°C Item Propagation delay time Symbol Min 1.4 tPLH tPHL Unit Max 4.1 ns Test Conditions FROM TO (Input) (Output) Y A CL = 50 pF, RL = 500 Ω VCC = 5.0 ± 0.5 V Ta = –40 to 85°C Item Propagation delay time Symbol tPLH tPHL Min 1.1 Unit Max 3.2 ns Test Conditions FROM TO (Input) (Output) Y A CL = 50 pF, RL = 500 Ω Operating Characteristics Ta = 25°C Item Symbol Power dissipation capacitance CPD VCC (V) Min Typ Max 1.8 — 16 — 2.5 — 16 — 3.3 — 16 — 5.0 — 18 — Unit pF Test Circuit Measurement point From Output CL * RL Note: CL includes probe and jig capacitance. Rev.3.00 Jul. 01, 2004 page 5 of 8 Test Conditions f = 10 MHz HD74LVC3G04 • Waveforms tr tf 90% Input VCC 90% Vref Vref 10% 10% GND VOH Vref Output Vref VOL t PHL t PLH INPUTS VCC (V) Vref CL RL ≤ 2 ns VCC / 2 30 pF 1.0 kΩ ≤ 2 ns VCC / 2 30 pF 500 Ω 3 V ≤ 2.5 ns 1.5 V 50 pF 500 Ω VCC ≤ 2.5 ns VCC / 2 50 pF 500 Ω VI tr / tf 1.8±0.15 VCC 2.5±0.2 VCC 3.3±0.3 5.0±0.5 Notes: 1. Input waveform: PRR ≤ 10 MHz, Zo = 50 Ω. 2. The output are measured one at a time with one transition per measurement. Rev.3.00 Jul. 01, 2004 page 6 of 8 HD74LVC3G04 Package Dimensions TBS-8V EIAJ Package Code Mass (g) 0.0014 JEDEC Code Lead Material D e ZD ZE D C E B e B A Pin #1 index area 1 2 A // y1 C 8 × φb φx M C A B φx M C C Rev.3.00 Jul. 01, 2004 page 7 of 8 A A2 y C A1 Seating plane Symbol A A1 A2 b D E e x y y1 ZD ZE Dimension in Millimeters Min Typ Max 0.50 0.10 0.15 0.35 0.19 0.15 0.17 0.90 1.90 0.50 0.05 0.05 0.20 0.20 0.20 HD74LVC3G04 TBS-8AV EIAJ Package Code Mass (g) 0.0015 JEDEC Code Lead Material D e ZD ZE D C E B e B A Pin #1 index area 1 2 A // y1 C 8 × φb φx M C A B φx M C C *Reference value. Rev.3.00 Jul. 01, 2004 page 8 of 8 A A2 y C A1 Seating plane Symbol A A1 A2 b D E e x y y1 ZD ZE Dimension in Millimeters Min Nom Max 0.50 0.155 0.185 (0.315)* 0.20 0.25 0.90 1.90 0.50 0.05 0.05 0.20 0.20 0.20 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. 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