MAXIM MAX34406HETG+

19-5930; Rev 0; 6/11
EVALUATION KIT AVAILABLE
MAX34406
Quad Current-Sense Amplifier
with Overcurrent Threshold Comparators
General Description
The MAX34406 is a quad, high-side, unidirectional, current-sense amplifier that offers precision accuracy. It
provides analog outputs for each of the four amplifiers
that can be routed to an external ADC, and contains four
overcurrent comparators with a fixed 1.0V threshold. All
four comparators are logically ORed, and the result can
be delayed/filtered with an external capacitor before it is
fed to a latched common shutdown open-drain output pin.
Applications
Network Switches/Routers
Features
SFour Precision Current-Sense Amplifiers
SFixed Gains of 25V/V, 50V/V, 100V/V, and 200V/V
SLess Than ±600µV of Input Offset
SLess Than ±0.6% of Gain Error (T/F/H) or ±0.8% of
Gain Error (W)
SWide 2.0V to 28V Common Mode Range
SAnalog Voltage Outputs for Each Amplifier
SIndependent Overcurrent Comparators with Fixed
1.0V Threshold
SLow Power Consumption
Base Stations
S-40NC to +85NC Temperature Range
Servers
SSmall 24-Pin TQFN (4mm x 4mm) Package
Smart Grid Network Systems
Ordering Information appears at end of data sheet.
Industrial Controls
Block Diagram
VDD
AMPLIFIER 4
ENA
POR
AMPLIFIER 3
AMPLIFIER 2
AMPLIFIER 1
INx+
INx-
4
4
MAX34406
OR
R1
R1
P
OR
CLR
ROUT
N
CK
N
1.0V
REFERENCE
4
OUTx
GND
SHTDN
D
5µA
6V
CLAMP
Q
N
LATCH THRESHOLD = VDD x 50%
4
OCx
CDLY
For related parts and recommended products to use with this part, refer to: www.maxim-ic.com/MAX34406.related
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For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
MAX34406
Quad Current-Sense Amplifier
with Overcurrent Threshold Comparators
ABSOLUTE MAXIMUM RATINGS
Voltage Range on INx+ and INxRelative to GND..................................................-0.3V to +30V
Voltage Range on VDD Relative to GND..................-0.3V to +6V
Voltage Range on Remaining Pins
Relative to GND..................................... -0.3V to (VDD + 0.3V)
Continuous Power Dissipation (TA = +70NC)
TQFN (derate 27.8mW/NC above +70NC)...............2222.2mW
OUT1, OUT2, OUT3, OUT4 Short Circuit to GND.....Continuous
Operating Junction Temperature Range............ -40NC to +85NC
Storage Temperature Range............................. -55NC to +125NC
Lead Temperature (soldering, 10s).................................+300NC
Soldering Temperature (reflow).......................................+260NC
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VINx+ = VINx- = 12V, VSENSE = 0V, TA = -40NC to +85NC, unless otherwise noted. Typical values are TA = +25NC) (Note 1)
PARAMETER
VDD Operating Range
SYMBOL
CONDITIONS
VDD
MIN
2.7
VDD Supply Current
IDD
(Note 2)
Common-Mode Input Range
VCM
Guaranteed by CMRR
2.0
VINx+ > 2.0V at TA = +25NC
86
Common-Mode Rejection Ratio
Input Offset Voltage
CMRR
VOS
(Note 3)
Gain Error
G
GE
OUTx Output Resistance
OUTx Low Voltage
ROUTx
VOL
50
MAX34406H
100
MAX34406W
200
MAX34406W
MAX34406T/F/H
MAX34406W
V
200
FA
28
V
dB
Q600
10
(Note 5)
15
MAX34406F
30
MAX34406H
60
MAX34406H
%
kω
20
MAX34406T
MAX34406F
FV
V/V
Q0.8
mV
120
MAX34406T
BW
5.5
Q0.6
(Note 4)
MAX34406W
Bandwidth
UNITS
25
MAX34406F
MAX34406T/F/H
MAX
120
Q100
MAX34406T
Gain (0.5V < VOUTx < 1.5V)
TYP
125
60
VOUTx = 2.0V
(Note 5)
kHz
30
MAX34406W
15
ENA Input Logic-High
VIH
VDD x
0.7
VDD +
0.3
V
ENA Input Logic-Low
VIL
VGND 0.3
VDD x
0.3
V
Q1
FA
0.3
V
ENA Input Leakage
Output Logic-Low (SHTDN, OCx)
VOL
IOL = 2mA
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MAX34406
Quad Current-Sense Amplifier
with Overcurrent Threshold Comparators
ELECTRICAL CHARACTERISTICS (continued)
(VINx+ = VINx- = 12V, VSENSE = 0V, TA = -40NC to +85NC, unless otherwise noted. Typical values are TA = +25NC) (Note 1)x
PARAMETER
SYMBOL
Output Leakage (SHTDN, OCx)
CONDITIONS
MIN
TYP
IO
Comparator Threshold
VTH
0.98
1.00
MAX
UNITS
Q1
FA
1.02
V
Q5
mV
Comparator Offset
VCOS
Comparator Hysteresis
VHYS
20
mV
tD
3
Fs
Comparator Propagation Delay
SHTDN Delay
Overdrive = Q50mV, output load = 2mA
tDLY
VDD = 3.3V, CCDLY = 10nF,
RBLEED = 10Mω
3.3
VDD = 3.3V, CCDLY = 22nF,
RBLEED = 10Mω
7.3
VDD = 3.3V, CCDLY = 33nF,
RBLEED = 10Mω
11
VDD = 5.0V, CCDLY = 10nF,
RBLEED = 10Mω
5
VDD = 5.0V, CCDLY = 22nF,
RBLEED = 10Mω
11
VDD = 5.0V, CCDLY = 33nF,
RBLEED = 10Mω
16
ms
All devices are 100% production tested at TA= +25NC. All temperature limits are guaranteed by design.
VOUT1, VOUT2, VOUT3, VOUT4 = 0V. All open-drain outputs left disconnected.
VOS is extrapolated from measurements for the gain-error test.
Gain error is calculated by applying two values of VSENSE and calculating the error of the slope vs. the ideal: Gain = 100,
VSENSE is 5mV and 15mV.
Note 5: The device is stable for any external capacitance value.
Note
Note
Note
Note
1:
2:
3:
4:
Typical Operating Characteristics
(VINx+ = VINx- = 12V, TA = +25°C, unless otherwise noted.)
14
12
10
8
6
4
140
120
VOLTAGE (mV)
20
% OF POPULATION (%)
16
160
MAX34406 toc02
MAX34406 toc01
18
% OF POPULATION (%)
VOL vs. IOL
+25°C GAIN ERROR
25
15
10
MAX34406 toc03
+25°C INPUT OFFSET
20
OC1
100
80
60
SHTDN
40
5
20
2
0
0
0
-200 -150 -100
-50
0
OFFSET (µV)
50
100
150
-0.15 -0.10 -0.05 0 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
GAIN ERROR (%)
CURRENT IN (mA)
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MAX34406
Quad Current-Sense Amplifier
with Overcurrent Threshold Comparators
Typical Operating Characteristics (continued)
((VINx+ = VINx- = 12V, TA = +25°C, unless otherwise noted.)
INPUT OFFSET
vs. COMMON-MODE VOLTAGE
0
-10
-20
-20
-30
-40
5
10
15
20
25
0.2
0.1
-0.1
-60
30
-40
-15
10
35
60
5
0
85
10
15
20
25
COMMON-MODE VOLTAGE (V)
TEMPERATURE (°C)
COMMON-MODE VOLTAGE (V)
GAIN ERROR vs. TEMPERATURE
SMALL-SIGNAL GAIN
vs. FREQUENCY (GAIN = 100)
SMALL-SIGNAL PULSE RESPONSE
(GAIN = 100)
50
MAX34406 toc07
0.5
0.4
45
40
30
MAX34406 toc09
MAX34406 toc08
0
0.3
0
-50
-30
MAX34406 toc06
0.4
GAIN ERROR (%)
10
0.5
MAX34406 toc05
-10
INPUT OFFSET (µV)
20
INPUT OFFSET (µV)
0
MAX34406 toc04
30
10mV
5mV
VSENSE
35
0.3
GAIN (dB)
GAIN ERROR (%)
GAIN ERROR
vs. COMMON-MODE VOLTAGE
INPUT OFFSET vs. TEMPERATURE
0.2
30
1.0V
25
20
VOUTx
15
0.1
10
0.5V
5
0
-15
10
35
60
0
85
10
1
TEMPERATURE (°C)
100
LARGE-SIGNAL PULSE RESPONSE
(GAIN = 100)
COMPARATOR THRESHOLD
vs. TEMPERATURE
MAX34406 toc10
25mV
2.5V
VOUTx
3.0
1.02
1.01
1.00
0.99
0.98
0.5V
CCDLY = 10nF
3.5
SHTDN DELAY (ms)
5mV
1.03
THRESHOLD (V)
VSENSE
SHTDN DELAY vs. TEMPERATURE
4.0
MAX34406 toc11
1.05
1.04
2.5
2.0
1.5
1.0
0.97
0.5
0.96
20µs/div
20µs/div
1000
FREQUENCY (kHz)
MAX34406 toc12
-40
0.95
-40
-15
10
35
TEMPERATURE (°C)
60
85
0
-45
-15
10
35
60
85
TEMPERATURE (°C)
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MAX34406
Quad Current-Sense Amplifier
with Overcurrent Threshold Comparators
IN4-
OUT4
OUT3
IN3-
IN3+
TOP VIEW
IN4+
Pin Configuration
18
17
16
15
14
13
VDD 19
12
OC4
ENA 20
11
OC3
10
OC2
9
OC1
8
N.C.
7
N.C.
SHTDN 21
MAX34406
CDLY 22
N.C. 23
EP
+
1
2
3
4
5
6
IN1+
IN1-
OUT1
OUT2
IN2-
IN2+
GND 24
TQFN
(4mm x 4mm)
Pin Description
PIN
NAME
FUNCTION
1
IN1+
External Sense Resistor Power-Side Connection for Amplifier 1. Bias at this pin also provides the supply
voltage for amplifier 1. This pin can be left open circuit if not needed.
2
IN1-
External Sense Resistor Load-Side Connection for Amplifier 1
3
OUT1
Output Voltage from Amplifier 1 Proportional to VSENSE. This output is clamped at 6V.
4
OUT2
5
IN2-
Output Voltage from Amplifier 2 Proportional to VSENSE. This output is clamped at 6V.
External Sense Resistor Load-Side Connection for Amplifier 2
6
IN2+
External Sense Resistor Power-Side Connection for Amplifier 2. Bias at this pin also provides the supply
voltage for amplifier 2. This pin can be left open circuit if not needed.
7, 8, 23
N.C.
No Connection. Not internally connected.
9
OC1
Overcurrent Threshold Comparator Associated with Amplifier 1. Open-drain output. This output
transitions to high impedance during an overcurrent event.
10
OC2
Overcurrent Threshold Comparator Associated with Amplifier 2. Open-drain output. This output
transitions to high impedance during an overcurrent event.
11
OC3
Overcurrent Threshold Comparator Associated with Amplifier 3. Open-drain output. This output
transitions to high impedance during an overcurrent event.
12
OC4
Overcurrent Threshold Comparator Associated with Amplifier 4. Open-drain output. This output
transitions to high impedance during an overcurrent event.
13
IN3+
External Sense Resistor Power-Side Connection for Amplifier 3. Bias at this pin also provides the supply
voltage for amplifier 3. This pin can be left open circuit if not needed.
����������������������������������������������������������������� Maxim Integrated Products 5
MAX34406
Quad Current-Sense Amplifier
with Overcurrent Threshold Comparators
Pin Description (continued)
PIN
NAME
FUNCTION
14
IN3-
15
OUT3
External Sense Resistor Load-Side Connection for Amplifier 3
16
OUT4
17
IN4-
External Sense Resistor Load-Side Connection for Amplifier 4
18
IN4+
External Sense Resistor Power-Side Connection for Amplifier 4. Bias at this pin also provides the supply
voltage for amplifier 4. This pin can be left open circuit if not needed.
19
VDD
Supply Voltage for Reference, Comparators, and Logic. A +2.7V to +5.5V supply. This pin should be
decoupled to GND with a 100nF ceramic capacitor.
20
ENA
SHTDN Enable Input. CMOS digital input. Connect to GND to clear the latch and unconditionally
deassert (force low) the SHTDN output. Connect to VDD to enable normal latch operation of the SHTDN
output. ENA should be toggled low once VDD reaches nominal operating voltage.
21
SHTDN
Shutdown Output. Open-drain output. This output transitions to high impedance when any of the four
overcurrent comparator outputs (OC1 to OC4) are asserted (high impedance) as long as the ENA pin is
high. Toggling the ENA pin allows SHTDN to reset to logic-low.
Output Voltage from Amplifier 3 Proportional to VSENSE. This output is clamped at 6V.
Output Voltage from Amplifier 4 Proportional to VSENSE. This output is clamped at 6V.
22
CDLY
Shutdown Delay Capacitor. A capacitor (CCDLY) from this pin to GND delays the transition of the
SHTDN pin. The delay time can be calculated by the following formula: tDLY = CCDLY x (VDD/10FA). The
capacitor connected to CDLY is discharged when ENA is low and also upon VDD being applied (i.e., at
power-on reset). A shunt resistor, RBLEED, with a max of 22mI, is required to be connected in parallel
with the CCDLY capacitor. If the shutdown delay is not required, this pin can be left unconnected.
24
GND
Ground Reference
—
EP
Exposed Pad. Connect to ground or leave unconnected.
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MAX34406
Quad Current-Sense Amplifier
with Overcurrent Threshold Comparators
Typical Application Circuit
V1
VDD
IN1+
VDD
RSENSE1
GND
IN1ENA
VDD
V2
IN2+
RPU
RSENSE2
SHTDN
IN2-
VDD
MAX34406
V3
RPU
IN3+
OC1
RSENSE3
OC2
IN3-
µC
OC3
OC4
OUT1
V4
IN4+
OUT2
ADC
INPUTS
OUT3
OUT4
RSENSE4
IN4-
CDLY
CCDLY
RBLEED (LESS THAN 22mΩ)
����������������������������������������������������������������� Maxim Integrated Products 7
MAX34406
Quad Current-Sense Amplifier
with Overcurrent Threshold Comparators
Detailed Description
The MAX34406 quad-channel, unidirectional, high-side,
current-sense amplifier features a 2.0V to 28V input
common-mode range. This feature allows the monitoring
of current out of a voltage supply as low as 2.0V. The
device monitors current through a current-sense resistor
and amplifies the voltage across that resistor.
Current-sense amplifier output voltages (OUT1 to OUT4)
are compared to a fixed 1.0V reference; if VOUTx
exceeds 1.0V, the corresponding overcurrent warning
output (OC1 to OC4) is asserted. If the enable input
(ENA) is logic-high, SHTDN asserts when any of the four
overcurrent outputs go logic-high. Assertion of SHTDN on
overcurrent can be delayed and/or filtered by attaching
an external capacitor to CDLY. Once SHTDN is latched
high impedance, it remains so until ENA is toggled.
The unidirectional current-sense amplifiers used in each
channel of the device have a well established history. For
each channel, an op amp is used to force the current
through an internal gain resistor at IN+, which has a value
of R1, such that its voltage drop equals the voltage drop
across an external sense resistor, RSENSE. There is an
internal resistor at IN- with the same value as R1 to minimize offset voltage. The current through R1 is sourced by
a high-voltage p-channel FET. Its source current is the
same as its drain current, which flows through a second
gain resistor, ROUTx. This produces an output voltage,
VOUTx, whose magnitude is ILOAD x RSENSE x ROUTx/R1.
The gain accuracy is based on the matching of the two
gain resistors, R1 and ROUTx (Table 1). Total gain = 25V/V
for the MAX34406T, 50V/V for the MAX34406F, 100V/V
for the MAX34406H, and 200V/V for the MAX34406W.
The output is protected from input overdrive by use of a
6V clamp-protection circuit.
Table 1. Internal Gain Setting Resistors
(Typical Values)
GAIN (V/V)
R1 (I)
ROUTx (kI)
200
100
20
100
100
10
50
200
10
25
400
10
Applications Information
Choosing the Sense Resistor
Choose RSENSE based on the criteria detailed in the following sections.
Voltage Loss
A high RSENSE value causes the power-source voltage
to drop due to IR loss. For minimal voltage loss, use the
lowest RSENSE value.
OUTx Swing vs. VINx+ and VSENSE
The device is unique because the supply voltage for
the current-sense amplifier in each channel is the input
common-mode voltage for that channel (the average
voltage at INx+ and INx-). There are no separate supply
voltage pins for the current-sense amplifiers. Therefore,
the OUTx voltage swing for a given channel is limited by
the minimum voltage at IN+ for that channel.
VOUTx(MAX) = VINx+(MIN) - VSENSE(MAX) - VOH
and
R SENSE =
VOUTx (MAX)
G × ILOAD (MAX)
VSENSE full scale should be less than VOUTx/gain at the
minimum INx+ voltage. For best performance with a 3.6V
supply voltage, select RSENSE to provide approximately
120mV (gain of 25V/V), 60mV (gain of 50V/V), 30mV (gain
of 100V/V), or 15mV (gain of 200V/V) of sense voltage for
the full-scale current in each application. These can be
increased by use of a higher minimum input voltage.
Accuracy
In the linear region (VOUTx < VOUTx(MAX)), there are
two components to accuracy: input offset voltage (VOS)
and gain error (GE). For all variants of the device,
VOS = P 600FV (max); gain error is 0.6% (max) for the
MAX34406T/F/H or 0.8% (max) for the MAX34406W. Use
the linear equation to calculate total error:
 VOS 
Error (%) = GE ± 
 × 100
 VSENSE 
where GE is gain error, VSENSE is the voltage across
the sense resistor RSENSE, and VOS is offset voltage. A
high RSENSE value allows lower currents to be measured
more accurately because offsets are less significant
when the sense voltage is larger.
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MAX34406
Quad Current-Sense Amplifier
with Overcurrent Threshold Comparators
Efficiency and Power Dissipation
At high current levels, the I2R losses in RSENSE can be
significant. Take this into consideration when choosing
the resistor value and its power dissipation (wattage)
rating. Also, the sense resistor’s value might drift if it is
allowed to heat up excessively. The precision VOS of the
device allows the use of small sense resistors to reduce
power dissipation and reduce hot spots.
Kelvin Connections
Because of the high currents that flow through RSENSE,
take care to eliminate parasitic trace resistance from
causing errors in the sense voltage. Either use a fourterminal current-sense resistor or use Kelvin (force and
sense) PCB layout techniques.
Minimizing Trace Resistance
PCB trace resistance from RSENSE to the INx+ inputs
contributes to gain error in the current-sense amplifiers.
Care should be taken to minimize this resistance (shown
as RTRC in Figure 1). Total gain including error caused by
trace resistance can be calculated as follows:
G=
R OUTx
R1 + R TRC
For example, assume a gain of 100V/V, as in the
MAX34406H. From Table 1, R1 = 100I and ROUTx = 10kI.
Then every 10mI of PCB trace resistance adds -0.01%
gain error.
Optional Output Filter Capacitor
When designing a system that uses a sample-and-hold
stage in the ADC, the sampling capacitor momentarily
loads OUTx and causes a drop in the output voltage. If
sampling time is very short (less than a microsecond),
consider using a ceramic capacitor across OUTx and
GND to hold VOUTx constant during sampling. This also
decreases the small-signal bandwidth of the currentsense amplifier and reduces noise at OUTx.
Input Filters
Some applications of current-sense amplifiers need to
measure currents accurately even in the presence of
both differential and common-mode ripple, as well as a
wide variety of input transient conditions. For example,
high-frequency ripple at the output of a switching buck or
boost regulator results in a common-mode voltage at the
device’s inputs. Alternatively, the fast load-current transients, when measuring at the input of a switching buck
or boost regulator, can cause high-frequency differential
sense voltages to occur at the device’s inputs, although
the signal of interest is the average DC value. Such highfrequency differential sense voltages can result in a voltage offset at the device output.
The device allows a method of filtering to help improve
performance in the presence of input common-mode
voltage and input differential voltage transients. Figure 2
shows a differential input filter.
The capacitor CIN between INx+ and INx- along with the
resistor RIN between the sense resistor and INx- helps
filter against input differential voltages and prevents them
from reaching the device.
The corner frequency of this filter is determined by the
choice of RIN, CIN, and the value of the input resistance
at INx- (R1). See Table 1 for R1 values at the different
gain options.
The value of RIN should be chosen to minimize its effect
on the input offset voltage due to the bias current at INx-.
RSENSE
RSENSE
LOAD
RTRC
INx+
INx-
MAX34406
GND
Figure 1. Input Trace Resistance
RIN
CIN
INx+
LOAD
INx-
OUTx
MAX34406
OUTx
GND
Figure 2. Differential Input Filter
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MAX34406
Quad Current-Sense Amplifier
with Overcurrent Threshold Comparators
RIN x IBIAS contributes to the input voltage offset. IBIAS
is typically 0.2FA.
Placing RIN at the INx- input voltage does not affect the
gain error of the device because the gain is given by the
ratio between ROUTx and R1 at INx+.
Bidirectional Application
Some systems can require a precise bidirectional current-sense amplifier to accurately monitor currents.
RSENSE
GND
Choosing the Delay Capacitor
The SHTDN output asserts upon overcurrent detection
on any of the 4 channels. OC1 to OC4 are logically ORed
together; SHTDN latches the output after some delay.
SHTDN latch delay is determined by the following equation:
tDLY = CCDLY × (VDD ÷ 10µA)
Example CCDLY and tDLY pairs are given in the Electrical
Characteristics table.
ILOAD
IN1+
Measurement of the two separate outputs with respect
to GND yields an accurate measure of the bidirectional
currents (Figure 3).
IN1- IN2+ IN2-
VDD = 3.3V
MAX34406
OUT1
OUT2
µC
ADC
INPUTS
A discharge resistor, RBLEED, with a max resistance
of 22mI, should be added in parallel with CCDLY. The
delay capacitor integrates overcurrent events over time;
a parallel resistor RBLEED allows the capacitor to discharge over time, thus limiting the integration period.
Accumulated voltage from overcurrent events decay
through the bleed resistor with time constant:
τ = RBLEED × CCDLY
Additionally, discharge of accumulated voltage through
RBLEED increases the precision of the SHTDN delay
time, tDLY.
Figure 3. Bidirectional Application
PART
Ordering Information
GAIN (V/V)
TEMP RANGE
PIN-PACKAGE
MAX34406TETG+*
25
-40NC to +85NC
24 TQFN-EP**
MAX34406TETG+T*
25
-40NC to +85NC
24 TQFN-EP**
MAX34406FETG+*
50
-40NC to +85NC
24 TQFN-EP**
MAX34406FETG+T*
50
-40NC to +85NC
24 TQFN-EP**
MAX34406HETG+
100
-40NC to +85NC
24 TQFN-EP**
MAX34406HETG+T
100
-40NC to +85NC
24 TQFN-EP**
MAX34406WETG+*
200
-40NC to +85NC
24 TQFN-EP**
MAX34406WETG+T*
200
-40NC to +85NC
24 TQFN-EP**
+Denotes a lead(Pb)-free/RoHS-compliant package.
T = Tape and reel.
*Future product—contact factory for availability.
**EP = Exposed pad.
Package Information
For the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages. Note that a “+”, “#”, or
“-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains
to the package regardless of RoHS status.
PACKAGE TYPE
PACKAGE CODE
OUTLINE NO.
LAND PATTERN NO.
24 TQFN-EP
T2444+4
21-0139
90-0022
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MAX34406
Quad Current-Sense Amplifier
with Overcurrent Threshold Comparators
Revision History
REVISION
NUMBER
REVISION
DATE
0
6/11
DESCRIPTION
Initial release
PAGES
CHANGED
—
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied.
Maxim reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical
Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2011
Maxim Integrated Products 11
Maxim is a registered trademark of Maxim Integrated Products, Inc.