NOT FOR NEW DESIGN

RF5122
3V TO 3.6V, 2.4GHz TO 2.5GHz
LINEAR POWER AMPLIFIER
VCC
VC1
Package Style: QFN, 8-Pin, 2.2mmx2.2mmx0.6mm
8
7

VREG 2
3

N
O
T

5 RF OUT
4
EW
Functional Block Diagram
Product Description
N
The RF5122 is a linear, medium-power, high-efficiency, two-stage amplifier IC
designed specifically for battery-powered WiFi applications such as PC cards, mini
PCI, and compact flash applications. The device is manufactured on an advanced
InGaP Gallium Arsenide Heterojunction Bipolar Transistor (HBT) process, and has
been designed for use as the final RF amplifier in 2.5GHz OFDM and other spreadspectrum transmitters. The device is provided in a 2.2mmx2.2mm, 8-pin, QFN with
a backside ground. The RF5122 is designed to maintain linearity over a wide range
of supply voltages and power outputs. The RF5122 also has built-in power detector
and incorporates the input, interstage, and output matching components internally
which reduces the component count used externally and makes it easier to incorporate on any design.
R

Power
Detector
FO

IEEE802.11b/g/n WiFi Applications
2.5GHz ISM Band Applications
Commercial and Consumer
Systems
Portable Battery-Powered
Equipment
Spread-Spectrum and MMDS
Systems
Output
Match
Bias Circuit
Applications

Interstage
Match
N/C

6 VC2
Input
Match
ES
IG

RF IN 1
D

Single Power Supply 3.0V to
3.6V
24.5dB Minimum Gain
Input and Output Matched to
50
2400MHz to 2500MHz Frequency Range
+18dBm @ <2.5% typ EVM,
120mA @ 3.3VCC
PDETECT

N
Features
Ordering Information
RF5122
RF5122SR
RF5122TR7
RF5122PCK-410
Standard 25 piece bag
Standard 100 piece reel
Standard 2500 piece reel
Fully assembled evaluation board tuned for 2.4GHz to
2.5GHz and 5 loose sample pieces
Optimum Technology Matching® Applied
GaAs HBT
GaAs MESFET
InGaP HBT

SiGe BiCMOS
Si BiCMOS
SiGe HBT
GaAs pHEMT
Si CMOS
Si BJT
GaN HEMT
RF MEMS
LDMOS
RF MICRO DEVICES®, RFMD®, Optimum Technology Matching®, Enabling Wireless Connectivity™, PowerStar®, POLARIS™ TOTAL RADIO™ and UltimateBlue™ are trademarks of RFMD, LLC. BLUETOOTH is a trademark owned by Bluetooth SIG, Inc., U.S.A. and licensed for use by RFMD. All other trade names, trademarks and registered trademarks are the property of their respective owners. ©2006, RF Micro Devices, Inc.
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RF5122
Unit
Supply Voltage
-0.5 to +5.0
VDC
Power Control Voltage (VREG)
-0.5 to 3.5
V
DC Supply Current
400
mA
Input RF Power
+5
dBm
-30 to +85
°C
-40 to +150
°C
Operating Ambient Temperature
Storage Temperature
Moisture sensitivity
JEDEC Level 2
ESD HBM
450
V
MM
50
V
Parameter
Min.
Specification
Typ.
Max.
Caution! ESD sensitive device.
Exceeding any one or a combination of the Absolute Maximum Rating conditions may
cause permanent damage to the device. Extended application of Absolute Maximum
Rating conditions to the device may reduce device reliability. Specified typical performance or functional operation of the device under Absolute Maximum Rating conditions is not implied.
RoHS status based on EUDirective2002/95/EC (at time of this document revision).
The information in this publication is believed to be accurate and reliable. However, no
responsibility is assumed by RF Micro Devices, Inc. ("RFMD") for its use, nor for any
infringement of patents, or other rights of third parties, resulting from its use. No
license is granted by implication or otherwise under any patent or patent rights of
RFMD. RFMD reserves the right to change component circuitry, recommended application circuitry and specifications at any time without prior notice.
N
Rating
ES
IG
Absolute Maximum Ratings
Parameter
Unit
Condition
D
Temperature=+25°C, VCC =3.3V,
VREG =2.8V pulsed at 1% to 100% duty cycle,
Frequency=2450MHz,
circuit per evaluation board schematic, unless
otherwise specified
Overall
Output Power
2.50
18
dBm
EVM*
2.5
At max data rate, OFDM modulation
RMS, mean
dB
At +18dBm RF POUT and 54Mbps
1.25
±dB
-30°C to +85°C
0.7
V
1.35
1.50
V
Operating
120
145
mA
At +18dBm RF POUT and 54Mbps
Quiescent
85
mA
Data rate @<3.5% EVM RMS, mean,
T=-30°C to +50°C
2
mA
VCC =+3.3VDC
Gain Variance
Power Detector
POUT =8dBm
0.4
R
POUT =18dBm
1.25
FO
Current
25.5
N
24.5
4
IEEE802.11g
IEEE802.11n
%
Gain
IREG Current
GHz
EW
2.40
Frequency
10
A
Power Supply
3.0
3.3
3.6
VDC
Operating Range
VREG1, VREG2 Input Voltage
2.75
2.8
2.9
VDC
Operating Range
O
T
Shutdown
Output VSWR
10:1
-15
-10
Turn-on Time**
0.5
1.0
S
-27
dBm
N
Input Return Loss
Second Harmonic
dB
Output stable to within 90% of final gain
Fundamental frequency is between 2400MHz
and 2500MHz; RF POUT =+18dBm. See note 2.
Notes:
*The EVM specification is obtained with a signal generator that has an EVM floor of less than 0.7%.
**The PA must operate with gated bias voltage input at 1% to 99% duty cycles without any EVM or other parameter degradation.
Note 2: For best harmonic rejection please refer to the harmonic rejection application schematic.
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support, contact RFMD at (+1) 336-678-5570 or [email protected].
DS110617
RF5122
Pin
1
Function
RF IN
Description
Interface Schematic
RF input. Input is matched to 50 and DC block is provided internally.
VCC
Interstage
Match
Input
Match
4
5
N/C
RF OUT
Bias current control voltage for the first and second amplifier stage.
Power detector which provides an output voltage proportional to the RF
output power level. May need external decoupling capacitor for stability.
May need external circuitry to bring output voltage to desired level.
Must be left as no connect, not grounded.
RF output. Output is matched to 50 and DC block is provided internally.
VC2
VC1
VCC
Voltage supply for the second amplifier stage.
Pkg
Base
GND
The center metal base of the QFN package provides DC and RF ground as
well as heat sink for the amplifier.
VCC2
Output
Match
RF OUT
D
6
7
8
Voltage supply for the first amplifier stage.
N
VREG
PDETECT
ES
IG
2
3
N
EW
Supply voltage for the bias reference and control circuit. May be connected
with VC1 and VC2 (with a single supply voltage) as long as VCC does not
exceed +4.5VDC in this configuration.
N
O
T
FO
R
Package Drawing
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support, contact RFMD at (+1) 336-678-5570 or [email protected].
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RF5122
VCC
VC1
Pin Out
8
7
6 VC2
4
N
O
T
FO
R
N
EW
D
3
N/C
5 RF OUT
PDETECT
VREG 2
ES
IG
N
RF IN 1
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DS110617
RF5122
Theory of Operation and Application Information
The RF5122 is a two-stage power amplifier (PA) with a minimum gain of 24.5dB minimum gain in the 2.4GHz to 2.5GHz ISM
band. The RF5122 has integrated input, interstage and output matching components thus allowing minimal bill of material
(BOM) parts count in end applications. The RF5122 is designed primarily for IEEE802.11b/g/n WiFi applications where the
available supply voltage and current are limited. This amplifier will operate to (and below) the lowest expected voltage made
available by a typical PCMCIA slot in a laptop PC, and will maintain required linearity at decreased supply voltages.
ES
IG
N
The RF5122 requires only a single positive supply of 3.3V nominal (or greater) to operate to full specifications. Power control is
provided through one bias control input pin (VREG). DC blocking caps are provided internally and the evaluation board circuit
(available from RF Micro Devices, Inc. (RFMD)) is optimized for 3.3VDC applications.
D
For best results, the PA circuit layout from the evaluation board should be copied as closely as possible, particularly the ground
layout and ground vias. Pin 4 must be left as a no-connect on the PCB in order for the PA to work properly. Other configurations
may also work, but the design process is much easier and quicker if the layout is copied from the RF5122 evaluation board.
Gerber files of RFMD PCBA designs can be provided on request. The RF5122 is a very easy part to implement, but care in circuit layout and component selection is always advisable when designing circuits to operate at 2.5GHz. The RF5122 evaluation
board layout and schematic are available using 0201 (US) size components which will help shrink the overall size of the total
area of the PA and components of the intended design. Please contact RFMD Sales or Application Engineering for additional
data and guidance.
EW
For best performance, it is important to duplicate (as closely as possible) the layout of the evaluation board. The RF5122 has
primarily been characterized with a voltage on VREG of 2.8VDC. If you prefer to use a control voltage that is significantly different than 2.8VDC, or a different frequency than the recommended frequency range, contact RFMD Sales or Applications Engineering for additional data and guidance.
QFN8 Package Area versus Other Small Form Factor Package Areas
Length (mm)
Area (mm2)
N
Package Type
Width (mm)
3.1
3.0
QFN12
3.0
3.0
9.00
4.16
SOT 23-5
2.9
2.8
8.12
3.28
QFN8
2.2
2.2
4.84
0.00
R
SOT 23-6
4.46
FO
9.30
Delta () (mm2) to QFN8
N
O
T
An application schematic for 2.5GHz operation is included that has two additional components, one shunt inductor, and one
shunt capacitor, on the output for improved second harmonic rejection. This layout provides ~20dB rejecetion at 5GHz with a
minimal BOM count.
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support, contact RFMD at (+1) 336-678-5570 or [email protected].
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RF5122
Application Schematic
for Improved Second Harmonic Performance
P1
1
GND
P1-2
2
VCC
P1-3
3
VCC
VCC
VCC
3.6K
P2
1 F
VREG
2
PDETECT
1
GND
N
P2-2
3
1 nF
ES
IG
P2-3
27 nH
1 F
8
50  strip
1
6
D
J1
RF IN
7
50  strip
2
5
EW
VREG
3
10 pF
1.8 nH*
50  strip
2.4 pF*
10 pF
J4
RF OUT
4**
* The 2.4 pF cap can be placed at the same point as the 1.8 nH inductor
which should be as close as possible to the DC blocking cap (10 pF). The
placement can be modified for the best linear performance. A series
capacitor (10 pF) must be added to provide a DC block after the 2Fo Filter.
N
330 pF
PDETECT
N
O
T
FO
R
**Pin 4 must be left as a no-connect on the PCB.
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7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or [email protected].
DS110617
RF5122
Evaluation Board Schematic
VCC
P1
1
GND
P1-2
2
VCC
P1-3
3
VCC
P2-3
P2
3
P3-3
2
PDETECT
1
GND
C1
1 F
VREG
8
7
50  strip
J1
RF IN
1
L2
0
6
Interstage
Match
Output
Match
R1
0
2
Power
Detector
50  strip
5
J4
RF OUT
EW
Bias Circuit
D
Input
Match
VREG
ES
IG
C3
1 F
N
L1
27 nH
C2
1 nF
4
*Pin 4 should be left as a
no-connect on the PCB.
N
3
NOTE:
The RF5122 evaluation board layout and schematic are available
using 0201 (US) size components which will help shrink the overall
size of the total area of the PA and components of this intended
design. Please contact RFMD Sales or Application Engineering for
additional data and guidance.
R
C6
330 pF
R2
0
N
O
T
FO
PDETECT
DS110617
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or [email protected].
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RF5122
Evaluation Board Layout
Board Size 1.0” x 1.0”
N
O
T
FO
R
N
EW
D
ES
IG
N
Board Thickness 0.031”; Board Material FR-4; Multi-Layer
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DS110617
RF5122
ACP versus POUT
EVM versus POUT
8.0
0.0
ACP1 2400MHz
ACP1 2450MHz
ACP1 2500MHz
2400MHz ACP2
2450MHz ACP2
2500MHz ACP2
-10.0
2400MHz
2450MHz
2500MHz
7.5
7.0
6.5
6.0
-20.0
5.5
5.0
-40.0
4.5
4.0
N
EVM (%)
3.5
3.0
-50.0
2.5
2.0
-60.0
1.5
1.0
-70.0
0.5
0.0
-80.0
10.0
12.0
14.0
16.0
18.0
20.0
0.0
22.0
ES
IG
ACP (dBc)
-30.0
5.0
10.0
15.0
20.0
Output Power (dBm)
Output Power (dBm)
Gain verus POUT
D
Operating Current versus POUT
150.0
30.0
140.0
EW
29.0
130.0
28.0
120.0
N
Gain (dB)
26.0
25.0
ICC (mA)
110.0
27.0
100.0
90.0
80.0
70.0
R
24.0
2400MHz
2450MHz
2500MHz
22.0
0.0
5.0
FO
23.0
10.0
15.0
20.0
60.0
2400MHz
2450MHz
2500MHz
50.0
40.0
25.0
0.0
5.0
10.0
15.0
20.0
Output Power (dBm)
Output Power (dBm)
O
T
PDETECT versus POUT
1.8
1.6
N
1.4
PDETECT (V)
1.2
1.0
0.8
0.6
0.4
2400MHz
2450MHz
2500MHz
0.2
0.0
0.0
5.0
10.0
15.0
20.0
Output Power (dBm)
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RF5122
PCB Design Requirements
PCB Surface Finish
The PCB surface finish used for RFMD's qualification process is electroless nickel, immersion gold. Typical thickness is 3inch
to 8inch gold over 180inch nickel.
N
PCB Land Pattern Recommendation
PCB land patterns are based on IPC-SM-782 standards when possible. The pad pattern shown has been developed and tested
for optimized assembly at RFMD; however, it may require some modifications to address company specific assembly processes. The PCB land pattern has been developed to accommodate lead and package tolerances.
ES
IG
PCB Solder Mask Pattern
Liquid Photo-Imageable (LPI) solder mask is recommended. The solder mask footprint will match what is shown for the PCB
metal land pattern with a 2mil to 3mil expansion to accommodate solder mask registration clearance around all pads. The
center-grounding pad shall also have a solder mask clearance. Expansion of the pads to create solder mask clearance can be
provided in the master data or requested from the PCB fabrication supplier.
N
O
T
FO
R
N
EW
D
PCB Metal Land and Solder Pattern
Thermal vias for center slug “C” should be incorporated into the PCB design. The number and size of thermal vias will depend
on the application, the power dissipation, and this electrical requirements. Example of the number and size of vias can be
found on the RFMD evaluation board layout.
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DS110617
RF5122
RoHS* Banned Material Content
RoHS Compliant:
Yes
Pack age total weight in grams (g):
0.008
Compliance Date Code:
N/A
B ill of Materials Revision:
e3
N
Pb Free Category:
P a r ts P e r M i l l i o n ( P P M )
B i l l o f M a te r i a l s
Cd
Hg
Cr VI
Die
0
0
0
0
PB B
0
M o l d i n g Co m p o u n d
0
0
0
0
0
Le a d F r a m e
0
0
0
0
0
D i e A tta c h E p o x y
0
0
0
0
0
Wire
0
0
0
0
0
S o l d e r P l a ti n g
0
0
0
0
0
D
ES
IG
Pb
PB
T h i s R o H S b a n n e d m a te r i a l c o n te n t d e c l a r a ti o n w a s p r e p a r e d s o l e l y o n i n f o r m a ti o n , i n c l u d i n g a n a
EW
d a ta , p r o v i d e d to R F M D b y i ts s u p p l i e r s , a n d a p p l i e s to th e B i l l o f M a te r i a l s ( B O M ) r e v i s i o n n o
* DIRECTIVE 2002/95/EC OF THE EU ROPEAN PARLIAMENT AND OF THE COUNCIL of 27 January 2003 on the restriction o
N
O
T
FO
R
N
use of certain hazardous substances in electrical and electronic equipment
DS110617
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support, contact RFMD at (+1) 336-678-5570 or [email protected].
11 of 11