PCIe x8 Active Optical Cable Assembly ® User Manual January 2012 Covering: PCIE0 Series COPYRIGHTS, TRADEMARKS and PATENTS Product names used herein are trademarks of their respective owners. All information and material in this publication are property of Samtec, Inc. All related rights are reserved. Samtec, Inc. does not authorize customers to make copies of the content for any use. Terms of Use Use of this publication is limited to viewing the pages for evaluation or purchase. No permission is granted to the user to copy, print, distribute, transmit, display in public, or modify the contents of this document in any way. Disclaimer The information in this publication may change without notice. All materials published here are “As Is” and without implied or express warranties. Samtec, Inc. does not warrant that this publication will be without error, or that defects will be corrected. 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Copyright © 2012 Samtec, Inc. 2 Table of Contents DESCRIPTION PCIe® x8 Active Optical Cable Assembly................................................. 4 Fiber Cable................................................................................................ 4 Cable Connector........................................................................................ 4 System Requirements Power........................................................................................................ 5 Clock......................................................................................................... 5 Constant Clock (CC) Spread Spectrum Clock (SSC) Adapter Cards........................................................................................... 6 Auxiliary (Sideband) Signals.................................................................... 6 Installation Connecting AOC........................................................................................ 7 Power Sequence....................................................................................... 7 Technical Information Equivalent Sideband IO Circuit................................................................. 8 Specifications........................................................................................... 8 Connector Pin Assignment..................................................................... 10 PCIe® Cable Assembly Part Numbering PCIe® Active Optical Cable..................................................................... 11 PCIe® is a registered trademark of PCI-SIG®. 3 Description PCIe® x8 Active Optical Cable Assembly is an 8 lane full duplex external cable assembly that is a direct replacement for copper or active copper cable assemblies. Each lane is capable of transmitting PCIe® signaling at Gen 1 (2.5 GT/s), Gen 2 (5 GT/s), and Gen 3 (8 GT/s). The cable can drive Gen 1 or Gen 2 signaling up to a distance of 300m and is also capable of supporting the emerging Gen 3 data rate at 100m distances. The electrical to optical conversion circuitry is fully integrated into the connector housing at each end of the assembly and the optical signal is transmitted over a small diameter optical fiber. The cable auxiliary signals (CPWRON, CPERST, CPRSNT and CWAKE) are also transmitted over the optical link. Fiber Cable used in the PCIe® x8 AOC is a nonconductive plenum rated cable with a 3mm cable diameter and 30mm bend radius. Cable Connector attached at each end of the fiber cable is a metalized housing that contains the electrical to optical components and mates to a standard x8 PCIe® electrical port. Note: Unlike traditional copper cable, active optical PCIe® cables are directional. One end must be connected to the host system (upstream direction), and the other to the target system (downstream direction). The ends of the cable are labeled with Host and Target direction, and are not interchangeable. 4 System Requirements Power The PCIe® x8 AOC requires the host and target systems to provide 3.3 volts to connector pins B14, B15, and B16 at both ends of the cable assembly as described in the PCIe® cabling specification (optional feature). See the Connector Pin Assignment on page 10. Note: The PCIe® cabling specification specifies power as an “option,” and therefore, not all PCIe® systems provide power to the connector ports. Active Optical Cable Assemblies cannot be used with systems that do not provide power to the cable ports. In systems that use the sideband signal “CWAKE,” both ends of the Active Optical Cable Assembly must be powered at all times and, therefore, they must be powered by Vaux. In systems that do not use CWAKE, the cable ends may be powered by Vmain. Clock Constant Clock (CC): Active Optical Cables require the use of a constant clocking scheme. The PCIe® Active Optical Cable Assembly uses a constant clock frequency of 100 MHz as specified in PCIe® standard. If a clock frequency other than 100 MHz is required it must be specified at the time of purchasing the assembly. Spread Spectrum Clock (SSC) is used in many systems running PCIe®. However, due to signaling technology limitations, the PCIe® standard cannot support SSC beyond 7m of link length. As noted in “Clock Constant” above, Active Optical Cables require the use of a constant clocking scheme. In order to use a PCIe® Active Optical Cable Assembly in a system that uses SSC clocking, the SSC must be completely disabled at the host. If disabling the SSC is not possible then a clock isolation adapter card will be required to isolate the SSC clock. Note: Some motherboards allow SSC to be disabled; however, in some cases the disable function has a delay that allows the SSC to run for a period of time. Motherboards that delay the SSC disable function cannot be used with optical cable assemblies. Ensure that the motherboard you are using completely disables SSC or uses a clock isolation adapter card. 5 System Requirements Adapter Cards A Host adapter card and a Target adapter card that are compatible with Active Optical Cables should be installed at each end of the link. Adapter cards that have been qualified with the PCIe® x8 AOC are listed in Table 1 below. Compatible with systems using: Table 1: Compatible Adapter Cards Vendor Part Number Host / Target Clock Isolation SSC1 CC2 Samtec Optical PCIEA-H-8G2-01 Host Yes Yes Yes PCIEA-T-8G2-01 Target Yes Yes Yes One Stop Systems OSS-PCIe-HIB25-x8-H Host No No Yes OSS-PCIe-HIB25-x8-T Target No No Yes Dolphin IXH610 x8 Host Yes Yes Yes IXH610 x8 Target Yes Yes Yes Spread Spectrum Clocking 2 Constant Clocking 1 Auxiliary (Sideband) Signals (CPWRON, CPERST, CPRSNT and CWAKE) are also transmitted over the optical link. The link will be properly established if OSS or Samtec adapter cards are installed. If custom adapter cards are used, the PCI Express® External Cabling Specification 2.0 should be followed. Note: Auxiliary sideband signal usage and implementation over copper cable varies widely between systems. For Active Optical Cable Assemblies sideband signals should preferably be implemented following the PCIe® 2.0 standard. At a minimum, the sideband signals CPERST and CPRSNT need to be connected, and their final state must conform to Table 2 below for the link to exchange data. CPWRON and CWAKE do not need to be connected, but if they are, their final state must be HIGH. If sidebands are to be ignored entirely, a special “no-sideband” cable can be purchased. Table 2 below summarizes the minimum sideband implementation requirements. Table 2: Minimum Sideband Implementation Requirements Sideband Signal Driving End Function Required End State CPERST Host Reset Yes High CPRSNT Target Cable Present Yes CPWRON Host Power On No High Target Host Wakeup No High CWAKE 1 6 1 1 A “no-sideband” cable is available as an option for applications where sidebands are ignored. Low InstAllation Connecting AOC Power to either the adapter card or motherboard should be in the off state prior to installing the cable assembly. Refer to the label on the connector ends to identify the host end of the cable assembly and the target end of the assembly. Insert the host end of the assembly into the host card and the target end into the target card ensuring the connector is fully seated and the latching mechanism is fully engaged with host connector. Apply power after the cable has been installed. Power Sequence PCIe® Active Optical Cables do not require a special powering sequence. But whether using an Active Optical Cable or a passive copper cable, it is critical that the target be powered prior to the PCIe® controller on the motherboard enumerates (searches and detects) all the PCIe® devices. There is a short delay from when the host is powered and then starts to enumerate, but to ensure that the target is powered prior to the host beginning its search it is good practice to apply power to the target side and then to the host side. 7 TecHnical Information Equivalent Sideband IO Circuit The sideband input signals are pulled high using an internal pull-up resistor (Rpu) of 20-50 kohms as shown in the equivalent IO circuit diagram below, Figure 1. Refer to Table 3 to determine which sideband signals are inputs to the host end of the cable and which signals are inputs to the target end of the link. Figure 1: Equivalent Sideband IO Circuit Table 3: Sideband Signal Input / Output Reference Sideband Signal Host Side Pull-up Target Side Pull-up CPWRON Input Yes Output N/A CPERST Input No Output N/A CPRSNT Output N/A Input Yes CWAKE Output N/A Input Yes Specifications General Characteristics SPECIFICATIONS Operating Case Temperature SYMBOL TCASE Operating Humidity Storage Temperature Range Link Distance 8 TSTO m UNIT MIN TYP. MAX 70 Case Temperature 90 Noncondensing 85 300 (100m max at Gen 3 rate) ºC 0 %RH 5 ºC -40 0.5 NOTES TecHnical Information Electrical Characteristics SPECIFICATIONS SYMBOL UNIT GT/s MIN 1 Differential Input Amplitude VDI mV 300 Differential Output Amplitude VDO mV Power Supply Voltage VCC1 V Power Supply Current ICC1 mA 460 Power Consumption PDISS W 1.5 1 Bit Error Rate BER Data Rate (channel) TYP. 2.5/5.0/8.0 MAX 8.0 NOTES 1200 Peak to peak differential 3.45 Peak to peak differential Supplied through pins B14 and B15 Per connector end 2.0 2 Per connector end 700 3.15 3.3 Gen 1 / Gen 2 / Gen 3 10-15 Nominal supply voltage, room temperature. Maximum supply voltage, 75°C. 1 2 Mechanical Dimensions 33,94 (1.34) 33,5 (1.32) 36,0 (1.42) M IN 68,48 (2.70) R 50 (0 .9 8,68 (0.34) 8) 28,31 (1.11) A1 B1 9 TecHnical Information Connector Pin Assignment A1 B1 Latch Side A34 PIN# A1, A4, A7, A10, A13, A16, A22, A25, A28, A31, A34 A2 A3 A5 A6 A8 A9 A11 A12 A14 A15 A17 A18 A19 A20 B34 Signal Description Notes GND Ground reference for PCI Express transmitter Lanes PETp0 PETn0 PETp1 PETn1 PETp2 PETn2 PETp3 PETn3 CREFCLK+ CREFCLKNC NC SB_RTN Differential PCI Express® transmitter Lane 0 Differential PCI Express® transmitter Lane 0 Differential PCI Express® transmitter Lane 1 Differential PCI Express® transmitter Lane 1 Differential PCI Express® transmitter Lane 2 Differential PCI Express® transmitter Lane 2 Differential PCI Express® transmitter Lane 3 Differential PCI Express® transmitter Lane 3 Differential 100 MHz cable reference clock Differential 100 MHz cable reference clock CPRSNT# Used for detection of whether a cable is installed and the downstream subsystem is powered ® 1, 2 1, 2 Signal return for single ended sideband signals 1 A21 CPWRON Turns power on / off to slave-type downstream subsystems 1 A23 PETp4 Differential PCI Express® transmitter Lane 4 ® PETn4 Express Lane 4 system, Target side to downstream system. 1A24 Cable propagation of these signals isDifferential directional.PCI Connect Hosttransmitter side to upstream ® 2A26 PETp5 Differential PCI Express transmitter Lane 5use our clock isolation adapter card Constant 100 MHz Clocking only. For Spread Spectrum Clocking (SSC) support (Available Q1, 2012) PETn5 A27 Differential PCI Express® transmitter Lane 5 3 Must be connected to PETp6 3.3V (+/-5%) Differential Vaux or Vmain A29 PCI Express® transmitter Lane 6 3 Must be connected to PETn6 Power GroundDifferential PCI Express® transmitter Lane 6 A30 A32 PETp7 Differential PCI Express® transmitter Lane 7 A33 PETn7 Differential PCI Express® transmitter Lane 7 1 Cable propagation of these signals is directional. Connect Host side to upstream system, Target side to downstream system. 2 Constant 100 MHz Clocking only. For Spread Spectrum Clocking (SSC) support use our clock isolation adapter card (Available Q1, 2012). 3 Must be connected to 3.3V (+/-5%) Vaux or Vmain 4 Must be connected to Power Ground 10 TecHnical Information PIN# B1, B4, B7, B10, B13, B22, B25, B28, B31, B34 B2 B3 B5 B6 B8 B9 B11 B12 B14 B15 B16 B17 B18 B19 B20 B21 B23 B24 B26 B27 B29 B30 B32 B33 Signal Description Notes GND Ground reference for PCI Express receiver Lanes PERp0 PERn0 PERp1 PERn1 PERp2 PERn2 PERp3 PERn3 PWR PWR PWR PWR RTN PWR RTN PWR RTN CWAKE# CPERST# PERp4 PERn4 PERp5 PERn5 PERp6 PERn6 PERp7 PERn7 Differential PCI Express® receiver Lane 0 Differential PCI Express® receiver Lane 0 Differential PCI Express® receiver Lane 1 Differential PCI Express® receiver Lane 1 Differential PCI Express® receiver Lane 2 Differential PCI Express® receiver Lane 2 Differential PCI Express® receiver Lane 3 Differential PCI Express® receiver Lane 3 3.3V Cable power 3.3V Cable power 3.3V Cable power Cable power return Cable power return Cable power return Power management signal for wakeup events Cable PERST# Differential PCI Express® receiver Lane 4 Differential PCI Express® receiver Lane 4 Differential PCI Express® receiver Lane 5 Differential PCI Express® receiver Lane 5 Differential PCI Express® receiver Lane 6 Differential PCI Express® receiver Lane 6 Differential PCI Express® receiver Lane 7 Differential PCI Express® receiver Lane 7 ® 3 3 3 4 4 4 1 1 Cable propagation of these signals is directional. Connect Host side to upstream system, Target side to downstream system. Constant 100 MHz Clocking only. For Spread Spectrum Clocking (SSC) support use our clock isolation adapter card (Available Q1, 2012). 3 Must be connected to 3.3V (+/-5%) Vaux or Vmain 4 Must be connected to Power Ground 1 2 PCIe® Cable Assembly Part Numbering PCIe® Active Optical Cable Product Category Speed x4 Gen2 x8 Gen2 4G2 8G2 5m 10m 100m 005.0 010.0 100.0 Fiber Length Specific Product Variant 001 002 003 004 005 006 Clock Frequency 100 100 100.3 100.3 No CK No CK PCIEO - 4G2 - 005.0 - 001 Sideband standard Forced RF standard Forced RF standard Forced RF 11 Samtec Sudden Service: Information • Samples • Delivery SAMTEC, INC. • P.O. Box 1147 • New Albany, IN 47151-1147 USA Tel: 1-800-SAMTEC-9 or 812-944-6733 • Fax: 812-948-5047 • Internet: www.samtec.com • E-mail: [email protected]