SMP1302-085LF - Skyworks Solutions, Inc.

DATA SHEET
SMP1302-085LF: Surface Mount PIN Diode for High Power
Switch Applications
Applications
• Low loss, high power switches
• Low distortion attenuators
Features
• Low-thermal resistance: 22 °C/W
• Suitable for 140 W Continuous Wave T/R switches
• Low capacitance: 0.3 pF
Figure 1. SMP1302-085LF Block Diagram
• Low distortion performance
• QFN (3-pin, 2 x 2 mm) package (MSL1, 260 °C per
JEDEC J-STD-020)
Description
The SMP1302-085LF is a surface mountable, low capacitance
silicon PIN diode designed as a shunt connected PIN diode for high
power, high volume switch and attenuator applications from
10 MHz to beyond 6 GHz.
Maximum resistance at 100 mA is 1.5 Ω and maximum
capacitance at 30 V is 0.35 pF. The combination of low junction
capacitance, low parasitic inductance, low thermal resistance,
and nominal 50 μm I-region width, makes the SMP1302-085LF
useful in large signal switches and attenuator applications.
The device has a 2.8 W dissipation power rating, making it
capable of handling more than 140 W Continuous Wave (CW) and
500 W peak (1 μs pulse, 1 percent duty cycle) in a shuntconnected transmit/receive (T/R) switch.
Design information for high power switches may be found in the
Skyworks Application Note, Design With PIN Diodes (document
number 200312).
A block diagram of the SMP1302-085LF is shown in Figure 1.
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com
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DATA SHEET • SMP1302-085LF SURFACE MOUNT PIN DIODE
Table 1. SMP1302-085LF Absolute Maximum Ratings
Parameter
Symbol
Minimum
Maximum
Units
Reverse voltage
VR
200
V
Forward current @ 25 °C
IF
200
mA
CW power dissipation @ 85 °C
PD
2.8
W
30
W
Peak pulse power dissipation @ 85 °C (10% duty cycle)
Storage temperature
TSTG
–65
+200
°C
Operating temperature
TA
–40
+150
°C
Electrostatic Discharge:
Charged Device Model (CDM), Class 4
Human Body Model (HBM), Class 1C
Machine Model (MM), Class C
ESD
1100
1000
400
V
V
V
Note:
Exposure to maximum rating conditions for extended periods may reduce device reliability. There is no damage to device with only one parameter set at the limit and all other
parameters set at or below their nominal value. Exceeding any of the limits listed here may result in permanent damage to the device.
CAUTION: Although this device is designed to be as robust as possible, Electrostatic Discharge (ESD) can damage this device. This device
must be protected at all times from ESD. Static charges may easily produce potentials of several kilovolts on the human body
or equipment, which can discharge without detection. Industry-standard ESD precautions should be used at all times.
Table 2. SMP1302-085LF Electrical Specifications (Note 1)
(TA = +25 °C Unless Otherwise Noted)
Parameter
Symbol
Test Condition
Reverse current
IR
VR = 200 V
Capacitance
CT
f = 1 MHz, VR = 30 V
Resistance
RS
Min
Typical
Max
Units
10
μA
0.35
pF
3
1.5
Ω
Ω
f = 100 MHz
IF = 10 mA
IF = 100 mA
1.0
Forward voltage
VF
IF = 10 mA
0.8
V
Carrier lifetime
TL
IF = 10 mA
700
ns
I region width
W
50
μm
CW thermal resistance
θJC
Junction-to-case
22
°C/W
Peak thermal resistance
θP
Single 1 μs pulse width,
junction-to-case (10%
duty cycle)
2.2
°C/W
Note 1: Performance is guaranteed only under the conditions listed in this Table.
Electrical and Mechanical Specifications
The absolute maximum ratings of the SMP1302-085LF are
provided in Table 1. Electrical specifications are provided in
Table 2.
Typical performance characteristics of the SMP1302-085LF are
illustrated in Figures 2 and 3.
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DATA SHEET • SMP1302-085LF SURFACE MOUNT PIN DIODE
Typical Performance Characteristics
(TA = 25 °C, Unless Otherwise Noted)
Figure 2. Series Resistance vs Current @ 100 MHz
High Power Switch Design Application
The SMP1302-085LF PIN diode is designed for shunt applications
such as reflective switches or shunt-diode attenuator circuits.
Compared to other surface mount packages, the design of the
QFN package produces lower thermal resistance and also reduces
the effects of the parasitic inductance of the anode bond wires.
A cross-sectional view of the SMP1302-085LF PIN diode is shown
in Figure 4. The cathode of the die is soldered directly to the top of
the exposed paddle. This paddle is composed of copper, so its
thermal resistance is very low.
Figure 3. Forward Voltage vs Forward Current
generated under normal operation, and the surface to which the
package is mounted. Minimal thermal resistance between the I
layer and the external environment minimizes junction
temperature.
The electrically equivalent circuit of the SMP1302-085LF PIN
diode is shown in Figure 5. The inductances of pins 1 and 2, as
well as the inductances of the bond wires are in series with the
input and output transmission lines of the external circuit rather
than the portion of the circuit that contains the shunt PIN diode.
The copper ground paddle minimizes the total thermal resistance
between the I layer, which is the location where most heat is
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com
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DATA SHEET • SMP1302-085LF SURFACE MOUNT PIN DIODE
Figure 4. Cross-Sectional View of the SMP1302-085LF
Figure 5. SMP1302-085LF Electrically Equivalent Circuit
The effects of these parasitic series inductances are negligible,
since they add a very small insertion loss to the shunt PIN but
have no effect on the isolation that the diode produces when it is
forward biased.
low insertion loss (0.42 dB) and high receiver isolation (37 dB).
The input 1 dB compression point is higher than +50 dBm. In the
receive state, the switch produced 0.45 dB insertion loss and
37.8 dB transmitter isolation.
A cross section of the suggested printed circuit board design is
shown in Figure 6. The via shown in this view is critical, both for
electrical performance and for thermal performance. It is
recommended that several vias should be placed under the entire
footprint of the exposed paddle (pin 2) to minimize both electrical
inductance to the system ground and thermal resistance to the
system heat sink.
The circuit is based on a quarter wave design using two shuntconnected SMP1302-085LF diodes. In the transmit state, Bias 1 is
set at 0 mA and Bias 2 is set at 50 mA. Under these conditions,
D1 is held out of conduction so its impedance remains high and a
very small insertion loss is introduced to the path between the
transmitter port and the antenna port.
A Transmit/Receive Switch Design
A T/R switch incorporating a pair of SMP1302-085LF PIN diodes
and covering 2.0155 GHz to 2.0195 GHz has been designed and
tested. This circuit is shown in Figure 7. The switch operated
safely at a transmitter input power of +41 dBm CW (12.6 W) with
D2 is forced into conduction, which lowers its series resistance
towards its minimum value of <1 Ω. In this state, energy that
propagates from either the transmitter port or the antenna port is
reflected, which isolates the receiver port from the remainder of
the circuit.
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com
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DATA SHEET • SMP1302-085LF DIODE
Figure 6. Cross-Sectional View of Suggested Printed Circuit Board
Figure 7. T/R Switch Design: 2.0155 GHz to 2.0195 GHz
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com
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DATA SHEET • SMP1302-085LF SURFACE MOUNT PIN DIODE
Table 3. Measured T/R Switch Performance
Parameter
Symbol
Conditions
Frequency
Value
2.010 to 2.025 GHz
Insertion loss (transmit port to antenna)
Bias 1 = 0 mA, Bias 2 = 50 mA
0.42 dB
Insertion loss (antenna to receive port)
Bias 1 = 50 mA, Bias 2 = 0 mA
0.45 dB
Isolation (receive port to transmit port)
Bias 1 = 0 mA, Bias 2 = 50 mA
37 dB
Isolation (transmit port to receive port)
Bias 1 = 50 mA, Bias 2 = 0 mA
37.8 dB
0.1 dB Input Compression Point
IP0.1dB
Bias 1 = 0 mA, Bias 2 = 50 mA,
pulse width = 8 μs, duty cycle = 0.5%
+46 dBm
1 dB Input Compression Point
IP1dB
Bias 1 = 0 mA, Bias 2 = 50 mA,
pulse width = 8 μs, duty cycle = 0.5%
>+50 dBm
3rd Order Input Intercept Point
IIP3
f1 = 2.0155 GHz, f2= 2.0195 GHz
>+80 dBm
Maximum transmit CW input power
Bias 1 = 0 mA, Bias 2 = 50 mA
+41 dBm
Maximum pulsed transmit input power
Bias 1 = 0 mA, Bias 2 = 50 mA,
pulse width = 8 μs, duty cycle = 0.5%
>+49.5 dBm
Transmit state to receive state,
Bias 1 = 0/50 mA, Bias 2 = 50/0 mA
<0.85 μs
Transmit input return loss
Bias 1 = 0 mA, Bias 2 = 50 mA
27.8 dB
Receive input return loss
Bias 1 = 50 mA, Bias 2 = 0 mA
28.8 dB
Switching speed
TSW
The quarter wave line connected between D2 and the antenna
port transforms the very low impedance of the diode to a very
high impedance looking from the antenna port towards the receive
port. This produces minimal insertion loss in the transmitter-toantenna path.
In the receive state, Bias 1 is set at 50 mA and Bias 2 is set at
0 mA. The operation of the T/R switch in this state is the converse
of the operation in the transmit state: the transmitter port is
isolated from the antenna port and the antenna and receive ports
are connected to each other using a low-insertion-loss path.
The measured performance of this circuit is summarized in
Table 3.
Package Dimensions
Package and Handling Information
Instructions on the shipping container label regarding exposure to
moisture after the container seal is broken must be followed.
Otherwise, problems related to moisture absorption may occur
when the part is subjected to high temperature during solder
assembly.
The SMP1302-085LF is rated to Moisture Sensitivity Level 1
(MSL1) at 260 °C. It can be used for lead or lead-free soldering.
For additional information, refer to the Skyworks Application Note,
Solder Reflow Information, document number 200164.
Care must be taken when attaching this product, whether it is
done manually or in a production solder reflow environment.
Production quantities of this product are shipped in a standard
tape and reel format.
The PCB layout footprint for the SMP1302-085LF is shown in
Figure 8. Typical case markings are shown in Figure 9. Package
dimensions for the 3-pin QFN are provided in Figure 10, and
Figure 11 provides the tape and reel dimensions.
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com
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DATA SHEET • SMP1302-085LF SURFACE MOUNT PIN DIODE
Figure 8. SMP1302-085LF PCB Layout Footprint
Figure 9. Typical Case Markings
(Top View)
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com
200966N • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • July 17, 2013
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DATA SHEET • SMP1302-085LF SURFACE MOUNT PIN DIODE
Figure 10. SMP1302-085LF QFN Package Dimension Drawing
Figure 11. SMP1302-085LF Tape and Reel Dimensions
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com
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DATA SHEET • SMP1302-085LF SURFACE MOUNT PIN DIODE
Ordering Information
Model Name
SMP1302-085LF Surface Mount PIN Diode
Manufacturing Part Number
SMP1302-085LF
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