Datasheet

MIC59P50
8-Bit Parallel-Input Protected
Latched Driver
General Description
Features
The MIC59P50 parallel-input latched driver is a highvoltage (80V), high-current (500mA) integrated circuit
comprised of eight CMOS data latches, a bipolar
Darlington transistor driver for each latch, and CMOS
control circuitry for the common CLEAR, STROBE, and
OUTPUT ENABLE functions. Similar to the MIC5801,
additional protection circuitry supplied on this device
includes thermal shutdown, undervoltage lockout (UVLO),
and overcurrent shutdown.
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The bipolar/MOS combination provides an extremely lowpower latch with maximum interface flexibility. The
MIC59P50 has open-collector outputs capable of sinking
500mA and integral diodes for inductive load transient
suppression with a minimum output breakdown voltage
rating of 80V above VEE (50V sustaining). The drivers can
be operated with a split supply, where the negative supply
is down to –20V and may be paralleled for higher load
current capability.
4.4MHz minimum data input rate
High-voltage, high-current outputs
Per-output overcurrent shutdown (500mA typical)
Undervoltage lockout
Output fault flag
Output transient protection diodes
CMOS, PMOS, NMOS, and TTL-compatible inputs
Internal pull-down resistors
Low-power CMOS latches
Single or split supply operation
With a 5V logic supply, the MIC59P50 will typically operate
at better than 5MHz. With a 12V logic supply, significantly
higher speeds are obtained. The CMOS inputs are
compatible with standard CMOS, PMOS, and NMOS
circuits. TTL circuits may require pull-up resistors.
Each of these eight outputs has an independent
overcurrent shutdown at 500mA. Upon current shutdown,
the affected channel will turn OFF and the flag will go low
until VDD is cycled or the /ENABLE/RESET pin is pulsed
high. Current pulses less than 2µs will not activate
overcurrent shutdown. Temperatures above +165°C will
shut down the device and activate the open-collector
FLAG output at pin 1. The UVLO circuit disables the
outputs at low VDD; hysteresis of 0.5V is provided.
Datasheets and support documentation are available on
Micrel’s website at: www.micrel.com.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
July 29, 2015
Revision 2.0
Micrel, Inc.
MIC59P50
Functional Diagram
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MIC59P50
Ordering Information
Part Number
Temperature Range
Package
Pb-Free
√
(1)
MIC59P50YN
–40°C to +85°C
24-Pin Plastic DIP
MIC59P50YV
–40°C to +85°C
28-Pin PLCC
√
MIC59P50YWM
–40°C to +85°C
24-Pin Wide SOIC
√
Note:
1. 300mm “Skinny DIP”
Pin Configuration
24-Pin PDIP (N)
24-Pin Wide SOIC (WM)
(Top View)
28-Pin PLCC (V)
(Top View)
Pin Description
Pin Number
PDIP & SOIC
Pin Number
PLCC
Pin Name
1
2
/FLAG
Error flag. Open-collector output is low upon overcurrent fault or
overtemperature fault. /OE/RESET must be pulled high to reset the flag and
fault condition.
2
3
CLEAR
Sets all latches to OFF (open).
3
4
STROBE
4-11
5-12
INn
12
15
VEE
13
17
COMMON
14-21
18-25
OUTn
Parallel outputs, 8 through 1.
22
26
VDD
Logic positive supply voltage.
23
27
/OE/RESET
24
28
VSS
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Pin Name
Input strobe pin. Loads output latches when high.
Parallel inputs, 1 through 8.
Output ground (substrate). Most negative voltage in the system connects here.
Transient suppression diodes cathode common pin.
Output enable reset. When low, outputs are active. When high, outputs are
inactive and the flag and outputs are reset from a fault condition. An
undervoltage condition emulates a high /OE input.
Logic reference (ground) pin.
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Micrel, Inc.
MIC59P50
Absolute Maximum Ratings(2)
Operating Ratings(3)
Input Voltage (VCE) ....................................................... +80V
Supply Voltage
(VDD) ......................................................................... 15V
(VDD – VEE) ............................................................... 25V
Continuous Collector Current (IC) .............................. 500mA
(4)
Protected Current ....................................................... 1.5A
Lead Temperature (soldering, 10s) ............................ 260°C
Storage Temperature (Ts)......................... –65°C to +150°C
(5)
ESD Rating ................................................. ESD Sensitive
Input Voltage (VIN) .................................. –0.3V to VDD+0.3V
Operating Temperature (TA)........................ –40°C to +85°C
Junction Temperature (TJ) ....................................... +150°C
Power Dissipation (PD)
Plastic DIP (N) ....................................................... 2.4W
Derate above TA = +25°C ............................ 24mW/°C
PLCC (V) ............................................................... 1.6W
Derate above TA = +25°C ............................ 16mW/°C
Wide SOIC (WM) ................................................... 1.4W
Derate above TA = +25°C ............................ 14mW/°C
Electrical Characteristics(6)
VDD = 5V; TA = 25°C, unless noted.
Symbol
Parameter
ICEX
Output Leakage Current
VCE(SAT)
Collector-Emitter
Saturation Voltage
Condition
Min.
Typ.
Max.
Units
VCE = 80V, TA = +25°C
50
µA
VCE = 80V, TA = +70°C
100
µA
IC = 100mA
0.9
1.1
V
IC = 200mA
1.1
1.3
V
IC = 350mA
1.3
1.6
V
1.0
V
VIN(0)
VIN(1)
RIN
Input Voltage
Input Resistance
VDD = 12V
10.5
V
VDD = 10V
8.5
V
VDD = 5V, Note 7
3.5
V
VDD = 12V
50
200
kΩ
VDD = 10V
50
300
kΩ
VDD = 5V
50
600
kΩ
IOL
/Flag Output Current
VOL = 0.4V
15
mA
IOH
/Flag Output Leakage
VOH = 12V
50
nA
Notes:
2. Exceeding the absolute maximum ratings may damage the device.
3. The device is not guaranteed to function outside its operating ratings.
4. Each channel VEE connection must be designed to minimize inductance and resistance.
5. Devices are ESD sensitive. Handling precautions are recommended. Human body model, 1.5kΩ in series with 100pF.
6. Specification for packaged product only.
7. Operation of these devices with standard TTL or DTL may require the use of appropriate pull-up resistors to ensure a minimum logic “1”.
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MIC59P50
Electrical Characteristics(6) (Continued)
VDD = 5V; TA = 25°C, unless noted.
Symbol
Parameter
IDD(ON)1
Supply Current
One Output Active
IDD(ON) All
IDD(OFF)
Condition
Supply Current
All Outputs Active
Min.
Typ.
Max.
Units
VDD = 12V, outputs open
3.3
4.5
mA
VDD = 10V, outputs open
3.1
4.5
mA
VDD = 5V, outputs open
2.4
3.6
mA
VDD = 12V, outputs open
6.4
10.0
mA
VDD = 10V, outputs open
6.0
9.0
mA
VDD = 5V, outputs open
4.7
7.5
mA
VDD = 12V, outputs open, inputs = 0V
3.0
4.5
mA
VDD = 5V, outputs open, inputs = 0V
2.2
3.6
mA
VR = 80V, TA = +25°C
50
µA
VR = 80V, TA = +70°C
100
µA
Supply Current OFF
IR
Clamp Diode Leakage Current
ILIM
Overcurrent Threshold
Each output
VSU
Start-up Voltage
Note 8
VDD MIN
Minimum Operating VDD
VF
Clamp Diode Forward Voltage
500
mA
3.5
4.0
4.5
V
3.0
3.5
4.0
V
1.7
2.0
V
IF = 350mA
Thermal Shutdown
165
Thermal Shutdown Hysteresis
10
°C
Notes:
8. Undervoltage lockout is guaranteed to release device at no more than 4.5V and disable the device at no less than 3.0V input logic voltage.
Truth Table
INn
Strobe
Clear
Output Enable
0
1
0
1
1
X
OUTn
t-1
t
0
X
OFF
0
0
X
ON
X
1
X
X
OFF
X
X
X
1
X
OFF
X
0
0
0
ON
ON
X
0
0
0
OFF
OFF
Note:
X = Irrelevant
t-1 = Previous output state
t = Present output state
Information present at an input is transferred to its latch when the STROBE is high. A high CLEAR input will set all latches
to the output OFF condition regardless of the data or STROBE input levels. A high OUTPUT ENABLE will set all outputs
to the OFF condition, regardless of any other input conditions. When the OUTPUT ENABLE is low, the outputs depend on
the state of their respective latches. If current shutdown is activated, the OUTPUT ENABLE must be pulsed high to
restore operation and reset the FLAG. Overtemperature faults are not latched and require no reset pulse.
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MIC59P50
Timing Diagram
Timing Conditions
TA = +25°C; Logic levels are VDD and VSS; VDD = 5V.
A. Minimum data active time before strobe enabled (data set-up time)
50ns
B. Minimum data active time after strobe disabled (data hold time)
50ns
C. Minimum strobe pulse width
125ns
D. Typical time between strobe activation and output on-to-off transition
500ns
E. Typical time between strobe activation and output off-to-on transition
500ns
F. Minimum clear pulse width
300ns
G. Minimum data pulse width
225ns
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MIC59P50
Typical Characteristics
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Micrel, Inc.
MIC59P50
Typical Application
MIC59P50 Protected Relay Driver
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MIC59P50
Package Information and Recommended Land Pattern(9)
24-Pin PDIP (N)
Note:
9. Package information is correct as of the publication date. For updates and most current information, go to www.micrel.com.
July 29, 2015
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Micrel, Inc.
MIC59P50
Package Information and Recommended Land Pattern(9)
28-Pin PLCC (V)
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Revision 2.0
Micrel, Inc.
MIC59P50
Package Information and Recommended Land Pattern(9)
24-Pin Wide SOIC (WM)
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Micrel, Inc.
MIC59P50
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com
Micrel, Inc. is a leading global manufacturer of IC solutions for the worldwide high performance linear and power, LAN, and timing & communications
markets. The Company’s products include advanced mixed-signal, analog & power semiconductors; high-performance communication, clock
management, MEMs-based clock oscillators & crystal-less clock generators, Ethernet switches, and physical layer transceiver ICs. Company
customers include leading manufacturers of enterprise, consumer, industrial, mobile, telecommunications, automotive, and computer products.
Corporation headquarters and state-of-the-art wafer fabrication facilities are located in San Jose, CA, with regional sales and support offices and
advanced technology design centers situated throughout the Americas, Europe, and Asia. Additionally, the Company maintains an extensive network
of distributors and reps worldwide.
Micrel makes no representations or warranties with respect to the accuracy or completeness of the information furnished in this datasheet. This
information is not intended as a warranty and Micrel does not assume responsibility for its use. Micrel reserves the right to change circuitry,
specifications and descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual
property rights is granted by this document. Except as provided in Micrel’s terms and conditions of sale for such products, Micrel assumes no liability
whatsoever, and Micrel disclaims any express or implied warranty relating to the sale and/or use of Micrel products including liability or warranties
relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right.
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product
can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical
implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A
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© 1998 Micrel, Incorporated.
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